Patents by Inventor Hung-Ming Chien

Hung-Ming Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200293201
    Abstract: An apparatus including a control unit, a memory having computer program code, and N groups of storage units electrically connected to the control unit is disclosed. Each of the N groups of storage units has N storage units, each of the N storage units has N storage regions, wherein N is a positive integer The memory and the computer program code configured to, with the control unit, cause the apparatus to perform: storing a first data segment into an ith storage region of a first storage unit of a kth group of storage units; storing a fourth data segment into an ith storage region of a first storage it of a (k+1)th group of storage units; storing a fifth data segment into an storage region of a second storage unit of the (k+1)th group of storage units; and storing a sixth data segment into an ith storage region of a third storage unit of the (k+1)th group of storage units.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 17, 2020
    Inventor: HUNG-MING CHIEN
  • Publication number: 20200293202
    Abstract: An apparatus includes a control unit, a memory having computer program code, and a first storage unit. The first storage unit comprises a first consecutive storage region and a second consecutive storage region. The first storage unit stores a number M of categories of first data having a first attribute in the first consecutive storage region and a number N of first error correction data in the second consecutive storage region. The number N of first error correction data stored in the second consecutive storage region of the first storage unit are independent of the number M of categories of first data stored in the first consecutive storage region of the first storage unit.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 17, 2020
    Inventor: HUNG-MING CHIEN
  • Patent number: 10734551
    Abstract: The invention provides an LED including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, a Bragg reflector structure, a conductive layer and insulation patterns. The first electrode and the second electrode are located on the same side of the Bragg reflector structure. The conductive layer is disposed between the Bragg reflector structure and the second-type semiconductor layer. The insulation patterns are disposed between the conductive layer and the second-type semiconductor layer. Each insulating layer has a first surface facing toward the second-type semiconductor layer, a second surface facing away from the second-type semiconductor layer, and an inclined surface. The inclined surface connects the first surface and the second surface and is inclined with respect to the first surface and the second surface.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: August 4, 2020
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting, Cheng-Pin Chen, Wei-Chen Chien, Chih-Chin Cheng, Chih-Hung Tseng
  • Publication number: 20200209631
    Abstract: A head-mounted display apparatus including a light source module, an optical adjustment element, a display module and a lens element is provided. The light source module provides an illumination beam. The optical adjustment element and the display module are disposed on a transmission path of the illumination beam, and the display module is configured to convert the illumination beam into an image beam. The optical adjustment element is located between the light source module and the display module. The lens element is disposed on a transmission path of the image beam, wherein a transmission direction of the maximum light-emitting intensity of the illumination beam transmitted from the light source module to the optical adjustment element is different to a transmission direction of the maximum light-emitting intensity of the illumination beam transmitted from the optical adjustment element to the display module.
    Type: Application
    Filed: December 16, 2019
    Publication date: July 2, 2020
    Applicant: Coretronic Corporation
    Inventors: Hung-Ta Chien, Fu-Ming Chuang
  • Publication number: 20200162084
    Abstract: In some aspects, the disclosure is directed to methods and systems for utilizing a thin-film bulk acoustic resonator (FBAR) as a frequency reference for a phase-locked loop (PLL) circuit controlling frequency of a voltage controlled oscillator (VCO). In some implementations, the FBAR-based oscillator may be used as a reference to an analog or digital PLL circuit (either directly, or divided to a lower frequency). In other implementations, the FBAR-based oscillator may be used as a reference to a mixing-based PLL rather than a dividing-based PLL. Through these implementations, the noise contribution of many of the PLL circuit components or elements may be reduced (e.g. noise from a delta-sigma modulator (DSM), multiple modulus divider (MMD), phase frequency detector (PFD)/charge pump (CP), etc.).
    Type: Application
    Filed: November 12, 2019
    Publication date: May 21, 2020
    Inventors: Hooman DARABI, David MURPHY, Arya BEHZAD, Dihang YANG, Hung-Ming CHIEN, Choong Yul CHA
  • Publication number: 20200064747
    Abstract: The present disclosure provides a lithography system. The lithography system includes an exposing module configured to perform a lithography exposing process using a mask secured on a mask stage; and a cleaning module integrated in the exposing module and designed to clean at least one of the mask and the mask stage using an attraction mechanism.
    Type: Application
    Filed: October 28, 2019
    Publication date: February 27, 2020
    Inventors: Shang-Chieh Chien, Jeng-Horng Chen, Jui-Ching Wu, Chia-Chen Chen, Hung-Chang Hsieh, Chi-Lun Lu, Chia-Hao Yu, Shih-Ming Chang, Anthony Yen
  • Publication number: 20200052159
    Abstract: The invention provides an LED including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, a Bragg reflector structure, a conductive layer and insulation patterns. The first electrode and the second electrode are located on the same side of the Bragg reflector structure. The conductive layer is disposed between the Bragg reflector structure and the second-type semiconductor layer. The insulation patterns are disposed between the conductive layer and the second-type semiconductor layer. Each insulating layer has a first surface facing toward the second-type semiconductor layer, a second surface facing away from the second-type semiconductor layer, and an inclined surface. The inclined surface connects the first surface and the second surface and is inclined with respect to the first surface and the second surface.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 13, 2020
    Applicant: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting, Cheng-Pin Chen, Wei-Chen Chien, Chih-Chin Cheng, Chih-Hung Tseng
  • Patent number: 10520965
    Abstract: A server room power management apparatus and method, the power management apparatus comprising a first PDE (power distribution equipment), at least one second PDE and at least one DM (digital meter); wherein a first network interface unit of the first PDE, a second network interface unit of the second PDE and the DM can be connected to become a network; the power management method uses a first processor of the first PDE to collect power consumptions of the second PDE and the DM; wherein, the first processor can work out power usage effectiveness; thus, the apparatus and method do not need an independent server device, that will reach power saving and reduce apparatus costs.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: December 31, 2019
    Assignee: CYBER POWER SYSTEMS, INC.
    Inventors: Hung-Ming Hsieh, Hung-Chun Chien, Yung-Hao Peng
  • Publication number: 20190356321
    Abstract: A stacked synthesizer for wide local oscillator (LO) generation using a dynamic divider. The phase locked loop can include a plurality of voltage controlled oscillators (VCOs), and a selector that can be configured to select an output of one of the plurality of VCOs. The selected output of one of the plurality of VCOs can be provided to an on-chip dynamic divider and to an off-chip dynamic divider for LO sharing. The dynamic dividers can be configured to generate synthesizer outputs based on a multiplication of the selected output of one of the plurality of VCOs by a factor (1+1/M), where M is a variable number.
    Type: Application
    Filed: May 17, 2018
    Publication date: November 21, 2019
    Inventors: Igal Kushnir, Hung-Ming Chien, Wei-Hong Chen, Theodoros Chalvatzis, Seunghwan Yoon, Chin-Ming Chien, Tirdad Sowlati, Moche Cohen, Kobi Sturkovich, Shaul Klein
  • Patent number: 10459353
    Abstract: The present disclosure provides a lithography system. The lithography system includes an exposing module configured to perform a lithography exposing process using a mask secured on a mask stage; and a cleaning module integrated in the exposing module and designed to clean at least one of the mask and the mask stage using an attraction mechanism.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: October 29, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Chieh Chien, Jeng-Horng Chen, Jui-Ching Wu, Chia-Chen Chen, Hung-Chang Hsieh, Chi-Lun Lu, Chia-Hao Yu, Shih-Ming Chang, Anthony Yen
  • Patent number: 10453999
    Abstract: The invention provides an LED including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, a Bragg reflector structure, a conductive layer and insulation patterns. The first electrode and the second electrode are located on the same side of the Bragg reflector structure. The conductive layer is disposed between the Bragg reflector structure and the second-type semiconductor layer. The insulation patterns are disposed between the conductive layer and the second-type semiconductor layer. Each insulating layer has a first surface facing toward the second-type semiconductor layer, a second surface facing away from the second-type semiconductor layer, and an inclined surface. The inclined surface connects the first surface and the second surface and is inclined with respect to the first surface and the second surface.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: October 22, 2019
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting, Cheng-Pin Chen, Wei-Chen Chien, Chih-Chin Cheng, Chih-Hung Tseng
  • Patent number: 10270348
    Abstract: A synchronous switching regulator circuit for supply regulation of a switching circuit includes a pass transistor to couple the switching circuit to a supply voltage. The synchronous switching regulator circuit further includes a switch that is operable to synchronously turn off a flow of a supply current through the pass transistor. The switching circuit can be controlled by a switching signal, and the switch can operate in synchronization with the switching circuit.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: April 23, 2019
    Assignee: Avago Technologies International Sales PTE. Limited
    Inventors: Choong Yul Cha, Dandan Li, Hung-Ming Chien, Long Bu, Stephen C. Au
  • Publication number: 20180241312
    Abstract: A synchronous switching regulator circuit for supply regulation of a switching circuit includes a pass transistor to couple the switching circuit to a supply voltage. The synchronous switching regulator circuit further includes a switch that is operable to synchronously turn off a flow of a supply current through the pass transistor. The switching circuit can be controlled by a switching signal, and the switch can operate in synchronization with the switching circuit.
    Type: Application
    Filed: October 12, 2017
    Publication date: August 23, 2018
    Inventors: Choong Yul CHA, Dandan LI, Hung-Ming CHIEN, Long BU, Stephen C. AU
  • Patent number: 10033393
    Abstract: A stacked synthesizer for wide local oscillator (LO) generation using a dynamic divider. The phase locked loop can include a plurality of voltage controlled oscillators (VCOs), and a selector that can be configured to select an output of one of the plurality of VCOs. The selected output of one of the plurality of VCOs can be provided to an on-chip dynamic divider and to an off-chip dynamic divider for LO sharing. The dynamic dividers can be configured to generate synthesizer outputs based on a multiplication of the selected output of one of the plurality of VCOs by a factor (1+1/M), where M is a variable number.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: July 24, 2018
    Assignee: MAXLINEAR ASIA SINGAPORE PTE LTD
    Inventors: Igal Kushnir, Hung-Ming Chien, Wei-Hong Chen, Theodoros Chalvatzis, Seunghwan Yoon, Chin-Ming Chien, Tirdad Sowlati, Moche Cohen, Kobi Sturkovich, Shaul Klein
  • Publication number: 20180175869
    Abstract: A stacked synthesizer for wide local oscillator (LO) generation using a dynamic divider. The phase locked loop can include a plurality of voltage controlled oscillators (VCOs), and a selector that can be configured to select an output of one of the plurality of VCOs. The selected output of one of the plurality of VCOs can be provided to an on-chip dynamic divider and to an off-chip dynamic divider for LO sharing. The dynamic dividers can be configured to generate synthesizer outputs based on a multiplication of the selected output of one of the plurality of VCOs by a factor (1+1/M), where M is a variable number.
    Type: Application
    Filed: January 10, 2017
    Publication date: June 21, 2018
    Inventors: Igal Kushnir, Hung-Ming Chien, Wei-Hong Chen, Theodoros Chalvatzis, Seunghwan Yoon, Chin-Ming Chien, Tirdad Sowlati, Moche Cohen, Kobi Sturkovich, Shaul Klein
  • Patent number: 9571112
    Abstract: A stacked synthesizer for wide local oscillator (LO) generation using a dynamic divider. The phase locked loop can include a plurality of voltage controlled oscillators (VCOs), and a selector that can be configured to select an output of one of the plurality of VCOs. The selected output of one of the plurality of VCOs can be provided to an on-chip dynamic divider and to an off-chip dynamic divider for LO sharing. The dynamic dividers can be configured to generate synthesizer outputs based on a multiplication of the selected output of one of the plurality of VCOs by a factor (1+1/M), where M is a variable number.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: February 14, 2017
    Assignee: MAXLINEAR ASIA SINGAPORE PTE LTD.
    Inventors: Igal Kushnir, Hung-Ming Chien, Wei-Hong Chen, Theodoros Chalvatzis, Seunghwan Yoon, Chin-Ming Chien, Tirdad Sowlati, Moche Cohen, Kobi Sturkovich, Shaul Klein
  • Patent number: 9350466
    Abstract: A transmitter capable of operating according to a first standard that does not interfere with a nearby frequency generator operating according to a second standard. The transmitter comprises an oscillator, a frequency divider, a mixer, and a filter. The oscillator is configured to output a first frequency that is outside of a frequency harmonic of the frequency generator. The frequency divider is coupled to the oscillator and divides the first frequency by a selective divide ratio to produce a second frequency. The mixer is configured to receive the first and second frequencies, which combines them to produce a mixed frequency. The filter is then used to filters the mixed frequency to obtain the higher portion of the mixed frequency. The divide ratio of the frequency divider is selected base on the desired output frequency of the transmitter such that a 2.4 GHz or 5 GHz ISM band frequency is achieved.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: May 24, 2016
    Assignee: Broadcom Corporation
    Inventor: Hung-Ming Chien
  • Patent number: 9122419
    Abstract: The invention discloses a data storage unit and a redundant data storage system including such data storage unit. The data storage unit of the invention includes an internal storage area network (SAN) switch module, a storage server module and a storage device. The internal SAN switch module includes a first external transmission interface and a first internal transmission interface. The storage server module includes a second external transmission interface and a second internal transmission interface. The storage server module is respectively connected to the storage device and the first internal transmission interface through the second internal transmission interface. The internal SAN switch module is connected to the storage device through the first internal transmission interface.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: September 1, 2015
    Assignee: Promise Technology, Inc.
    Inventors: Hung-Ming Chien, Shen-Cheng Hsieh
  • Publication number: 20150222281
    Abstract: A stacked synthesizer for wide local oscillator (LO) generation using a dynamic divider. The phase locked loop can include a plurality of voltage controlled oscillators (VCOs), and a selector that can be configured to select an output of one of the plurality of VCOs. The selected output of one of the plurality of VCOs can be provided to an on-chip dynamic divider and to an off-chip dynamic divider for LO sharing. The dynamic dividers can be configured to generate synthesizer outputs based on a multiplication of the selected output of one of the plurality of VCOs by a factor (1+1/M), where M is a variable number.
    Type: Application
    Filed: February 27, 2014
    Publication date: August 6, 2015
    Applicant: Broadcom Corporation
    Inventors: Igal Kushnir, Hung-Ming Chien, Wei-Hong Chen, Theodoros Chalvatzis, Seunghwan Yoon, Chin-Ming Chien, Tirdad Sowlati, Moche Cohen, Kobi Sturkovich, Shaul Klein
  • Publication number: 20150089131
    Abstract: The invention discloses a data storage unit and a redundant data storage system including such data storage unit. The data storage unit of the invention includes an internal storage area network (SAN) switch module, a storage server module and a storage device. The internal SAN switch module includes a first external transmission interface and a first internal transmission interface. The storage server module includes a second external transmission interface and a second internal transmission interface. The storage server module is respectively connected to the storage device and the first internal transmission interface through the second internal transmission interface. The internal SAN switch module is connected to the storage device through the first internal transmission interface.
    Type: Application
    Filed: December 31, 2013
    Publication date: March 26, 2015
    Applicant: PROMISE TECHNOLOGY, INC.
    Inventors: Hung-Ming CHIEN, Shen-Cheng HSIEH