Abstract: A simple down converting A/D converter utilizing predictive coding principles. By placing the sampler inside the predictive loop, the predictive loop filter can be implemented using DSP techniques, thus eliminating the complexities introduced by use of discrete-time analog circuitry. Then, by re-mapping the output of the predictive loop filter into the analog domain using a D/A converter, the predictive filter output signal is subtracted from the input analog signal to generate the prediction error signal. Therefore, through directly sampling the prediction error signal and converting the output of the predictive loop filter into analog representation using a low-cost multiple bit D/A, the use of discrete-time analog circuitry is eliminated and the complexity of the converter design is greatly reduced. Various features of the invention are disclosed.

Abstract: A system for self-calibrating a clock of a communication terminal for use with communication systems in which a central communication node generates time base correction signals for the terminal clock includes a terminal oscillator which generates an oscillator frequency that includes an error amount. An oscillator calibration filter generates a frequency error estimate amount. Circuitry is provided for subtracting the frequency error estimate amount generated by the calibration filter from the oscillator frequency error amount. Circuitry is provided for applying the time base correction signals to the calibration filter to thereby modify the frequency error estimate amount generated by the calibration filter based upon the time base correction signals generated by the communication central node.

Abstract: The architecture and design method of an application specific processor ("ASP") is disclosed. The ASP is designed by integrating selected pre-designed application elements contained in a library. These selected application elements can communicate with each other via a bus. Post-synthesis tailoring of the synthesized ASP is accomplished by using an instruction program which sequences the invocation of each application element and provides reconfiguration and data input/output routing commands thereto. A power management design is incorporated within the application elements allowing the majority of the application elements to be turned on only during periods of invocation.