Abstract: An information-capture device includes a video-capture device, a pre-processing module, an image-processing module, and a text generation module. The video capturing module is configured to capture a video data. The pre-processing module is configured to divide the video data into a background data and a foreground data. The image-processing module generates an object feature and the object-motion information according to the foreground data, and generates captured-space information of the video data according to the background data. The text generation module generates event-description information according to the object feature, the object-motion information, and the captured-space information, in which the event-description information is related to an event that occurred in the video data, including the information related to the event, and is a machine-readable text file.

Abstract: A liquid crystal display includes: first and second gate lines disposed on the first substrate and which respectively transmit first and second gate signals; first, second and third data lines disposed on the first substrate; a first switching element connected to the first gate line and the first data line; a second switching element connected to the first gate line and the second data line; a third switching element connected to the second gate line and the second data line; a fourth switching element connected to the second gate line and the third data line; first and second pixel electrodes respectively connected to the first and second switching and which form a first liquid crystal capacitor; and third and fourth pixel electrodes respectively connected to the third and fourth switching elements and which form a second liquid crystal capacitor.

Abstract: A semiconductor device includes an interlayer dielectric layer on a substrate, the interlayer dielectric layer having an upper surface, a lower plug extending down into the interlayer dielectric layer from the upper surface of the interlayer dielectric layer, the lower plug having an upper surface, a first dielectric layer pattern on the upper surface of the lower plug, at least a portion of the first dielectric layer pattern being directly connected to the upper surface of the lower plug, a first metal electrode pattern on the first dielectric layer pattern, a first upper plug electrically connected to the first metal electrode pattern, and a second upper plug on the lower plug, the second upper plug being spaced apart from the first upper plug.

Abstract: A display apparatus includes a first substrate, a second substrate, and a spacer. The first substrate includes pixel areas including first and second pixel areas adjacent to each other and arranged in a matrix form defined by first and second directions substantially perpendicular to each other. The second substrate faces the first substrate. The spacer is disposed on the second substrate to extend toward the first substrate. Each of the pixel areas includes a pixel electrode and a thin film transistor connected to the pixel electrode through a contact hole.

Abstract: A liquid crystal display includes first and second substrates facing each other, a liquid crystal layer between the substrates, first and second thin film transistors on the first substrate, and first and second pixel electrodes connected to the first and second thin film transistors, respectively, on the first substrate. A transverse center line bisects the first and second pixel electrodes into upper and lower portions. The first and second pixel electrodes include a plurality of branches which alternate. First and second regions include first and second intervals between adjacent branches of the first and second pixel electrodes, respectively, the first interval being larger then the second interval. At least one of the branches includes a first portion forming a first angle with the transverse center line, and a second portion forming a second angle with the transverse center line different from the first angle.

Abstract: A chip electronic component may include an internal coil structure for preventing the occurrence of short-circuits between coil patterns and may have a high aspect ratio (AR) by increasing a thickness of the coil with respect to a width of the coil. The chip electronic component may include a magnetic body including an insulating substrate; an internal coil part formed on at least one surface of the insulating substrate; external electrodes formed on at least one end surface of the magnetic body and connected to the internal coil part. Insoluble films may be formed on side portions of coil patterns forming the internal coil part, and the internal coil part may have an aspect ratio of 1.5 or greater.

Abstract: A liquid crystal display includes: a signal controller configured to receive an input image signal corresponding to a gray from the outside, and an image signal corrector configured to correct the input image signal. The image signal corrector is configured to shift a first input image signal value corresponding to a black gray by a first value based on a common voltage, is configured to shift a second input image signal value corresponding to a halftone gray by a second value based on the common voltage, and is configured to shift a third input image signal value corresponding to a white gray by a third value based on the common voltage. The first value and the second value are larger than a kickback voltage of each of the black gray and the halftone gray, and the third value is the same as a kickback voltage of the white gray.

Abstract: A test pattern of a semiconductor device is provided, which includes first and second fins formed to project from a substrate and arranged to be spaced apart from each other, first and second gate structures formed to cross the first and second fins, respectively, a first source region and a first drain region arranged on the first fin on one side and the other side of the first gate structure, a second source region and a second drain region arranged on the second fin on one side and the other side of the second gate structure, a first conductive pattern connected to the first and second drain regions to apply a first voltage to the first and second drain regions and a second conductive pattern connecting the first source region and the second gate structure to each other.

Abstract: A device for driving a liquid crystal display, in which a pixel voltage is reduced by a kickback voltage variable according to grayscales, includes: a signal controller which receives an input image signal corresponding to a grayscale; an image signal corrector which corrects the input image signal and generates a data input signal; and a data driver which supplies a data voltage corresponding to the grayscale based on the data input signal, where the grayscale includes black, white grayscale and intermediate grayscales, the data voltage includes positive and negative voltages, and when a difference between a sum of the positive and negative voltages and a common voltage is defined an offset value, a first offset value corresponding to the black grayscale, a second offset value corresponding to the white grayscale and a third offset value corresponding to the intermediate grayscale satisfy the inequation: |first offset value-second offset value|?50 mV.

Abstract: A method of cleaning a photomask, the method including placing the photomask in a chamber, the photomask including a mask substrate and a reflective layer, a capping layer, and a light absorbing layer pattern stacked on the mask substrate, and wherein the photomask has contaminants thereon; supplying a gas into the chamber such that the gas does not react with the capping layer or reacts with the capping layer to form an anti-oxidant layer; ionizing the gas by irradiating an inside of the chamber with an energy beam such that the contaminants react with the ionized gas to be converted to a by-product; and removing the by-product from the chamber.

Abstract: Provided are method of fabricating semiconductor device and computing system for implementing the method. The method of fabricating a semiconductor device includes forming a target layer, forming a first mask on the target layer to expose a first region, subsequently forming a second mask on the target layer to expose a second region separated from the first region in a first direction, subsequently forming a third mask in the exposed first region to divide the first region into a first sub region and a second sub region separated from each other in a second direction intersecting the first direction, and etching the target layer using the first through third masks such that the first and second sub regions and the second region are defined in the target layer.

Abstract: A liquid crystal display includes a first substrate, a second substrate facing the first substrate with a predetermined interval therebetween, a liquid crystal material filled between the first substrate and the second substrate, a column spacer disposed at the second substrate and maintaining the predetermined interval between the first substrate and the second substrate, a passivation layer disposed at the first substrate, a pixel electrode disposed on the passivation layer; and a fixing protrusion which is disposed on the first substrate, is positioned at an opposing surface of the column spacer and includes at least one of a lower layer including the passivation layer and an upper layer including the pixel electrode.

Abstract: An array substrate includes a first pixel electrode and a second pixel electrode. The first pixel electrode includes first branch electrode portions and second branch electrode portions. The first branch electrode portions are disposed in a first area of a unit pixel area and are substantially parallel to a first side of the unit pixel area. The second branch electrode portions are disposed in a second area of the unit pixel area and are substantially parallel to a second side of the unit pixel area. The second pixel electrode includes third branch electrode portions disposed between the first branch electrode portions and fourth branch electrode portions disposed between the second branch electrode portions.

Abstract: A liquid crystal display includes a first insulation substrate, a gate line and a data line disposed on the first insulation substrate and insulated from and intersecting each other, a first passivation layer covering the gate line and the data line, a common electrode positioned on the first passivation layer and including a step-removed part, a second passivation layer covering the common electrode, a pixel electrode positioned on the second passivation layer, a second insulation substrate facing the first insulation substrate, and a main column spacer positioned on the second insulation substrate, where the step-removed part is provided by removing the common electrode at a position corresponding to the main column spacer.

Abstract: A semiconductor device includes an interlayer dielectric layer on a substrate, the interlayer dielectric layer having an upper surface, a lower plug extending down into the interlayer dielectric layer from the upper surface of the interlayer dielectric layer, the lower plug having an upper surface, a first dielectric layer pattern on the upper surface of the lower plug, at least a portion of the first dielectric layer pattern being directly connected to the upper surface of the lower plug, a first metal electrode pattern on the first dielectric layer pattern, a first upper plug electrically connected to the first metal electrode pattern, and a second upper plug on the lower plug, the second upper plug being spaced apart from the first upper plug.

Abstract: A liquid crystal display includes: a first substrate and a second substrate disposed opposite the first substrate; a liquid crystal layer interposed between the first and second substrates and including liquid crystal molecules; a gate line which transmits a gate signal; first and second data lines which respectively transmit first and second data voltages, the first and second data voltages having opposite polarities; a first switching element connected to the gate line and the first data line; a second switching element connected to the gate line and the second data line; a first subpixel electrode connected to the first switching element; and a second subpixel electrode connected to the second switching element. The first and second subpixel electrodes overlap portions of the first and second data lines. The first and second subpixel electrodes include first and second branches, respectively, which are alternately arranged between the first and second data lines.

Abstract: A semiconductor device includes a fin type active pattern protruding above a device isolation layer, a gate electrode on the device isolation layer and intersecting the fin type active pattern, an elevated source/drain on the fin type active pattern at both sides of the gate electrode, and a fin spacer on a side wall of the fin type active pattern, the fin spacer having a low dielectric constant and being between the device isolation layer and the elevated source/drain.

Abstract: A liquid crystal display includes: first and second gate lines disposed on the first substrate and which respectively transmit first and second gate signals; first, second and third data lines disposed on the first substrate; a first switching element connected to the first gate line and the first data line; a second switching element connected to the first gate line and the second data line; a third switching element connected to the second gate line and the second data line; a fourth switching element connected to the second gate line and the third data line; first and second pixel electrodes respectively connected to the first and second switching and which form a first liquid crystal capacitor; and third and fourth pixel electrodes respectively connected to the third and fourth switching elements and which form a second liquid crystal capacitor.

Abstract: A semiconductor device includes a substrate having a transistor area, a gate structure disposed on the transistor area of the substrate, a first interlayer insulating layer covering the gate structure, a blocking pattern disposed on the first interlayer insulating layer, and a jumper pattern disposed on the blocking pattern. The jumper pattern includes jumper contact plugs vertically penetrating the first interlayer insulating layer to be in contact with the substrate exposed at both sides of the gate structure, and a jumper section configured to electrically connect the jumper contact plugs.

Abstract: Disclosed are a (halo)silicate-based phosphor and a manufacturing method of the same. More particularly, the disclosed phosphor is a novel (halo)silicate-based phosphor manufactured by using a (halo)silicate-based host material containing an alkaline earth metal, and europium as an activator.