Abstract: An image sensor includes a pixel including a reset circuit and a floating diffusion node, and outputting a pixel signal that is generated based on a voltage at the floating diffusion node, the pixel signal including a reset output that is generated based on the voltage at the floating diffusion node being reset by the reset circuit. The image sensor further includes a sampler sampling the output pixel signal to generate a sampling signal having a time interval corresponding to a magnitude of the output pixel signal, and a counter counting the generated sampling signal, based on a counter clock, to generate a counting value corresponding to the time interval of the sampling signal. The sampler samples the reset output of the output pixel signal n times to generate first to n-th reset sampling signals, where n is an integer of 2 or more.

Abstract: An analog-digital converter includes a count code generator to receive a code generation clock signal from a clock signal generator and to output a count code according to the code generation clock signal, a latch to latch the count code, an operating circuit to generate a count value of the count code and to output a digital signal based on the count value, and a transfer controller to transfer the count code from the latch to the operating circuit. The transfer controller determines whether to transfer the count code according to a logic level of a count enable clock signal generated from the clock signal generator.

Abstract: An analog-digital converter includes a count code generator to receive a code generation clock signal from a clock signal generator and to output a count code according to the code generation clock signal, a latch to latch the count code, an operating circuit to generate a count value of the count code and to output a digital signal based on the count value, and a transfer controller to transfer the count code from the latch to the operating circuit. The transfer controller determines whether to transfer the count code according to a logic level of a count enable clock signal generated from the clock signal generator.

Abstract: Provided are an image sensor and an image processing device including the same. The image sensor includes: a pixel array including a plurality of pixels arranged in rows and columns and configured to generate pixel signals from the plurality of pixels, a time calculator configured to receive zoom information corresponding to digital zooming, and configured to calculate a row processing time available for processing the pixel signals from the plurality of pixels included in a single row based on the zoom information, a timing generator configured to generate at least one control signal based on the row processing time; and an Analog-to-Digital Converter (ADC) configured to generate pixel data by performing sampling on the pixel signals according to the at least one control signal.

Abstract: In a method of operating an image sensor, the image sensor includes a pixel array and a plurality of column driving circuits that are connected to a plurality of columns of the pixel array. A test operation is performed by applying a test pattern to the plurality of column driving circuits while changing a level of a well-bias voltage applied to a transistor included in the plurality of column driving circuits. A bias setting operation for setting the level of the well-bias voltage is performed based on a result of the test operation. An image capture operation for detecting incident light and generating a frame image is performed based on the pixel array, the plurality of column driving circuits and the well-bias voltage set by the bias setting operation.

Abstract: Provided are an image sensor and an image processing device including the same. The image sensor includes: a pixel array including a plurality of pixels arranged in rows and columns and configured to generate pixel signals from the plurality of pixels, a time calculator configured to receive zoom information corresponding to digital zooming, and configured to calculate a row processing time available for processing the pixel signals from the plurality of pixels included in a single row based on the zoom information, a timing generator configured to generate at least one control signal based on the row processing time; and an Analog-to-Digital Converter (ADC) configured to generate pixel data by performing sampling on the pixel signals according to the at least one control signal.

Abstract: Provided are an image sensor and an image processing device including the same. The image sensor includes: a pixel array including a plurality of pixels arranged in rows and columns and configured to generate pixel signals from the plurality of pixels, a time calculator configured to receive zoom information corresponding to digital zooming, and configured to calculate a row processing time available for processing the pixel signals from the plurality of pixels included in a single row based on the zoom information, a timing generator configured to generate at least one control signal based on the row processing time; and an Analog-to-Digital Converter (ADC) configured to generate pixel data by performing sampling on the pixel signals according to the at least one control signal.

Abstract: A digital correlated double sampling (CDS) circuit includes a first latch circuit, a first converting circuit, a second converting circuit, a second latch circuit, and a calculating circuit. The first latch circuit latches an input phase shift code based on a first control signal to store first and second phase shift codes. The first converting circuit converts the first and second phase shift codes into first and second Gray codes. The second converting circuit converts the first Gray code and the second Gray code into a first binary code and a second binary code. The second latch circuit latches an output of the second converting circuit based on a second control signal to store the first binary code. The calculating circuit operates on the first binary code and the second binary code to generate a third binary code, and outputs the third binary code.

Abstract: In a method of operating an image sensor, the image sensor includes a pixel array and a plurality of column driving circuits that are connected to a plurality of columns of the pixel array. A test operation is performed by applying a test pattern to the plurality of column driving circuits while changing a level of a well-bias voltage applied to a transistor included in the plurality of column driving circuits. A bias setting operation for setting the level of the well-bias voltage is performed based on a result of the test operation. An image capture operation for detecting incident light and generating a frame image is performed based on the pixel array, the plurality of column driving circuits and the well-bias voltage set by the bias setting operation.

Abstract: An analog-digital converter includes a count code generator to receive a code generation clock signal from a clock signal generator and to output a count code according to the code generation clock signal, a latch to latch the count code, an operating circuit to generate a count value of the count code and to output a digital signal based on the count value, and a transfer controller to transfer the count code from the latch to the operating circuit. The transfer controller determines whether to transfer the count code according to a logic level of a count enable clock signal generated from the clock signal generator.

Abstract: An image sensor includes a pixel including a reset circuit and a floating diffusion node, and outputting a pixel signal that is generated based on a voltage at the floating diffusion node, the pixel signal including a reset output that is generated based on the voltage at the floating diffusion node being reset by the reset circuit. The image sensor further includes a sampler sampling the output pixel signal to generate a sampling signal having a time interval corresponding to a magnitude of the output pixel signal, and a counter counting the generated sampling signal, based on a counter clock, to generate a counting value corresponding to the time interval of the sampling signal. The sampler samples the reset output of the output pixel signal n times to generate first to n-th reset sampling signals, where n is an integer of 2 or more.

Abstract: In a method of operating an image sensor, the image sensor includes a pixel array and a plurality of column driving circuits that are connected to a plurality of columns of the pixel array. A test operation is performed by applying a test pattern to the plurality of column driving circuits while changing a level of a well-bias voltage applied to a transistor included in the plurality of column driving circuits. A bias setting operation for setting the level of the well-bias voltage is performed based on a result of the test operation. An image capture operation for detecting incident light and generating a frame image is performed based on the pixel array, the plurality of column driving circuits and the well-bias voltage set by the bias setting operation.

Abstract: An image sensor includes a pixel including a reset circuit and a floating diffusion node, and outputting a pixel signal that is generated based on a voltage at the floating diffusion node, the pixel signal including a reset output that is generated based on the voltage at the floating diffusion node being reset by the reset circuit. The image sensor further includes a sampler sampling the output pixel signal to generate a sampling signal having a time interval corresponding to a magnitude of the output pixel signal, and a counter counting the generated sampling signal, based on a counter clock, to generate a counting value corresponding to the time interval of the sampling signal. The sampler samples the reset output of the output pixel signal n times to generate first to n-th reset sampling signals, where n is an integer of 2 or more.

Abstract: An image sensor includes a pixel including a reset circuit and a floating diffusion node, and outputting a pixel signal that is generated based on a voltage at the floating diffusion node, the pixel signal including a reset output that is generated based on the voltage at the floating diffusion node being reset by the reset circuit. The image sensor further includes a sampler sampling the output pixel signal to generate a sampling signal having a time interval corresponding to a magnitude of the output pixel signal, and a counter counting the generated sampling signal, based on a counter clock, to generate a counting value corresponding to the time interval of the sampling signal. The sampler samples the reset output of the output pixel signal n times to generate first to n-th reset sampling signals, where n is an integer of 2 or more.

Abstract: In a method of operating an image sensor, the image sensor includes a pixel array and a plurality of column driving circuits that are connected to a plurality of columns of the pixel array. A test operation is performed by applying a test pattern to the plurality of column driving circuits while changing a level of a well-bias voltage applied to a transistor included in the plurality of column driving circuits. A bias setting operation for setting the level of the well-bias voltage is performed based on a result of the test operation. An image capture operation for detecting incident light and generating a frame image is performed based on the pixel array, the plurality of column driving circuits and the well-bias voltage set by the bias setting operation.

Abstract: Provided are an image sensor and an image processing device including the same. The image sensor includes: a pixel array including a plurality of pixels arranged in rows and columns and configured to generate pixel signals from the plurality of pixels, a time calculator configured to receive zoom information corresponding to digital zooming, and configured to calculate a row processing time available for processing the pixel signals from the plurality of pixels included in a single row based on the zoom information, a timing generator configured to generate at least one control signal based on the row processing time; and an Analog-to-Digital Converter (ADC) configured to generate pixel data by performing sampling on the pixel signals according to the at least one control signal.

Abstract: Provided are an image sensor and an image processing device including the same. The image sensor includes: a pixel array including a plurality of pixels arranged in rows and columns and configured to generate pixel signals from the plurality of pixels, a time calculator configured to receive zoom information corresponding to digital zooming, and configured to calculate a row processing time available for processing the pixel signals from the plurality of pixels included in a single row based on the zoom information, a timing generator configured to generate at least one control signal based on the row processing time; and an Analog-to-Digital Converter (ADC) configured to generate pixel data by performing sampling on the pixel signals according to the at least one control signal.

Abstract: An image sensor includes a pixel array including a plurality of pixels, an analog-to-digital converter having a first counter for converting an analog signal into a digital signal, and an output buffer having a first memory. A first counter test result value generated as a test result for the first counter is stored in the first memory in a test mode. The output buffer outputs the first counter test result value from the first memory to an outside of the output buffer in response to a first selection signal. The output buffer further includes a reset logic circuit for resetting the first memory depending on whether the first counter test result value is output or not. The plurality of pixels generate the analog signal in response to incident light.

Abstract: Disclosed are an image sensor having a light-emitting diode (LED) flicker mitigation function and an image processing system including the image sensor. The image processing system includes an image sensor including a plurality of pixels, the plurality of pixels configured to respectively generate pixel signals corresponding to photocharges, and configured to perform analog-to-digital conversion (ADC) on the pixel signals to generate digital pixel signals; and an image signal processor configured to process the digital pixel signals to generate image data. The image sensor operates in a first operating mode in a situation in which a light-emitting diode (LED) light is provided, and operates in a second operating mode in a general situation in which the LED light is not provided.

Abstract: A digital correlated double sampling (CDS) circuit includes a first latch circuit, a first converting circuit, a second converting circuit, a second latch circuit, and a calculating circuit. The first latch circuit latches an input phase shift code based on a first control signal to store first and second phase shift codes. The first converting circuit converts the first and second phase shift codes into first and second Gray codes. The second converting circuit converts the first Gray code and the second Gray code into a first binary code and a second binary code. The second latch circuit latches an output of the second converting circuit based on a second control signal to store the first binary code. The calculating circuit operates on the first binary code and the second binary code to generate a third binary code, and outputs the third binary code.