Abstract: Provided are semiconductor devices and methods of fabricating the same. In methods of forming the same, an etch stop pattern and a separate spacer can be formed on a sidewall of a bit line contact, wherein the etch stop pattern and the separate spacer each comprise material having an etch selectivity relative to an oxide. A storage node contact plug hole can be formed so that the etch stop pattern and the separate spacer form a portion of a sidewall of the storage node contact plug hole spaced apart from the bit line contact. The storage node contact plug hole can be cleaned to remove a natural oxide formed in the storage node contact plug hole. Related devices are also disclosed.

Abstract: A semiconductor device includes a substrate including a cell region and a peripheral region, a cell gate electrode buried in a groove crossing a cell active portion of the cell region, a cell line pattern crossing over the cell gate electrode, the cell line pattern being connected to a first source/drain region in the cell active portion at a side of the cell gate electrode, a peripheral gate pattern crossing over a peripheral active portion of the peripheral region, a planarized interlayer insulating layer on the substrate around the peripheral gate pattern, and a capping insulating layer on the planarized interlayer insulating layer and a top surface of the peripheral gate pattern, the capping insulating layer including an insulating material having an etch selectivity with respect to the planarized interlayer insulating layer.

Abstract: A semiconductor device includes a plurality of bit lines that intersect an active region on a substrate and extend in a first direction, a contact pad formed on the active region between adjacent bit lines, and a plurality of spacers disposed on sidewalls of the plurality of bit lines. An upper portion of the contact pad is interposed between adjacent spacers, and a lower portion of the contact pad has a width greater than a distance between adjacent spacers.

Abstract: Provided are semiconductor devices and methods of fabricating the same. In methods of forming the same, an etch stop pattern and a separate spacer can be formed on a sidewall of a bit line contact, wherein the etch stop pattern and the separate spacer each comprise material having an etch selectivity relative to an oxide. A storage node contact plug hole can be formed so that the etch stop pattern and the separate spacer form a portion of a sidewall of the storage node contact plug hole spaced apart from the bit line contact. The storage node contact plug hole can be cleaned to remove a natural oxide formed in the storage node contact plug hole. Related devices are also disclosed.

Abstract: The present invention relates to a transparent electrically-conductive film comprising a substrate having a refractive index of n1, a first coating layer having a refractive index of n2, a second coating layer having a refractive index of n3, and an electrically-conductive oxide layer having a refractive index of n4 in a sequentially laminated form, wherein said refractive index of each layer complies with n1?n3<n2<n4, and a method of preparing the same. The transparent electrically-conductive film according to the present invention has especially excellent color feeling and mechanical property as well as excellent transmittance.

Abstract: Disclosed are a transparent conductive layer and a transparent electrode comprising the same, and in particular, a zinc oxide-based transparent conductive layer having a textured surface, wherein the textured surface has protrusions, each protrusion having a ridge forming an arc in its protruding direction, or having an apex at an edge thereof such that two ridges forms an obtuse angle of 90° or more. The transparent conductive layer is manufactured by sputtering only without wet etching.

Abstract: A semiconductor device includes an interlayer insulating layer on a substrate, and a direct contact (DC) structure vertically penetrating the interlayer insulating layer and contacting the substrate, the DC structure including a DC hole exposing the substrate, an insulating DC spacer on an inner wall of the DC hole, and a conductive DC plug on the DC spacer and filling the DC hole, the DC plug including a lower DC plug and an upper DC plug on the lower DC plug, the lower DC plug having a smaller horizontal width than that of the upper DC plug.

Abstract: A semiconductor device includes a substrate including a cell region and a peripheral region, a cell gate electrode buried in a groove crossing a cell active portion of the cell region, a cell line pattern crossing over the cell gate electrode, the cell line pattern being connected to a first source/drain region in the cell active portion at a side of the cell gate electrode, a peripheral gate pattern crossing over a peripheral active portion of the peripheral region, a planarized interlayer insulating layer on the substrate around the peripheral gate pattern, and a capping insulating layer on the planarized interlayer insulating layer and a top surface of the peripheral gate pattern, the capping insulating layer including an insulating material having an etch selectivity with respect to the planarized interlayer insulating layer.

Abstract: A semiconductor device includes a plurality of bit lines that intersect an active region on a substrate and extend in a first direction, a contact pad formed on the active region between adjacent bit lines, and a plurality of spacers disposed on sidewalls of the plurality of bit lines. An upper portion of the contact pad is interposed between adjacent spacers, and a lower portion of the contact pad has a width greater than a distance between adjacent spacers.

Abstract: Provided are semiconductor devices and methods of fabricating the same. In methods of forming the same, an etch stop pattern and a separate spacer can be formed on a sidewall of a bit line contact, wherein the etch stop pattern and the separate spacer each comprise material having an etch selectivity relative to an oxide. A storage node contact plug hole can be formed so that the etch stop pattern and the separate spacer form a portion of a sidewall of the storage node contact plug hole spaced apart from the bit line contact. The storage node contact plug hole can be cleaned to remove a natural oxide formed in the storage node contact plug hole. Related devices are also disclosed.

Abstract: A semiconductor device includes an interlayer insulating layer on a substrate, and a direct contact (DC) structure vertically penetrating the interlayer insulating layer and contacting the substrate, the DC structure including a DC hole exposing the substrate, an insulating DC spacer on an inner wall of the DC hole, and a conductive DC plug on the DC spacer and filling the DC hole, the DC plug including a lower DC plug and an upper DC plug on the lower DC plug, the lower DC plug having a smaller horizontal width than that of the upper DC plug.

Abstract: A semiconductor device includes a substrate including a cell area and a peripheral area, the cell area having an active region defined by an isolation region, a cell gate structure below an upper surface of the substrate in the cell area, the cell gate crossing the active region, a bit line structure above an upper surface of the substrate in the cell area, the bit line structure including bit line offset spacers on at least two side surfaces thereof, and a peripheral gate structure above an upper surface of the substrate in the peripheral area, the peripheral gate structure including peripheral gate offset spacers and peripheral gate spacers on at least two side surfaces thereof.

Abstract: Disclosed is a conductive laminated body, and a method for preparing the same, wherein the conductive laminated body including: a substrate; a zinc oxide-based thin film doped with an element M; and an interlayer including an oxide M?2O3, which is interposed between the substrate and the zinc oxide-based thin film. The disclosed conductive laminated body includes a metal oxide interlayer of an oxidation number +3, between a substrate and a zinc oxide layer. Therefore, it is possible to improve electrical properties of a transparent conductive thin film, especially, a resistivity property, and to minimize the unevenness in electrical properties between a middle portion and a circumferential portion on the surface of the thin film in sputtering deposition.

Abstract: A semiconductor device includes a substrate including a cell area and a peripheral area, the cell area having an active region defined by an isolation region, a cell gate structure below an upper surface of the substrate in the cell area, the cell gate crossing the active region, a bit line structure above an upper surface of the substrate in the cell area, the bit line structure including bit line offset spacers on at least two side surfaces thereof, and a peripheral gate structure above an upper surface of the substrate in the peripheral area, the peripheral gate structure including peripheral gate offset spacers and peripheral gate spacers on at least two side surfaces thereof.

Abstract: The present invention relates to a transparent electrically-conductive film comprising a substrate having a refractive index of n1, a first coating layer having a refractive index of n2, a second coating layer having a refractive index of n3, and an electrically-conductive oxide layer having a refractive index of n4 in a sequentially laminated form, wherein said refractive index of each layer complies with n1?n3<n2<n4, and a method of preparing the same. The transparent electrically-conductive film according to the present invention has especially excellent color feeling and mechanical property as well as excellent transmittance.

Abstract: Disclosed are a transparent conductive layer and a transparent electrode comprising the same, and in particular, a zinc oxide-based transparent conductive layer having a textured surface, wherein the textured surface has protrusions, each protrusion having a ridge forming an arc in its protruding direction, or having an apex at an edge thereof such that two ridges forms an obtuse angle of 90° or more. The transparent conductive layer is manufactured by sputtering only without wet etching.

Abstract: Disclosed is a conductive laminated body, and a method for preparing the same, wherein the conductive laminated body including: a substrate; a zinc oxide-based thin film doped with an element M; and an interlayer including an oxide M?2O3, which is interposed between the substrate and the zinc oxide-based thin film. The disclosed conductive laminated body includes a metal oxide interlayer of an oxidation number +3, between a substrate and a zinc oxide layer. Therefore, it is possible to improve electrical properties of a transparent conductive thin film, especially, a resistivity property, and to minimize the unevenness in electrical properties between a middle portion and a circumferential portion on the surface of the thin film in sputtering deposition.