Patents by Inventor Hyeon Jin Shin

Hyeon Jin Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11854979
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including an element isolation layer, the element isolation layer defining an active region, a plurality of word lines traversing the active region in a first direction, and a plurality of bit line structures on the substrate and connected to the active region, the plurality of bit line structures extending in a second direction different from the first direction. Each of the plurality of bit line structures includes a ruthenium line wiring including a bottom surface and a top surface opposite to the bottom surface, a lower graphene layer in contact with the bottom surface of the ruthenium line wiring and extending along the bottom surface of the ruthenium line wiring, and a wiring line capping layer extending along the top surface of the ruthenium line wiring.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: December 26, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jang Eun Lee, Min Joo Lee, Wan Don Kim, Hyeon Jin Shin, Hyun Bae Lee, Hyun Seok Lim
  • Patent number: 11407637
    Abstract: A method of preparing crystalline graphene includes performing a first thermal treatment including supplying heat to an inorganic substrate in a reactor, introducing a vapor carbon supply source into the reactor during the first thermal treatment to form activated carbon, and binding of the activated carbon on the inorganic substrate to grow the crystalline graphene.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: August 9, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyeon-jin Shin, Jae-young Choi, Yun-sung Woo, Seon-mi Yoon
  • Publication number: 20220084952
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including an element isolation layer, the element isolation layer defining an active region, a plurality of word lines traversing the active region in a first direction, and a plurality of bit line structures on the substrate and connected to the active region, the plurality of bit line structures extending in a second direction different from the first direction. Each of the plurality of bit line structures includes a ruthenium line wiring including a bottom surface and a top surface opposite to the bottom surface, a lower graphene layer in contact with the bottom surface of the ruthenium line wiring and extending along the bottom surface of the ruthenium line wiring, and a wiring line capping layer extending along the top surface of the ruthenium line wiring.
    Type: Application
    Filed: July 19, 2021
    Publication date: March 17, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jang Eun LEE, Min Joo LEE, Wan Don KIM, Hyeon Jin SHIN, Hyun Bae LEE, Hyun Seok LIM
  • Patent number: 11270881
    Abstract: In a plasma deposition method, a substrate is loaded onto a substrate stage within a chamber. A first plasma is generated at a region separated from the substrate by a first distance. A first process gas is supplied to the first plasma region to perform a pre-treatment process on the substrate. A second plasma is generated at a region separated from the substrate by a second distance different from the first distance. A second process gas is supplied to the second plasma region to perform a deposition process on the substrate.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: March 8, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kaoru Yamamoto, Chang-Hyun Kim, Hyun-Jae Song, Keun-Wook Shin, Hyeon-Jin Shin, Sung-Joo An, Chang-Seok Lee, Kee-Young Jun, Geun-O Jeong, Jang-Hee Lee
  • Patent number: 11062818
    Abstract: Example embodiments relate to a stacking structure having a material layer formed on a graphene layer, and a method of forming the material layer on the graphene layer. In the stacking structure, when the material layer is formed on the graphene layer by using an ALD method, an intermediate layer as a seed layer may be formed on the graphene layer by using a linear type precursor.
    Type: Grant
    Filed: January 2, 2015
    Date of Patent: July 13, 2021
    Assignees: Samsung Electronics Co., Ltd., SUNGKYUNKWAN UNIVERSITY RESEARCH & BUSINESS FOUNDATION
    Inventors: Seong-jun Jeong, Seong-jun Park, Hyeon-jin Shin, Yea-hyun Gu, Hyoung-sub Kim, Jae-hyun Yang
  • Publication number: 20200317511
    Abstract: A method of preparing crystalline graphene includes performing a first thermal treatment including supplying heat to an inorganic substrate in a reactor, introducing a vapor carbon supply source into the reactor during the first thermal treatment to form activated carbon, and binding of the activated carbon on the inorganic substrate to grow the crystalline graphene.
    Type: Application
    Filed: June 19, 2020
    Publication date: October 8, 2020
    Inventors: Hyeon-jin SHIN, Jae-young CHOI, Yun-sung WOO, Seon-mi YOON
  • Patent number: 10723620
    Abstract: A method of preparing crystalline graphene includes performing a first thermal treatment including supplying heat to an inorganic substrate in a reactor, introducing a vapor carbon supply source into the reactor during the first thermal treatment to form activated carbon, and binding of the activated carbon on the inorganic substrate to grow the crystalline graphene.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: July 28, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyeon-jin Shin, Jae-young Choi, Yun-sung Woo, Seon-mi Yoon
  • Publication number: 20200075324
    Abstract: In a plasma deposition method, a substrate is loaded onto a substrate stage within a chamber. A first plasma is generated at a region separated from the substrate by a first distance. A first process gas is supplied to the first plasma region to perform a pre-treatment process on the substrate. A second plasma is generated at a region separated from the substrate by a second distance different from the first distance. A second process gas is supplied to the second plasma region to perform a deposition process on the substrate.
    Type: Application
    Filed: April 16, 2019
    Publication date: March 5, 2020
    Inventors: Kaoru YAMAMOTO, Chang-Hyun KIM, Hyun-Jae SONG, Keun-Wook SHIN, Hyeon-Jin SHIN, Sung-Joo AN, Chang-Seok LEE, Kee-Young JUN, Geun-O JEONG, Jang-Hee LEE
  • Patent number: 10177261
    Abstract: A transparent electrode on at least one surface of a transparent substrate may include graphene doped with a p-dopant. The transparent electrode may be efficiently applied to a variety of display devices or solar cells.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: January 8, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seon-Mi Yoon, Won-mook Choi, Hyeon-jin Shin, Jae-young Choi
  • Patent number: 10099449
    Abstract: A method of forming a substrate assembly includes preparing a substrate in a chamber, combining a solid-state nitrogen source and a boron source on the substrate, forming a metal layer on a surface of the substrate including the combined solid-state nitrogen and boron sources, and forming a first hexagonal boron nitride sheet directly bonded to the surface of the substrate by performing a heat treatment on the substrate including the metal layer and the combined solid-state nitrogen and boron sources.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: October 16, 2018
    Assignees: SAMSUNG ELECTRONICS CO., LTD., RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Hyeon-jin Shin, Sang-Woo Kim, Jin yeong Lee
  • Patent number: 10071913
    Abstract: A graphene laminate including a substrate, a binder layer on the substrate, and graphene on the binder layer, wherein the graphene is bound to the substrate by the binder layer.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: September 11, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyeon-jin Shin, Jae-young Choi, Gang-hee Han, Young-hee Lee
  • Patent number: 9902619
    Abstract: Provided is a process for economically preparing a graphene shell having a desired configuration which is applicable in various fields wherein in the process the thickness of the graphene shell can be controlled, and a graphene shell prepared by the process.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: February 27, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-young Choi, Hyeon-Jin Shin, Seon-mi Yoon
  • Patent number: 9887020
    Abstract: A composition including graphene; and at least one dopant selected from the group consisting of an organic dopant and an inorganic dopant.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: February 6, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyeon-jin Shin, Won-mook Choi, Jae-young Choi, Seon-mi Yoon
  • Publication number: 20170282502
    Abstract: A substrate assembly includes a first hexagonal boron nitride sheet directly bonded to a surface of a substrate, and a metal layer on the first hexagonal boron nitride sheet.
    Type: Application
    Filed: June 21, 2017
    Publication date: October 5, 2017
    Applicants: Samsung Electronics Co., Ltd., Sungkyunkwan University Foundation for Corporate Collaboration
    Inventors: Hyeon-jin SHIN, Sang-Woo KIM, Jin yeong LEE
  • Patent number: 9738057
    Abstract: A substrate assembly includes a first hexagonal boron nitride sheet directly bonded to a surface of a substrate, and a metal layer on the first hexagonal boron nitride sheet.
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: August 22, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyeon-jin Shin, Sang-Woo Kim, Jin yeong Lee
  • Patent number: 9670590
    Abstract: Provided are a graphene pattern and a process of preparing the same. Graphene is patterned in a predetermined shape on a substrate to form the graphene pattern. The graphene pattern can be formed by forming a graphitizing catalyst pattern on a substrate, contacting a carbonaceous material with the graphitizing catalyst and heat-treating the resultant.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: June 6, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Young Choi, Hyeon-Jin Shin, Seon-mi Yoon
  • Patent number: 9595361
    Abstract: A thin film structure includes a metal seed layer, and a method of forming an oxide thin film on a conductive substrate by using the metal seed layer is disclosed. The thin film structure includes a transparent conductive substrate, a metal seed layer that is deposited on the transparent conductive substrate, and a metal oxide layer that is deposited on the metal seed layer.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: March 14, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyeon-jin Shin, Seong-jun Park, Jae-ho Lee, Seong-Jun Jeong
  • Patent number: 9576916
    Abstract: A high frequency circuit includes a first electronic device, a second electronic device, and a graphene interconnection unit, where at least one of a trench and a via is defined under the graphene interconnection unit.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: February 21, 2017
    Assignees: SAMSUNG ELECTRONICS CO., LTD., INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Hyeon-jin Shin, Jae-young Choi, Seong-chan Jun, Whan-kyun Kim, Hyung-seo Yoon, Ju-yeong Oh, Ju-hwan Lim
  • Patent number: 9534312
    Abstract: A single-crystal graphene sheet includes a polycyclic aromatic molecule wherein a plurality of carbon atoms are covalently bound to each other, the single-crystal graphene sheet comprising between about 1 layer to about 300 layers; and wherein a peak ratio of a Raman D band intensity to a Raman G band intensity is equal to or less than 0.2. Also described is a method for preparing a single-crystal graphene sheet, the method includes forming a catalyst layer, which includes a single-crystal graphitizing metal catalyst sheet; disposing a carbonaceous material on the catalyst layer; and heat-treating the catalyst layer and the carbonaceous material in at least one of an inert atmosphere and a reducing atmosphere. Also described is a transparent electrode including a single-crystal graphene sheet.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: January 3, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-young Choi, Hyeon-Jin Shin, Seon-mi Yoon, Jai-yong Han
  • Patent number: 9527742
    Abstract: Provided are a graphene sheet and a process of preparing the same. Particularly, a process of economically preparing a large-area graphene sheet having a desired thickness and a graphene sheet prepared by the process are provided.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: December 27, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-young Choi, Hyeon-Jin Shin, Seon-mi Yoon