Abstract: In a method of forming a capacitor, a first mold layer pattern including a first insulating material may be formed on a substrate. The first mold layer pattern may have a trench. A supporting layer including a second insulating material may be formed in the trench. The second insulating material may have an etching selectivity with respect to the first insulating material. A second mold layer may be formed on the first mold layer pattern and the supporting layer pattern. A lower electrode may be formed through the second mold layer and the first mold layer pattern. The lower electrode may make contact with a sidewall of the supporting layer pattern. The first mold layer pattern and the second mold layer may be removed. A dielectric layer and an upper electrode may be formed on the lower electrode and the supporting layer pattern.

Abstract: Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.

Abstract: A fabricating method of a semiconductor device includes forming an interlayer insulation layer on a substrate, the interlayer insulation layer including a storage node contact plug, forming an etch stop layer on the interlayer insulation layer, the etch stop layer including a silicon layer or a silicon germanium layer, forming a molding insulation layer on the etch stop layer, forming a hole in the molding insulation layer by selectively etching the molding insulation layer until a portion of the etch stop layer is exposed, forming a first conductive layer conformally on an inner surface of the hole and on a top surface of the molding insulation layer, and forming a metal silicide pattern in a predetermined area of the etch stop layer exposed by the molding insulation layer by annealing the first conductive layer and the etch stop layer.

Abstract: In an etchant for etching a capping layer having etching selectivity with respect to a dielectric layer, the capping layer changes compositions of the dielectric layer, to thereby control a threshold voltage of a gate electrode including the dielectric layer. The etchant includes about 0.01 to 3 percent by weight of an acid, about 10 to 40 percent by weight of a fluoride salt and a solvent. Accordingly, the dielectric layer is prevented from being damaged by the etching process for removing the capping layer and the electric characteristics of the gate electrode are improved.

Abstract: In a method of forming a hole, an insulation layer is formed on a substrate, and a preliminary hole exposing the substrate is formed through the insulation layer. A photosensitive layer pattern including an organic polymer is then formed on the substrate to fill the preliminary hole. An etching gas including hydrogen fluoride (HF) or fluorine (F2) is then provided onto the photosensitive layer pattern to etch the insulation layer so that width of the preliminary hole is increased.

Abstract: In a method of forming a capacitor, a first mold layer pattern including a first insulating material may be formed on a substrate. The first mold layer pattern may have a trench. A supporting layer including a second insulating material may be formed in the trench. The second insulating material may have an etching selectivity with respect to the first insulating material. A second mold layer may be formed on the first mold layer pattern and the supporting layer pattern. A lower electrode may be formed through the second mold layer and the first mold layer pattern. The lower electrode may make contact with a sidewall of the supporting layer pattern. The first mold layer pattern and the second mold layer may be removed. A dielectric layer and an upper electrode may be formed on the lower electrode and the supporting layer pattern.

Abstract: A method of removing a photoresist may include permeating supercritical carbon dioxide into the photoresist on a substrate having a conductive structure including a metal. The photoresist permeating the supercritical carbon dioxide may be easily removable. The photoresist permeating the supercritical carbon dioxide may be removed using a photoresist cleaning solution from the substrate. The photoresist cleaning solution may include an alkanolamine solution of about 8 percent by weight to about 20 percent by weight, a polar organic solution of about 25 percent by weight to about 40 percent by weight, a reducing agent of about 0.5 percent by weight to about 3 percent by weight with the remainder being water. The photoresist may be easily removed without damaging the conductive structure in a plasma process.

Abstract: Provided are an apparatus and method for treating wafers using a supercritical fluid. The wafer treatment apparatus includes a plurality of chambers; a first supply supplying a first fluid in a supercritical state; a second supply supplying a mixture of the first fluid and a second fluid; a plurality of first and second valves; and a controller selecting a first chamber of the plurality of chambers for wafer treatment to control the open/closed state of each of the plurality of first valves so that the first fluid can be supplied only to the first chamber of the plurality of chambers and selecting a second chamber of the plurality of chambers to control the open/closed state of each of the plurality of second valves so that the mixture of the first fluid and a second fluid can be supplied only to the second chamber of the plurality of chambers.

Abstract: In a vertical-type non-volatile memory device, an insulation layer pattern is provided on a substrate, the insulation layer pattern having a linear shape. Single-crystalline semiconductor patterns are provided on the substrate to make contact with both sidewalls of the insulation layer pattern, the single-crystalline semiconductor patterns having a pillar shape that extends in a vertical direction relative to the substrate. A tunnel oxide layer is provided on the single-crystalline semiconductor pattern. A lower electrode layer pattern is provided on the tunnel oxide layer and on the substrate. A plurality of insulation interlayer patterns is provided on the lower electrode layer pattern, the insulation interlayer patterns being spaced apart from one another by a predetermined distance along the single-crystalline semiconductor pattern. A charge-trapping layer and a blocking dielectric layer are sequentially formed on the tunnel oxide layer between the insulation interlayer patterns.

Abstract: Provided are an apparatus and method for treating wafers using a supercritical fluid. The wafer treatment apparatus includes a plurality of chambers; a first supply supplying a first fluid in a supercritical state; a second supply supplying a mixture of the first fluid and a second fluid; a plurality of first and second valves; and a controller selecting a first chamber of the plurality of chambers for wafer treatment to control the open/closed state of each of the plurality of first valves so that the first fluid can be supplied only to the first chamber of the plurality of chambers and selecting a second chamber of the plurality of chambers to control the open/closed state of each of the plurality of second valves so that the mixture of the first fluid and a second fluid can be supplied only to the second chamber of the plurality of chambers.

Abstract: A method of manufacturing a semiconductor device, the method including forming a photoresist film on a substrate, and removing the photoresist film from the substrate using a composition that includes a sulfuric acid solution, a hydrogen peroxide solution, and a corrosion inhibitor.

Abstract: A wet-etch composition may include: peracetic acid (PAA); and a fluorinated acid; a relative amount of the PAA in the composition being sufficient to ensure an etch rate of (P-doped-SiGe):(P-doped-Si) that is substantially the same as an etch rate of (N-doped-SiGe):(N-doped-Si). Such a wet-etch composition is hereafter referred to as a PAA-based etchant and can be used to make, e.g., a CMOS MBCFET, an electrode of a capacitor, etc.

Abstract: A composition for etching a silicon oxide layer, a method of etching a semiconductor device, and a composition for etching a semiconductor device including a silicon oxide layer and a nitride layer including hydrogen fluoride, an anionic polymer, and deionized water, wherein the anionic polymer is included in an amount of about 0.001 to about 2 wt % based on the total weight of the composition for etching a silicon oxide layer, and an etch selectivity of the silicon oxide layer with respect to a nitride layer is about 80 or greater.

Abstract: Provided are a substrate cleaning composition including a fluoride compound, an inorganic acid, and deionized water, and a method of forming a gate using the same. The fluoride compound is one of HF, NH4F, and a combination thereof, and the inorganic acid is one of HNO3, HCl, HCIO4, H2SO4, or H5IO6. The substrate cleaning composition removes polymer by-products generated by etching a metal layer for forming a gate, but not other layers.

Abstract: A method of removing a photoresist may include permeating supercritical carbon dioxide into the photoresist on a substrate having a conductive structure including a metal. The photoresist permeating the supercritical carbon dioxide may be easily removable. The photoresist permeating the supercritical carbon dioxide may be removed using a photoresist cleaning solution from the substrate. The photoresist cleaning solution may include an alkanolamine solution of about 8 percent by weight to about 20 percent by weight, a polar organic solution of about 25 percent by weight to about 40 percent by weight, a reducing agent of about 0.5 percent by weight to about 3 percent by weight with the remainder being water. The photoresist may be easily removed without damaging the conductive structure in a plasma process.

Abstract: Provided are an apparatus and method for treating wafers using a supercritical fluid. The wafer treatment apparatus includes a plurality of chambers; a first supply supplying a first fluid in a supercritical state; a second supply supplying a mixture of the first fluid and a second fluid; a plurality of first and second valves; and a controller selecting a first chamber of the plurality of chambers for wafer treatment to control the open/closed state of each of the plurality of first valves so that the first fluid can be supplied only to the first chamber of the plurality of chambers and selecting a second chamber of the plurality of chambers to control the open/closed state of each of the plurality of second valves so that the mixture of the first fluid and a second fluid can be supplied only to the second chamber of the plurality of chambers.

Abstract: Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.

Abstract: A wet-etch composition may include: peracetic acid (PAA); and a fluorinated acid; a relative amount of the PAA in the composition being sufficient to ensure an etch rate of (P-doped-SiGe):(P-doped-Si) that is substantially the same as an etch rate of (N-doped-SiGe):(N-doped-Si). Such a wet-etch composition is hereafter referred to as a PAA-based etchant and can be used to make, e.g., a CMOS MBCFET, an electrode of a capacitor, etc.

Abstract: Provided are a substrate cleaning composition including a fluoride compound, an inorganic acid, and deionized water, and a method of forming a gate using the same. The fluoride compound is one of HF, NH4F, and a combination thereof, and the inorganic acid is one of HNO3, HCI, HCIO4, H2SO4, or H5IO6. The substrate cleaning composition removes polymer by-products generated by etching a metal layer for forming a gate, but not other layers.

Abstract: A wet-etch composition may include: peracetic acid (PAA); and a fluorinated acid; a relative amount of the PAA in the composition being sufficient to ensure an etch rate of (P-doped-SiGe):(P-doped-Si) that is substantially the same as an etch rate of (N-doped-SiGe):(N-doped-Si). Such a wet-etch composition is hereafter referred to as a PAA-based etchant and can be used to make, e.g., a CMOS MBCFET, an electrode of a capacitor, etc.