Patents by Inventor Hyun Jun Yoon
Hyun Jun Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170125091Abstract: A non-volatile memory device for selectively performing a recovery operation and a method of operating the same are provided. The method of operating a non-volatile memory device includes receiving a first read command, performing a first sensing operation in response to the first read command, and receiving a second read command. The method further includes completing a memory operation corresponding to the first read command without performing a recovery operation when the second read command is received before the first sensing operation is completed, and performing a second sensing operation in response to the second read command.Type: ApplicationFiled: October 7, 2016Publication date: May 4, 2017Inventors: Hyun-Jun Yoon, Jae-Woo Im
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Patent number: 9520168Abstract: A nonvolatile memory device includes a cell array including a plurality of cell strings extending on a substrate in a vertical direction, a page buffer connected to a plurality of bit lines and configured to store sensing data of the cell array in a sensing operation, a voltage generator configured to provide voltages to a plurality of word lines and the plurality of bit lines, and an input/output buffer configured to temporarily store the sensing data received in a data dump from the page buffer and to output the temporarily stored data to an external device. The nonvolatile memory device further includes control logic configured to set a status of the nonvolatile memory device to a ready state after the sensing data is dumped to the input/output buffer and before recovery of the cell array from a bias voltage of the sensing operation is complete.Type: GrantFiled: May 11, 2016Date of Patent: December 13, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Donghun Kwak, Hyun Jun Yoon, Dongkyo Shim
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Publication number: 20160254038Abstract: A nonvolatile memory device includes a cell array including a plurality of cell strings extending on a substrate in a vertical direction, a page buffer connected to a plurality of bit lines and configured to store sensing data of the cell array in a sensing operation, a voltage generator configured to provide voltages to a plurality of word lines and the plurality of bit lines, and an input/output buffer configured to temporarily store the sensing data received in a data dump from the page buffer and to output the temporarily stored data to an external device. The nonvolatile memory device further includes control logic configured to set a status of the nonvolatile memory device to a ready state after the sensing data is dumped to the input/output buffer and before recovery of the cell array from a bias voltage of the sensing operation is complete.Type: ApplicationFiled: May 11, 2016Publication date: September 1, 2016Inventors: DONGHUN KWAK, HYUN JUN YOON, DONGKYO SHIM
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Publication number: 20160240263Abstract: A method of programming a nonvolatile memory device comprises applying at least one test program pulse to selected memory cells located in a scan read area, performing a scan read operation on the selected memory cells following application of the at least one test program pulse to detect at least one one-shot upper cell, calculating an offset voltage corresponding to a scan read region at which the scan read operation is performed, setting a program start bias using the offset voltage, and executing at least one program loop using the program start bias.Type: ApplicationFiled: April 18, 2016Publication date: August 18, 2016Inventors: DONGHUN KWAK, HYUN-WOOK PARK, HYUN JUN YOON, DOOHYUN KIM, KI-TAE PARK
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Patent number: 9406394Abstract: A method of programming a flash memory device comprises programming selected memory cells, performing a verification operation to determine whether the selected memory cells have reached a target program state, and determining a start point of the verification operation based on a programming characteristic associated with a detection of a pass bit during programming of an initial program state.Type: GrantFiled: June 1, 2015Date of Patent: August 2, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Sang Yong Yoon, Ki Tae Park, Moo Sung Kim, Bo Geun Kim, Hyun Jun Yoon
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Patent number: 9368166Abstract: A nonvolatile memory device includes a cell array including a plurality of cell strings extending on a substrate in a vertical direction, a page buffer connected to a plurality of bit lines and configured to store sensing data of the cell array in a sensing operation, a voltage generator configured to provide voltages to a plurality of word lines and the plurality of bit lines, and an input/output buffer configured to temporarily store the sensing data received in a data dump from the page buffer and to output the temporarily stored data to an external device. The nonvolatile memory device further includes control logic configured to set a status of the nonvolatile memory device to a ready state after the sensing data is dumped to the input/output buffer and before recovery of the cell array from a bias voltage of the sensing operation is complete.Type: GrantFiled: January 13, 2014Date of Patent: June 14, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Donghun Kwak, Hyun Jun Yoon, Dongkyo Shim
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Patent number: 9318191Abstract: A method of programming a nonvolatile memory device comprises applying at least one test program pulse to selected memory cells located in a scan read area, performing a scan read operation on the selected memory cells following application of the at least one test program pulse to detect at least one one-shot upper cell, calculating an offset voltage corresponding to a scan read region at which the scan read operation is performed, setting a program start bias using the offset voltage, and executing at least one program loop using the program start bias.Type: GrantFiled: August 19, 2013Date of Patent: April 19, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Dong-Hun Kwak, Hyun-Wook Park, Hyun Jun Yoon, Doohyun Kim, Ki-Tae Park
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Patent number: 9251904Abstract: A nonvolatile memory device may include a memory cell array which is arranged in rows and columns and has multi-level memory cells; a voltage generator providing a plurality of read voltages to a selected row of the memory cell array; and control logic performing a plurality of page read operations using the read voltages. A first read voltage and a second read voltage among the plurality of read voltages are each associated with a higher probability of occurrence of a bit read error than at least one other read voltage among the plurality of read voltages. The control logic uses the first read voltage and the second read voltage in different page read operations than each other.Type: GrantFiled: August 13, 2014Date of Patent: February 2, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Doohyun Kim, Hyun Jun Yoon, Donghun Kwak, Kitae Park, Changyeon Yu
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Patent number: 9202587Abstract: A method of programming a nonvolatile memory device comprises performing an N-th program loop based on state data stored in data latches according to a default state ordering, determining whether conversion of the default state ordering is required according to a predetermined criterion, as a consequence of determining that conversion of the default state ordering is required, converting all or part of the state data stored in the data latches from the default state ordering to another state ordering, and performing a (N+1)th program loop based on the converted state data.Type: GrantFiled: May 15, 2014Date of Patent: December 1, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Jonghoo Jo, Hyun Jun Yoon, Kitae Park, Dongkyo Shim
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Patent number: 9177660Abstract: A method of operating a memory device includes changing a first read voltage, which determines a first voltage state or a second voltage state, to a voltage within a first range and determining the voltage as a first select read voltage, and changing a second read voltage, which is used to determine whether the data stored in the memory cells is a third different voltage state or a fourth different voltage state, to a voltage within a second different range and determining the voltage as a second select read voltage. The first voltage state overlaps the second voltage. The third voltage state overlaps the fourth voltage state. A difference between a voltage at an intersection of the third and fourth voltage states and the second read voltage is greater than a difference between a voltage at an intersection of the first and second voltage states and the first read voltage.Type: GrantFiled: November 1, 2013Date of Patent: November 3, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-Jun Yoon, Jae-Yong Jeong, Myung-Hoon Choi, Bo-Geun Kim, Ki-Tae Park
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Patent number: 9147483Abstract: A memory device useable with a memory system includes a voltage generator to a plurality of first candidate voltages and a plurality of second candidate voltages, and an X decoder to sequentially apply each of the plurality of first candidate voltages and each of the plurality of second candidate voltages to one or more cells of a memory cell array, and then to apply one of the plurality of first candidate voltages and one of the plurality of second candidate voltages as a first read voltage and a second voltage, respectively, to read data from the cells of the memory cell array according to a characteristic of the cells of the memory cell array.Type: GrantFiled: October 31, 2013Date of Patent: September 29, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-Jun Yoon, Jae-Yong Jeong, Myoung-Hoon Choi, Bo-Geun Kim, Ki-Tae Park
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Publication number: 20150262700Abstract: A method of programming a flash memory device comprises programming selected memory cells, performing a verification operation to determine whether the selected memory cells have reached a target program state, and determining a start point of the verification operation based on a programming characteristic associated with a detection of a pass bit during programming of an initial program state.Type: ApplicationFiled: June 1, 2015Publication date: September 17, 2015Inventors: SANG YONG YOON, KI TAE PARK, MOO SUNG KIM, BO GEUN KIM, HYUN JUN YOON
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Patent number: 9117536Abstract: An operating method for a non-volatile memory device includes applying first and second read voltages to a first word line to perform a read operation; counting first memory cells each having a threshold voltage belonging to a first voltage range between the first read voltage and the second read voltage; applying a third read voltage to the first word line sequentially after applying the second read voltage to count second memory cells each having a second threshold voltage belonging to a voltage range between the second read voltage and the third read voltage; comparing the number of first memory cells counted and the number of second memory cells counted; determining a fourth read voltage based on a result of the comparing; and applying the fourth read voltage to the first word line sequentially after applying the third read voltage.Type: GrantFiled: November 25, 2013Date of Patent: August 25, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Jun Yoon, Jaeyong Jeong, Myung-Hoon Choi, Kitae Park
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Patent number: 9076534Abstract: A method of programming a flash memory device comprises programming selected memory cells, performing a verification operation to determine whether the selected memory cells have reached a target program state, and determining a start point of the verification operation based on a programming characteristic associated with a detection of a pass bit during programming of an initial program state.Type: GrantFiled: March 15, 2013Date of Patent: July 7, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Sang Yong Yoon, Ki Tae Park, Moo Sung Kim, Bo Geun Kim, Hyun jun Yoon
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Publication number: 20150179272Abstract: A nonvolatile memory device may include a memory cell array which is arranged in rows and columns and has multi-level memory cells; a voltage generator providing a plurality of read voltages to a selected row of the memory cell array; and control logic performing a plurality of page read operations using the read voltages. A first read voltage and a second read voltage among the plurality of read voltages are each associated with a higher probability of occurrence of a bit read error than at least one other read voltage among the plurality of read voltages. The control logic uses the first read voltage and the second read voltage in different page read operations than each other.Type: ApplicationFiled: August 13, 2014Publication date: June 25, 2015Inventors: DOOHYUN KIM, HYUN JUN YOON, DONGHUN KWAK, KITAE PARK, CHANGYEON YU
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Publication number: 20150049545Abstract: A method of programming a nonvolatile memory device comprises performing an N-th program loop based on state data stored in data latches according to a default state ordering, determining whether conversion of the default state ordering is required according to a predetermined criterion, as a consequence of determining that conversion of the default state ordering is required, converting all or part of the state data stored in the data latches from the default state ordering to another state ordering, and performing a (N+1)th program loop based on the converted state data.Type: ApplicationFiled: May 15, 2014Publication date: February 19, 2015Inventors: JONGHOO JO, HYUN JUN YOON, KITAE PARK, DONGKYO SHIM
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Publication number: 20140204684Abstract: A nonvolatile memory device includes a cell array including a plurality of cell strings extending on a substrate in a vertical direction, a page buffer connected to a plurality of bit lines and configured to store sensing data of the cell array in a sensing operation, a voltage generator configured to provide voltages to a plurality of word lines and the plurality of bit lines, and an input/output buffer configured to temporarily store the sensing data received in a data dump from the page buffer and to output the temporarily stored data to an external device. The nonvolatile memory device further includes control logic configured to set a status of the nonvolatile memory device to a ready state after the sensing data is dumped to the input/output buffer and before recovery of the cell array from a bias voltage of the sensing operation is complete.Type: ApplicationFiled: January 13, 2014Publication date: July 24, 2014Inventors: DONGHUN KWAK, HYUN JUN YOON, DONGKYO SHIM
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Publication number: 20140153330Abstract: An operating method for a non-volatile memory device includes applying first and second read voltages to a first word line to perform a read operation; counting first memory cells each having a threshold voltage belonging to a first voltage range between the first read voltage and the second read voltage; applying a third read voltage to the first word line sequentially after applying the second read voltage to count second memory cells each having a second threshold voltage belonging to a voltage range between the second read voltage and the third read voltage; comparing the number of first memory cells counted and the number of second memory cells counted; determining a fourth read voltage based on a result of the comparing; and applying the fourth read voltage to the first word line sequentially after applying the third read voltage.Type: ApplicationFiled: November 25, 2013Publication date: June 5, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: HYUN JUN YOON, JAEYONG JEONG, MYUNG-HOON CHOI, KITAE PARK
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Publication number: 20140129902Abstract: A memory device useable with a memory system includes a voltage generator to a plurality of first candidate voltages and a plurality of second candidate voltages, and an X decoder to sequentially apply each of the plurality of first candidate voltages and each of the plurality of second candidate voltages to one or more cells of a memory cell array, and then to apply one of the plurality of first candidate voltages and one of the plurality of second candidate voltages as a first read voltage and a second voltage, respectively, to read data from the cells of the memory cell array according to a characteristic of the cells of the memory cell array.Type: ApplicationFiled: October 31, 2013Publication date: May 8, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Hyun-Jun YOON, Jae-Yong JEONG, Myoung-Hoon CHOI, Bo-Geun KIM, Ki-Tae PARK
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Publication number: 20140129903Abstract: A method of operating a memory device includes changing a first read voltage, which determines a first voltage state or a second voltage state, to a voltage within a first range and determining the voltage as a first select read voltage, and changing a second read voltage, which is used to determine whether the data stored in the memory cells is a third different voltage state or a fourth different voltage state, to a voltage within a second different range and determining the voltage as a second select read voltage. The first voltage state overlaps the second voltage. The third voltage state overlaps the fourth voltage state. A difference between a voltage at an intersection of the third and fourth voltage states and the second read voltage is greater than a difference between a voltage at an intersection of the first and second voltage states and the first read voltage.Type: ApplicationFiled: November 1, 2013Publication date: May 8, 2014Applicant: Samsung Electronics Co., LtdInventors: Hyun-Jun YOON, Jae-Yong JEONG, Myung-Hoon CHOI, Bo-Geun KIM, Ki-Tae PARK,