Abstract: Disclosed is a display device including an IR receiving module configured to receive an IR signal including at least one of a control signal, a noise signal, and a modified signal from the outside, a filter module configured to output an output signal by filtering the modified signal at each filtering period, and a controller configured to obtain a period of the noise signal and set the filtering period based on the obtained period.

Abstract: A method and a system provide a computing device for each computing power based on prediction of computing power required for fully homomorphic encryption in a cloud environment. A computing device providing method may be performed by a computer device including at least one processor. The computer device may implement at least one node included in the cloud environment. The computing device providing method may include providing, to a client device, a management tool including an application function of a computing device that processes a homomorphic encryption operation, and recommending the computing device for processing of the homomorphic encryption operation requested through the management tool.

Abstract: A pseudonym certificate management method, performed by a pseudonym certificate management apparatus interworking with an external server, may comprise: receiving, from the external server, a pseudonym certificate in a state locked based on a root value identifiable only by the external server; periodically receiving an unlocking key for the pseudonym certificate from the external server; activating the pseudonym certificate with the unlocking key; and when the activated pseudonym certificate is abnormal, deactivating the pseudonym certificate.

Abstract: A pseudonym certificate management method, performed by a pseudonym certificate management apparatus interworking with an external server, may comprise: receiving, from the external server, a pseudonym certificate in a state locked based on a root value identifiable only by the external server; periodically receiving an unlocking key for the pseudonym certificate from the external server; activating the pseudonym certificate with the unlocking key; and when the activated pseudonym certificate is abnormal, deactivating the pseudonym certificate.

Abstract: Provided is a fabricating method of a pattern, which includes preparing a first substrate having a first width and a first thickness, stretching the first substrate and preparing a second substrate having a second width and a second thickness, forming a base layer made of a material of a pattern which will be formed on the second substrate, removing a predetermined region of the base layer and forming a first pattern having a first line width and a first height on the second substrate, and removing a tensile force applied to the second substrate to restore the second substrate back to being the first substrate and forming a second pattern having a second line width and a second height on the first substrate.

Abstract: A semiconductor device is disclosed. The semiconductor device including writing and reading gate electrodes respectively on first and second active regions on a substrate, a first gate insulation pattern between the first active region and the writing gate electrode, a second gate insulation pattern between the second active region and the reading gate electrode, first and second source/drain junction regions in the first and second active regions at sides of the writing and reading gate electrodes, and a connection structure that connects the first and second source/drain junction regions. The first active region has the same conductivity type as the source/drain junction regions. The second active region has a different conductivity type from the source/drain junction regions.

Abstract: Provided is a fabricating method of a pattern, which includes preparing a first substrate having a first width and a first thickness, stretching the first substrate and preparing a second substrate having a second width and a second thickness, forming a base layer made of a material of a pattern which will be formed on the second substrate, removing a predetermined region of the base layer and forming a first pattern having a first line width and a first height on the second substrate, and removing a tensile force applied to the second substrate to restore the second substrate back to being the first substrate and forming a second pattern having a second line width and a second height on the first substrate.

Abstract: A semiconductor device includes a first connecting member having a first electrode, a second connecting member having a second electrode, and an anisotropic conductive film between the first connecting member and the second connecting member, the anisotropic conductive film electrically connecting the first and second electrodes to each other. The anisotropic conductive film includes a polymer binder resin, an epoxy resin, conductive particles, and a curing agent. The epoxy resin includes a naphthalene ring-containing epoxy resin and a dicyclopentadiene ring-containing epoxy resin. The naphthalene ring-containing epoxy resin is included in an amount of 100 parts by weight to 500 parts by weight based on 100 parts by weight of the dicyclopentadiene ring-containing epoxy resin.

Abstract: A memory device including one-time programmable memory cells has a semiconductor substrate with a write region and a read region, a write gate provided on the write region, a read gate provided on the read region, first and second junction patterns provided at both sides of the read gate, and insulating dielectric patterns interposed between the write and read gates and the semiconductor substrate. The read region may have a different conductivity type from the first and second junction patterns, and the write region may have the same conductivity type as the first and second junction patterns.

Abstract: An eFuse structure of a semiconductor device may include a first metal formed at a first level on a substrate, a second metal formed at a second level between the first level and the substrate, a third metal formed at a third level between the second level and the substrate, a first via connecting the first metal to the second metal, and a second via connecting the second metal to the third metal. The first metal may include a first portion extending in a first direction, a second portion extending in the first direction and being adjacent to the first portion, and a third portion connecting the first portion to the second portion. A first distance between the first portion and the second portion may be greater than a width of the second portion in a second direction perpendicular to the first direction.

Abstract: In a semiconductor device and a method of manufacturing the same a fuse structure may be formed during formation of first to third contact plugs connected to a transistor. The fuse structure may include first and second fuse contact plugs having the same height as the first and second contact plugs, and a connection pattern having the same height as the third contact plug. The connection pattern may be connected between the first and second fuse contact plugs.

Abstract: A one time programmable (OTP) memory device, a method of manufacturing the same, and an electronic device including the same, which lower a programming voltage to enhance programming efficiency, increase reliability of peripheral input/output (I/O) elements used for a design of the OTP memory device, and simplify the design, are provided. The OTP memory device includes a transistor including one of a first gate structure including a high-k dielectric layer, a rare earth element (RE) supply layer, and a second metal layer, a second gate structure including the high-k dielectric layer, a first metal layer, and the second metal layer, and a third gate structure including the high-k dielectric layer and the second metal layer.

Abstract: A method, device, a non-transitory computer-readable recording medium for controlling a voice signal by an electronic device including a first microphone, a second microphone, a communication interface, and a processor are provided. The method includes acquiring a first voice signal by using the first microphone; acquiring a second voice signal by using the second microphone; confirming a telephone call mode for performing, by the electronic device, a telephone call with an external electronic device; adjusting a first output attribute corresponding to the first voice signal or a second output attribute corresponding to the second voice signal, based on the telephone call mode; and transmitting the adjusted first voice signal or the adjusted second voice signal to the external electronic device by using the communication interface.

Abstract: An eFuse structure of a semiconductor device may include a first metal formed at a first level on a substrate, a second metal formed at a second level between the first level and the substrate, a third metal formed at a third level between the second level and the substrate, a first via connecting the first metal to the second metal, and a second via connecting the second metal to the third metal. The first metal may include a first portion extending in a first direction, a second portion extending in the first direction and being adjacent to the first portion, and a third portion connecting the first portion to the second portion. A first distance between the first portion and the second portion may be greater than a width of the second portion in a second direction perpendicular to the first direction.

Abstract: An electronic device is provided. The electronic includes a camera module and a processor configured to capture at least one image of an object using the camera module, obtain a sound using a microphone operably connected to the processor when the at least one image is captured, determine whether the sound is related to the object, when the sound is determined to be unrelated to the object, change at least one attribute of the sound and store the changed at least one attribute of the sound.

Abstract: An eFuse structure of a semiconductor device may include a first metal formed at a first level on a substrate, a second metal formed at a second level between the first level and the substrate, a third metal formed at a third level between the second level and the substrate, a first via connecting the first metal to the second metal, and a second via connecting the second metal to the third metal. The first metal may include a first portion extending in a first direction, a second portion extending in the first direction and being adjacent to the first portion, and a third portion connecting the first portion to the second portion. A first distance between the first portion and the second portion may be greater than a width of the second portion in a second direction perpendicular to the first direction.

Abstract: Provided is an e-fuse structure of a semiconductor device having improved fusing performance so as to enable a program operation at a low voltage. The e-fuse structure includes a first metal pattern formed at a first vertical level, the first metal pattern including a first part extending in a first direction and a second part extending in the first direction and positioned to be adjacent to the first part, and a third part adjacent to the second part, the second part being positioned between the first part and the third part, the first part and the second part being electrically connected to each other, and the third part being electrically disconnected from the second part; and a second metal pattern electrically connected to the first metal pattern and formed at a second vertical level different from the first vertical level.

Abstract: The inventive concepts provide semiconductor devices and methods of manufacturing the same. One semiconductor device includes a substrate, a device isolation layer disposed on the substrate, a fin-type active pattern defined by the device isolation layer and having a top surface higher than a top surface of the device isolation layer, a first conductive line disposed on an edge portion of the fin-type active pattern and on the device isolation layer adjacent to the edge portion of the fin-type active pattern, and an insulating thin layer disposed between the fin-type active pattern and the first conductive line. The first conductive line forms a gate electrode of an anti-fuse that may be applied with a write voltage.

Abstract: Provided is an e-fuse structure of a semiconductor device having improved fusing performance so as to enable a program operation at a low voltage. The e-fuse structure includes a first metal pattern formed at a first vertical level, the first metal pattern including a first part extending in a first direction and a second part extending in the first direction and positioned to be adjacent to the first part, and a third part adjacent to the second part, the second part being positioned between the first part and the third part, the first part and the second part being electrically connected to each other, and the third part being electrically disconnected from the second part; and a second metal pattern electrically connected to the first metal pattern and formed at a second vertical level different from the first vertical level.

Abstract: A semiconductor device is disclosed. The semiconductor device including writing and reading gate electrodes respectively on first and second active regions on a substrate, a first gate insulation pattern between the first active region and the writing gate electrode, a second gate insulation pattern between the second active region and the reading gate electrode, first and second source/drain junction regions in the first and second active regions at sides of the writing and reading gate electrodes, and a connection structure that connects the first and second source/drain junction regions. The first active region has the same conductivity type as the source/drain junction regions. The second active region has a different conductivity type from the source/drain junction regions.