Abstract: A method of fabricating a semiconductor memory device includes forming a first insulating layer and a sacrificial layer on a substrate. The first insulating layer and the sacrificial layer have an opening therein. A first conductive layer is formed in the opening and on the sacrificial layer. A second insulating layer is formed on the first conductive layer. The second insulating layer, the first conductive layer and the sacrificial layer are then planarized until the first insulating layer is exposed, thereby forming a first conductive pattern and a second insulating layer pattern in the opening. A phase change material layer is formed on the first conductive pattern, the first insulating layer and the second insulating layer pattern. A second conductive pattern is formed on the phase change material layer. A semiconductor memory device and a data processing system adopting the semiconductor memory device are also provided.

Abstract: A method for forming a tungsten contact plug of a semiconductor device including depositing an insulating layer on a semiconductor substrate, etching the insulating layer to form a contact hole, which exposes a conductive region, forming a barrier layer on the semiconductor substrate having the contact hole, changing characteristics of a portion of the barrier layer on the insulating layer and the portion of the barrier layer in the contact hold such that the characteristics between the barrier layer on the insulating layer and the barrier layer in the contact hole differ, depositing a tungsten layer for forming the tungsten contact plug, on the barrier layer, and removing the tungsten layer from the upper portion of the insulating layer to planarize the semiconductor device.

Abstract: A semiconductor device fabrication apparatus is cleaned after a conductive layer is formed on a metal oxide layer of a substrate. The substrate is disposed on a heater in a process chamber of the apparatus, and the conductive layer is formed by introducing source gases into the chamber. Then the substrate is transferred out of the process chamber. At least one by-product of a reaction between the source gases and the metal oxide layer adheres to a surface inside the chamber, such as to a region or regions of the heater. Once the semiconductor substrate has been transferred outside the process chamber of the semiconductor fabrication apparatus, the by-product(s) is/are removed by evaporation. The by-product(s) can be evaporated using gas, such as one of the source gases, so that the process chamber can remain closed.

Abstract: A semiconductor device fabrication apparatus is cleaned after a conductive layer is formed on a metal oxide layer of a substrate. The substrate is disposed on a heater in a process chamber of the apparatus, and the conductive layer is formed by introducing source gases into the chamber. Then the substrate is transferred out of the process chamber. At least one by-product of a reaction between the source gases and the metal oxide layer adheres to a surface inside the chamber, such as to a region or regions of the heater. Once the semiconductor substrate has been transferred outside the process chamber of the semiconductor fabrication apparatus, the by-product(s) is/are removed by evaporation. The by-product(s) can be evaporated using gas, such as one of the source gases, so that the process chamber can remain closed.

Abstract: In a method of manufacturing a capacitor including a hemispherical grain (HSG) silicon layer, after forming a storage electrode electrically coupled to a contact region of a substrate, the HSG silicon layer is formed on the storage electrode by providing a first gas including silicon and a second gas onto a surface of the storage electrode with a volume ratio of about 1.0:0.1 to about 1.0:5.0. A dielectric layer and a plate electrode are sequentially formed on the HSG silicon layer. A grain size of the HSG silicon layer may be easily adjusted and abnormal growths of the HSG at a lower portion of the storage electrode may be suppressed. Therefore, the HSG silicon layer may be uniformly formed on the storage electrode, and a structural stability of the storage electrode may be improved to prevent electrical defects of the capacitor.

Abstract: In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first sub-electrode is formed on a surface of the dielectric layer along the profile of the lower electrode and a second sub-electrode is continuously formed on the first sub-electrode corresponding to the top surface of the lower electrode, so an opening portion of the lower electrode is covered with the second sub-electrode. The first and second sub-electrodes include first and second metal nitride layers in which first and second stresses are applied, respectively. Directions of the first and second stresses are opposite to each other. Accordingly, cracking is minimized in the upper electrode with the high dielectric constant, thereby reducing current leakage.

Abstract: A method of forming a titanium nitride layer by an atomic layer deposition process using a batch-type vertical reaction furnace is described wherein a first source gas including a titanium precursor is provided onto substrates loaded in a process chamber for a first time period; a first purge gas is introduced into the process chamber for a second time period shorter than the first time period; a second source gas including nitrogen is provided onto the substrates for a third time period substantially identical to the first time period; and, a second purge gas is introduced into the process chamber for a fourth time period substantially identical to the second time period. Titanium nitride layers having uniform thickness and good step coverage may thus be formed while realizing a greatly reduced manufacturing time.

Abstract: Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening therethrough on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

Abstract: A method of fabricating a storage capacitor includes depositing a first titanium nitride layer on a dielectric layer using a chemical vapor deposition technique or an atomic layer deposition technique performed at a first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas at a predetermined flow ratio and depositing a second titanium nitride layer on the first titanium nitride layer using a chemical vapor deposition process performed at a second temperature that is greater than the first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas.

Abstract: A method for forming a tungsten contact plug of a semiconductor device including depositing an insulating layer on a semiconductor substrate, etching the insulating layer to form a contact hole, which exposes a conductive region, forming a barrier layer on the semiconductor substrate having the contact hole, changing characteristics of a portion of the barrier layer on the insulating layer and the portion of the barrier layer in the contact hold such that the characteristics between the barrier layer on the insulating layer and the barrier layer in the contact hole differ, depositing a tungsten layer for forming the tungsten contact plug, on the barrier layer, and removing the tungsten layer from the upper portion of the insulating layer to planarize the semiconductor device.

Abstract: A semiconductor device fabrication apparatus is cleaned after a conductive layer is formed on a metal oxide layer of a substrate. The substrate is disposed on a heater in a process chamber of the apparatus, and the conductive layer is formed by introducing source gases into the chamber. Then the substrate is transferred out of the process chamber. At least one by-product of a reaction between the source gases and the metal oxide layer adheres to a surface inside the chamber, such as to a region or regions of the heater. Once the semiconductor substrate has been transferred outside the process chamber of the semiconductor fabrication apparatus, the by-product(s) is/are removed by evaporation. The by-product(s) can be evaporated using gas, such as one of the source gases, so that the process chamber can remain closed.

Abstract: A preliminary metal layer having a first thickness is formed on a substrate. A surface of the preliminary metal layer having uneven portions is etched to remove the uneven portions and to form a metal layer having an improved surface morphology. Therefore, shorts caused by the surface morphology of a metal layer occur less frequently and the semiconductor fabricating yield improves.

Abstract: The present invention discloses a method of manufacturing a semiconductor device having an upper capacitor electrode and a node resistor, including depositing a thin film at a first deposition rate on an edge portion of a wafer and at a second deposition rate on a central portion of the wafer to form the upper capacitor electrode and the node resistor, thereby improving step coverage of the upper capacitor electrode while simultaneously improving resistance distribution of the node resistor.

Abstract: Semiconductor films include insulating films including contact holes in semiconductor substrates, capacitors comprising lower electrodes formed on conductive material films in the contact holes, high dielectric films formed on the lower electrodes and upper electrodes formed on the high dielectric films, and barrier metal layers positioned between conductive materials in the contact holes and the lower electrodes, the barrier metal layers including metal layers formed in A-B-N structures in which a plurality of atomic layers are stacked by alternatively depositing reactive metal (A), an amorphous combination element (B) for preventing crystallization of the reactive metal (A) and nitrogen (N). The composition ratios of the barrier metal layers are determined by the number of depositions of the atomic layers.

Abstract: The present invention discloses a method of manufacturing a semiconductor device having an upper capacitor electrode and a node resistor, including depositing a thin film at a first deposition rate on an edge portion of a wafer and at a second deposition rate on a central portion of the wafer to form the upper capacitor electrode and the node resistor, thereby improving step coverage of the upper capacitor electrode while simultaneously improving resistance distribution of the node resistor.

Abstract: A method of manufacturing a barrier metal layer uses atomic layer deposition (ALD) as the mechanism for depositing the barrier metal. The method includes supplying a first source gas onto the entire surface of a semiconductor substrate in the form of a pulse, and supplying a second source gas, which reacts with the first source gas, onto the entire surface of the semiconductor substrate in the form of a pulse. In a first embodiment, the pulses overlap in time so that the second source gas reacts with part of the first source gas physically adsorbed at the surface of the semiconductor substrate to thereby form part of the barrier metal layer by chemical vapor deposition whereas another part of the second source gas reacts with the first source gas chemically adsorbed at the surface of the semiconductor substrate to thereby form part of the barrier metal layer by atomic layer deposition. Thus, the deposition rate is greater than if the barrier metal layer were only formed by ALD.

Abstract: A method of manufacturing a barrier metal layer uses atomic layer deposition (ALD) as the mechanism for depositing the barrier metal. The method includes supplying a first source gas onto the entire surface of a semiconductor substrate in the form of a pulse, and supplying a second source gas, which reacts with the first source gas, onto the entire surface of the semiconductor substrate in the form of a pulse. In a first embodiment, the pulses overlap in time so that the second source gas reacts with part of the first source gas physically adsorbed at the surface of the semiconductor substrate to thereby form part of the barrier metal layer by chemical vapor deposition whereas another part of the second source gas reacts with the first source gas chemically adsorbed at the surface of the semiconductor substrate to thereby form part of the barrier metal layer by atomic layer deposition. Thus, the deposition rate is greater than if the barrier metal layer were only formed by ALD.

Abstract: A method for forming a metal interconnection filling a contact hole or a groove having a high aspect ratio, and a contact structure fabricated thereby. An interdielectric layer pattern, having a recessed region serving as a contact hole, a via hole or a groove, is formed on a semiconductor substrate. A barrier metal layer is formed on the entire surface of the resultant structure where the interdielectric layer pattern is formed. An anti-nucleation layer is selectively formed only on the non-recessed region of the barrier metal layer. The anti-nucleation layer is formed by forming a metal layer overlying the barrier metal layer in regions other than the recessed region, and then spontaneously oxidizing the metal layer in a vacuum. Also, the anti-nucleation layer may be formed by in-situ forming the barrier metal layer and the metal layer and then oxidizing the metal layer by an annealing process.

Abstract: A selective metal layer formation method, a capacitor formation method using the same, and a method of forming an ohmic layer on a contact hole and filling the contact hole using the same, are provided. A sacrificial metal layer is selectively deposited on a conductive layer by supplying a sacrificial metal source gas which deposits selectively on a semiconductor substrate having an insulating film and the conductive layer. Sacrificial metal atoms and a halide are formed, and the sacrificial metal layer is replaced with a deposition metal layer such as titanium Ti or platinum Pt, by supplying a metal halide gas having a halogen coherence smaller than the halogen coherence of the metal atoms in the sacrificial metal layer. If such a process is used to form a capacitor lower electrode or form an ohmic layer on the bottom of a contact hole, a metal layer can be selectively formed at a temperature of 500° C. or lower.

Abstract: A method for fabricating a semiconductor device having an aluminum (Al) interconnection layer with excellent surface morphology forms an interface control layer having a plurality of atomic layers before forming the Al interconnection layer. In the fabrication method, an interlayer dielectric (ILD) film having a contact hole which exposes a conductive region of the semiconductor substrate is formed on a semiconductor substrate, and an interface control layer having a plurality of atomic layers continuously deposited is formed on the inner wall of the contact hole and the upper surface of the interlayer dielectric film, to a thickness on the order of several angstroms to several tens of angstroms. Then, chemical vapor deposition (CVD) completes an Al blanket deposition on the resultant structure, including the interface control layer, to form a contact plug in the contact hole and an interconnection layer on the interlayer dielectric film.