Patents by Inventor Hyung Dong Lee

Hyung Dong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • TEST CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND SEMICONDUCTOR MEMORY SYSTEM INCLUDING THE SAME
    Publication number: 20140006863
    Abstract: A semiconductor memory apparatus includes a test circuit configured to receive a plurality of sequentially-changing test input patterns, compress the received test input patterns at each clock signal, and output the compressed patterns as variable test data.
    Type: Application
    Filed: December 10, 2012
    Publication date: January 2, 2014
    Applicant: SK Hynix Inc.
    Inventors: Hyung Gyun YANG, Hyung Dong LEE, Yong Kee KWON, Young Suk MOON
  • SEMICONDUCTOR DEVICE INCLUDING ECC CIRCUIT
    Publication number: 20140006902
    Abstract: Disclosed is a semiconductor device including an ECC circuit for improving error correction capability. A semiconductor device in accordance with an embodiment of the present invention includes a memory region configured to include a plurality of banks and a redundancy region within each of the banks and an error check and correction (ECC) region configured to detect an address of the memory region at which an error has occurred and correct a defect of the memory region by replacing the address at which the error has occurred with a redundancy line of the redundancy region based on address information.
    Type: Application
    Filed: December 11, 2012
    Publication date: January 2, 2014
    Applicant: SK HYNIX INC.
    Inventors: Hyung Gyun YANG, Hyung Dong LEE, Yong Kee KWON, Young Suk MOON
  • Semiconductor apparatus
    Patent number: 8618541
    Abstract: A semiconductor apparatus includes first and second vias, a first circuit unit, a second circuit unit and a third circuit unit. The first and second vias electrically connect a first chip and a second chip with each other. The first circuit unit is disposed in the first chip, receives test data, and is connected with the first via. The second circuit unit is disposed in the first chip, and is connected with the second via and the first circuit unit. The third circuit unit is disposed in the second chip, and is connected with the first via. The first circuit unit outputs an output signal thereof to one of the first via and the second circuit unit in response to a first control signal.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: December 31, 2013
    Assignee: SK Hynix Inc.
    Inventors: Hyung Gyun Yang, Hyung Dong Lee, Yong Kee Kwon, Young Suk Moon, Sung Wook Kim
  • SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF
    Publication number: 20130326163
    Abstract: A semiconductor device includes a controller configured to control a first memory device to process a request for the first memory device. The controller receives the request for the first memory device, determines a data damage risk of cells connected to one or more second signal lines adjacent to a first signal line of the first memory device corresponding to a requested address by referring to information indicating a data damage risk, and restore data in one or more cells of the cells connected to the second signal line when determining that there is the data damage risk.
    Type: Application
    Filed: June 3, 2013
    Publication date: December 5, 2013
    Inventors: Young-Suk MOON, Hyung-Dong LEE, Yong-Kee KWON, Hong-Sik KIM
  • SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF
    Publication number: 20130326267
    Abstract: A semiconductor device includes a controller configured to receive a request for a first memory device, determine whether or not a multi-bit error has occurred at a requested address of the first memory device, and process the request on a second memory device instead of the first memory device, when the multi-bit error has occurred.
    Type: Application
    Filed: June 3, 2013
    Publication date: December 5, 2013
    Inventors: Young-Suk MOON, Hyung-Dong LEE, Yong-Kee KWON, Hong-Sik KIM, Hyung-Gyun YANG, Joon-Woo KIM
  • SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF
    Publication number: 20130326162
    Abstract: A semiconductor device includes a controller configured to control a first memory device to process a request for the first memory device and a second memory device. The controller receives the request for the first memory device, determines a data damage risk of cells connected to a second signal line adjacent to a first signal line of the first memory device corresponding to a requested address by referring to information indicating a data damage risk, and stores data of the cells connected to the second signal line in the second memory device when determining that there is a data damage risk.
    Type: Application
    Filed: June 3, 2013
    Publication date: December 5, 2013
    Inventors: Young-Suk MOON, Hyung-Dong LEE, Yong-Kee KWON, Hong-Sik KIM, Hyung-Gyun YANG
  • RESISTIVE MEMORY DEVICE
    Publication number: 20130299770
    Abstract: A resistive memory device includes: a memory cell comprising first and second electrodes and a resistive layer formed therebetween, wherein the resistive layer is formed of a resistance change material; and a strained film formed adjacent to the resistive layer and configured to apply a strain to the resistive layer.
    Type: Application
    Filed: August 27, 2012
    Publication date: November 14, 2013
    Inventors: Sung-Joon YOON, Hyung-Dong LEE
  • TEST CIRCUIT, MEMORY SYSTEM, AND TEST METHOD OF MEMORY SYSTEM
    Publication number: 20130246867
    Abstract: This technology relates to smoothly performing a test on a memory circuit having a high memory capacity while reducing the size of a test circuit. A test circuit according to the present invention includes a test execution unit configured to perform a test on a target test memory circuit, an internal storage unit configured to store data for the test execution unit, and a conversion setting unit configured to set a part of or the entire storage space of the target test memory circuit as an external storage unit for storing the data for the test execution unit.
    Type: Application
    Filed: September 5, 2012
    Publication date: September 19, 2013
    Inventors: Hyung-Gyun YANG, Hyung-Dong LEE, Yong-Kee KWON, Young-Suk MOON, Hong-Sik KIM
  • Semiconductor system, semiconductor memory apparatus, and method for input/output of data using the same
    Patent number: 8531896
    Abstract: A semiconductor system, a semiconductor memory apparatus, and a method for input/output of data using the same are disclosed. The semiconductor system includes a controller and a memory apparatus where the controller is configured to transmit a clock signal, a data output command, an address signal, and a second strobe signal to a memory apparatus. The memory apparatus is configured to provide data to the controller in synchronization with the second strobe signal, and in response to the clock signal, the data output command, the address signal, and the second strobe signal received from the controller.
    Type: Grant
    Filed: August 27, 2011
    Date of Patent: September 10, 2013
    Assignee: SK Hynix Inc.
    Inventors: Yong Kee Kwon, Hyung Dong Lee, Young Suk Moon, Hyung Gyun Yang, Sung Wook Kim
  • SEMICONDUCTOR APPARATUS
    Publication number: 20130092936
    Abstract: A semiconductor apparatus includes first and second vias, a first circuit unit, a second circuit unit and a third circuit unit. The first and second vias electrically connect a first chip and a second chip with each other. The first circuit unit is disposed in the first chip, receives test data, and is connected with the first via. The second circuit unit is disposed in the first chip, and is connected with the second via and the first circuit unit. The third circuit unit is disposed in the second chip, and is connected with the first via. The first circuit unit outputs an output signal thereof to one of the first via and the second circuit unit in response to a first control signal.
    Type: Application
    Filed: December 30, 2011
    Publication date: April 18, 2013
    Applicant: Hynix Semiconductor Inc.
    Inventors: Hyung Gyun YANG, Hyung Dong LEE, Yong Kee KWON, Young Suk MOON, Sung Wook KIM
  • MEMORY SYSTEM
    Publication number: 20130094316
    Abstract: A memory system includes: a controller configured to provide a hidden auto refresh command; and a memory configured to perform a refresh operation in response to the hidden auto refresh command. The controller and the memory communicate with each other so that each refresh address of the controller and the memory has the same value as each other.
    Type: Application
    Filed: December 30, 2011
    Publication date: April 18, 2013
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Sang Hoon SHIN, Hyung Dong LEE, Jeong Woo LEE, Young Suk MOON
  • SEMICONDUCTOR MEMORY APPARATUS AND SEMICONDUCTOR SYSTEM HAVING THE SAME
    Publication number: 20130031439
    Abstract: A semiconductor memory apparatus includes: a memory cell area including a plurality of memory cell arrays stacked therein, each memory cell array having a plurality of memory cells integrated and formed therein to store data and a plurality of through-lines formed therein to transmit signals; and a control logic area configured to generate parity bits using a data signal inputted to the memory cell area and transmit the generated parity bits and the data signal to different through-lines.
    Type: Application
    Filed: June 25, 2012
    Publication date: January 31, 2013
    Applicant: SK HYNIX INC.
    Inventors: Young Suk MOON, Hyung Dong LEE, Yong Kee KWON, Hyung Gyun YANG, Sung Wook KIM
  • Data line termination circuit
    Patent number: 8330486
    Abstract: A data line termination circuit includes a swing-width sensing unit configured to sense a swing width of a voltage of a data line and output a sensed signal, and a variable termination unit configured to adjust a termination resistance value of the data line in response to the sensed signal. The swing-width sensing unit can sense if the swing width is less than or greater than a predetermined swing width, and the swing width of the voltage of the data line can be reduced or increased to maintain the voltage of the data line within a predetermined range.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: December 11, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yong Kee Kwon, Hyung Dong Lee
  • Stacked semiconductor package
    Patent number: 8310062
    Abstract: A semiconductor package includes a wire board, a plurality of semiconductor chips configured to be stacked over the wire board and to be electrically coupled with the wire board, and at least one shielding unit configured to be formed between the plurality of semiconductor chips and to be maintained at a predetermined voltage.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: November 13, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jun-Ho Lee, Hyung-Dong Lee, Hyun-Seok Kim
  • SEMICONDUCTOR APPARATUS
    Publication number: 20120273961
    Abstract: A semiconductor apparatus includes a plurality of semiconductor chips which are stacked; and an auxiliary semiconductor chip configured to recover and transmit signals of the plurality of semiconductor chips through a plurality of through vias which extend vertically, at a predetermined time interval.
    Type: Application
    Filed: August 27, 2011
    Publication date: November 1, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Yong Kee KWON, Hyung Dong LEE, Young Suk MOON, Hyung Gyun YANG, Sung Wook KIM
  • Semiconductor memory apparatus and test method thereof
    Patent number: 8300496
    Abstract: A semiconductor memory apparatus includes a clock control unit configured to receive a first clock when an enable signal is activated and generate a second clock which has a cycle closer in length to a target clock cycle than the first clock; a DLL input clock generation unit configured to output one of the first clock and the second clock as a DLL input clock according to a DLL select signal; and an address/command input clock generation unit configured to output one of the first clock and the second clock as an AC input clock according to the enable signal.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: October 30, 2012
    Assignee: SK Hynix Inc.
    Inventors: Tae Sik Yun, Hyung Dong Lee, Jun Gi Choi, Sang Jin Byeon, Sang Hoon Shin
  • SIP SEMICONDUCTOR SYSTEM
    Publication number: 20120213022
    Abstract: A system in package (SIP) semiconductor system includes a memory device, a controller, a first input/output terminal, a test control unit, and a second input/output terminal. The controller communicates with the memory device. The first input/output terminal performs communication between the controller and a device external to the SIP semiconductor system. The test control unit controls a predetermined test mode of the memory device. The second input/output terminal performs communication between the test control unit and at least the device external to the SIP semiconductor system.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 23, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Hyung Gyun YANG, Hyung Dong LEE, Yong Kee KWON, Young Suk MOON, Sung Wook KIM, Keun Hyung KIM
  • MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, AND CONTROL METHOD THEREOF
    Publication number: 20120155200
    Abstract: A memory system includes a memory device, a control device configured to control the memory device, a first channel configured to transfer a row command from the control device to the memory device, and a second channel configured to transfer a column command from the control device to the memory device.
    Type: Application
    Filed: November 18, 2011
    Publication date: June 21, 2012
    Inventors: Young-Suk Moon, Hyung-Dong Lee, Jeong-Woo Lee, Sang-Hoon Shin
  • SEMICONDUCTOR SYSTEM, SEMICONDUCTOR MEMORY APPARATUS, AND METHOD FOR INPUT/OUTPUT OF DATA USING THE SAME
    Publication number: 20120140584
    Abstract: A semiconductor system, a semiconductor memory apparatus, and a method for input/output of data using the same are disclosed. The semiconductor system includes a controller and a memory apparatus where the controller is configured to transmit a clock signal, a data output command, an address signal, and a second strobe signal to a memory apparatus. The memory apparatus is configured to provide data to the controller in synchronization with the second strobe signal, and in response to the clock signal, the data output command, the address signal, and the second strobe signal received from the controller.
    Type: Application
    Filed: August 27, 2011
    Publication date: June 7, 2012
    Applicant: Hynix Semiconductor Inc.
    Inventors: Yong Kee KWON, Hyung Dong LEE, Young Suk MOON, Hyung Gyun YANG, Sung Wook KIM
  • CONTENT-PROVIDING METHOD AND SYSTEM
    Publication number: 20120136861
    Abstract: A content-providing method and system, including identifying a representative type cluster by clustering content related to behavioral data which represents a use history of a user, according to type of the content, mapping the representative type cluster to a time interval, and storing the representative type cluster and the time interval.
    Type: Application
    Filed: November 25, 2011
    Publication date: May 31, 2012
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyung-dong LEE, Seung-taek Park, Hee-seon Park, Hae-dong Yeo