Patents by Inventor Hyung Jun Jeon

Hyung Jun Jeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SHIELDED STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
    Publication number: 20080150093
    Abstract: A shielded stacked integrated circuit package system is provided including forming a first integrated circuit structure having a first substrate and a first integrated circuit die; mounting a shield over the first substrate and the first integrated circuit die; mounting a second integrated circuit structure having a second substrate and a second integrated circuit die over the shield; and forming a package encapsulation for covering the first integrated circuit die, the shield, and the second integrated circuit structure.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Applicant: STATS ChipPAC LTD.
    Inventors: Ki Youn Jang, YoungMin Kim, Hyung Jun Jeon
  • INTEGRATED CIRCUIT PACKAGE SYSTEM
    Publication number: 20080029911
    Abstract: An integrated circuit package system is provided including forming a substrate with a device thereover, forming an encapsulation having a planar top surface to cover the device and the substrate spanning to an extraction side of the encapsulation, and forming a recess in the encapsulation from the planar top surface.
    Type: Application
    Filed: August 3, 2006
    Publication date: February 7, 2008
    Applicant: STATS ChipPAC LTD.
    Inventors: Hyung Jun Jeon, Tae Keun Lee, Sung Soo Kim
  • INTEGRATED CIRCUIT UNDERFILL PACKAGE SYSTEM
    Publication number: 20070176285
    Abstract: An integrated circuit underfill package system including providing a substrate having a dispense port, attaching a first integrated circuit die on the substrate, and supplying an underfill to the dispense port when the substrate and the first integrated circuit die are inverted.
    Type: Application
    Filed: January 31, 2006
    Publication date: August 2, 2007
    Applicant: STATS CHIPPAC LTD.
    Inventors: Hyung Jun Jeon, Ki Youn Jang, Dae-Wook Yang
  • SEMICONDUCTOR WAFER SCALE PACKAGE SYSTEM
    Publication number: 20070164422
    Abstract: A semiconductor wafer scale package system is provided including providing a semiconductor substrate having a through-hole via with a conductive coating, forming a filled via by filling the through-hole via with a conductive material, coupling a package substrate to the filled via, and singulating a chip scale package from the semiconductor substrate and the package substrate.
    Type: Application
    Filed: December 22, 2006
    Publication date: July 19, 2007
    Applicant: STATS ChipPAC LTD.
    Inventors: Hyung Jun Jeon, Tae Keun Lee, Young Chan Ko
  • BUMP FOR OVERHANG DEVICE
    Publication number: 20070001296
    Abstract: A semiconductor package system is provided including forming a support platform, mounting a first device over the support platform, forming a bump on the support platform, and mounting a second device on the first device and the bump.
    Type: Application
    Filed: August 31, 2006
    Publication date: January 4, 2007
    Applicant: STATS CHIPPAC LTD.
    Inventors: Hun Teak Lee, Jong Kook Kim, ChulSik Kim, Ki Youn Jang, Keon Teak Kang, Hyung Jun Jeon