Abstract: Semiconductor devices are provided that comprise a semiconductor layer structure that comprises a drift region having a first conductivity type, a channel region having a second conductivity type, and a source region having the first conductivity type. A gate trench extends into an upper surface of the semiconductor layer structure. The channel region horizontally overlaps both the gate trench and the source region.

Abstract: A semiconductor device comprises a silicon carbide based semiconductor layer structure that comprises a drift region having a first conductivity type and an implanted region having a second conductivity type on the drift region. First and second gate trench sections extend into the semiconductor layer structure. A first maximum depth into the semiconductor layer structure of a first portion of the implanted region that is between the first gate trench section and the second gate trench section is different than a second maximum depth into the semiconductor layer structure of a second portion of the implanted region that extends downwardly underneath the first gate trench section.

Abstract: A vertical semiconductor device includes a substrate, a drift region over the substrate, an upper region on the drift region, a top surface over the upper region and being substantially planar, and a series of implants of a second dopant in the upper region, such that each implant of the series of implants is located at a different depth below the top surface. The series of implants forms at least two gate region. The substrate and the drift region are doped with a first dopant of a first polarity. The second dopant has a second polarity opposite that of the first polarity. At least a portion of a channel region is provided between the at least two gate regions, and a conducting gap is defined within the channel region and between opposing sidewalls of the at least two gate regions.

Abstract: Disclosed herein are engineered rhizobia having nif clusters that enable the fixation of nitrogen under free-living conditions, as well as ammonium and oxygen tolerant nitrogen fixation under free-living conditions. Also provided are methods for producing nitrogen for consumption by a cereal crop using these engineered rhizobia.

Abstract: A secure booting apparatus according to an embodiment for solving the problems to be solved by the present invention includes: a memory configured to store encrypted data, an encrypted header, and a symmetric key; and a processor configured to generate decrypted data and a decrypted header by applying a symmetric key algorithm using the symmetric key to the encrypted data and encrypted header, to include a public key and a pre key generated from the public key in the decrypted header, to generate a comparison hashed message by applying a hash algorithm to the decrypted data, to generate a final verification value by applying a public key algorithm using the public key and the pre key to the decrypted header, to compare the comparison hashed message with the final verification value, and to determine that booting has failed if the comparison hashed message and the final verification value are different from each other.

Abstract: Semiconductor devices and methods of forming a semiconductor device that includes a polysilicon layer that may improve device reliability and/or a functioning of the device. An example device may include a wide band-gap semiconductor layer structure including a drift region that has a first conductivity type; a plurality of gate trenches in an upper portion of the semiconductor layer structure, each gate trench having a bottom surface, a first sidewall, a second sidewall, and an upper opening; and a plurality of polysilicon layers, each polysilicon layer on the second sidewall of a respective gate trench.

Abstract: Semiconductor devices and methods of forming the devices are provided. Semiconductor devices include a semiconductor layer structure comprising a trench in an upper surface thereof, a dielectric layer in a lower portion of the trench, and a gate electrode in the trench and on the dielectric layer opposite the semiconductor layer structure. The trench may include rounded upper corner and a rounded lower corner. A center portion of a top surface of the dielectric layer may be curved, and the dielectric layer may be on opposed sidewalls of the trench. The dielectric layer may include a bottom dielectric layer on a bottom surface of the trench and on lower portions of the sidewalls of the trench and a gate dielectric layer on upper portions of the sidewalls of the trench and on the bottom dielectric layer.

Abstract: A semiconductor device comprises a silicon carbide based semiconductor layer structure that includes a drift layer having a first conductivity type, a gate trench that extends to a first depth into an upper surface of the semiconductor layer structure, a gate electrode in the gate trench, a support shield trench that extends to a second depth into the upper surface of the semiconductor layer structure, where the second depth is less than the first depth, and a source metallization layer on the upper surface of the semiconductor layer structure and extending into the support shield trench.

Abstract: A semiconductor device comprises a silicon carbide based semiconductor layer structure and a first gate trench extending into an upper portion of the semiconductor layer structure. The semiconductor layer structure comprises a drift region having a first conductivity type, a well layer having a second conductivity type, and a support shield having the second conductivity type. A width of a first segment of the support shield that is deeper in the semiconductor layer structure than the well layer and less deep in the semiconductor layer structure than a bottom of the first gate trench decreases with increasing distance from the well region.

Abstract: Semiconductor devices are provided. In one example, a semiconductor device includes a semiconductor structure. The semiconductor device includes a gate finger in a gate trench in the semiconductor structure. The gate trench extends a length in the semiconductor structure. The gate trench has a first portion having a first width and a second portion having a second width. The second width is different than the first width.

Abstract: A apparatus for manufacturing a display device includes: a stage for supporting a display module including a display panel, a cover window, and a flexible printed circuit board; and an adsorption unit disposed at one side of the stage, the adsorption unit configured to be moved in a horizontal direction such that a distance between the stage and the adsorption unit is adjusted, wherein the adsorption unit is configured to adsorb and support the flexible printed circuit board connected to the display panel.

Abstract: Power semiconductor devices are provided. In one example, the power semiconductor device includes a semiconductor structure includes an active region and an inactive region, the active region includes a plurality of unit cells. The power semiconductor device includes a gate structure, wherein at least a portion of the gate structure is on the inactive region. The power semiconductor device includes a first shunt contact structure at least partially on the inactive region. The power semiconductor device includes a second shunt contact structure at least partially on the inactive region. The power semiconductor device includes a balancing shunt structure at least partially on the inactive region.

Abstract: A semiconductor device comprises a silicon carbide based semiconductor layer structure that comprises an active region. A gate trench is provided in an upper portion of the semiconductor layer structure, the gate trench having a first rounded lower corner and a second rounded lower corner. A gate electrode is provided in the gate trench. Within the active region, an upper surface of the gate electrode is below or coplanar with an upper surface of the semiconductor layer structure.

Abstract: Semiconductor devices, and in particular protection structures for semiconductor devices that include sensor arrangements are disclosed. A semiconductor device may include a sensor region, for example a current sensor region that occupies a portion of an overall active area of the device. The current sensor region may be configured to provide monitoring of device load currents during operation. Semiconductor devices according to the present disclosure include one or more protection structures that are configured to allow the semiconductor devices to withstand transient voltage events without device failure. A protection structure may include an insulating layer that is provided in a transition region between a device region and the sensor region of the semiconductor device. In the example of an insulated gate semiconductor device, the insulating layer of the protection structure may include a material with a greater breakdown voltage than a breakdown voltage of a gate insulating layer.

Abstract: An object of the present invention is to provide an optical fiber sensor embedding method for a three-dimensional (3D) metal printing structure capable of embedding an optical fiber sensor without any damage by regulating 3D printing dwell time at a location where an optical fiber sensor is embedded while embedding an optical fiber sensor for sensing temperature, stress, etc., in a high-temperature harsh environment close to a melting point of metal when manufacturing a 3D metal printing structure. Another object of the present invention provides an optical fiber sensor embedded 3D metal printing turbine blade manufactured by applying the embedding method so that the turbine blade, which is a complex and precise product, is manufactured using 3D metal printing but the optical fiber sensor is embedded using the above-described optical fiber sensor embedding method.

Abstract: A power semiconductor device includes a semiconductor layer structure comprising a wide bandgap semiconductor material. The semiconductor layer structure includes a drift region of a first conductivity type and a plurality of fin structures protruding from the drift region. The fin structures comprise respective source regions of the first conductivity type and respective channel regions between the respective source regions and the drift region. Related devices and methods are also discussed.

Abstract: devices and methods of forming a semiconductor device that includes a deep shielding pattern that may improve a reliability and/or a functioning of the device. An example method may include forming a wide band-gap semiconductor layer structure on a substrate, the semiconductor layer structure including a drift region that has a first conductivity type; forming a plurality of gate trenches in an upper portion of the semiconductor layer structure, the gate trenches spaced apart from each other, each gate trench having a bottom surface, a first sidewall, a second sidewall, and an upper opening; forming an obstruction over a portion of each gate trench that partially obscures the upper opening; and implanting dopants having a second conductivity type that is opposite the first conductivity type into the bottom surfaces of the gate trenches, where the dopants implanted into the bottom surface of the gate trenches form deep shielding patterns.

Abstract: A power semiconductor device comprises a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material that has a first conductivity type, a well region that has a second conductivity type, and a source region that has the first conductivity type in an upper portion of the well region and a gate trench in an upper portion of the semiconductor layer structure and comprising a portion obliquely angled in plan view. Sidewalls of the gate trench may extend along substantially the same crystal plane in the semiconductor layer structure.

Abstract: A semiconductor device includes a semiconductor layer having a first conductivity type, a well region in the semiconductor layer, the well region having a second conductivity type opposite the first conductivity type, a source region having the first conductivity type in the well region, and an implanted charge compensation region in the semiconductor layer beneath the well region. The source region is adjacent a channel region in the well region. A method of forming a semiconductor device includes forming a well region having a second conductivity type in a semiconductor layer having a first conductivity type opposite the second conductivity type, forming a source region having the first conductivity type in the well region, and implanting ions into the semiconductor layer to form a charge compensation region in the semiconductor layer beneath the well region. The source region is adjacent a channel region in the well region.

Abstract: Shielding techniques are used to provide an embedded sensor element such as a temperature sensing element on a wide bandgap power semiconductor device. A semiconductor device may include a drift layer and an embedded sensor element. The drift layer may be a wide bandgap semiconductor material. A shielding structure is provided in the drift layer below the embedded sensor element. The embedded sensor element may be provided between contacts that are in electrical contact with the shielding well. The distance between the contacts may be minimized. A noise reduction well may be provided between the contacts to further isolate the embedded sensor element from parasitic signals.