Patents by Inventor Hyung Ryu

Hyung Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250072044
    Abstract: A semiconductor device comprises a silicon carbide based semiconductor layer structure that comprises an active region. A gate trench is provided in an upper portion of the semiconductor layer structure, the gate trench having a first rounded lower corner and a second rounded lower corner. A gate electrode is provided in the gate trench. Within the active region, an upper surface of the gate electrode is below or coplanar with an upper surface of the semiconductor layer structure.
    Type: Application
    Filed: August 22, 2023
    Publication date: February 27, 2025
    Inventors: Woongsun Kim, Matthew N. McCain, Naeem Islam, Madankumar Sampath, Sei-Hyung Ryu
  • Patent number: 12237412
    Abstract: Semiconductor devices, and in particular protection structures for semiconductor devices that include sensor arrangements are disclosed. A semiconductor device may include a sensor region, for example a current sensor region that occupies a portion of an overall active area of the device. The current sensor region may be configured to provide monitoring of device load currents during operation. Semiconductor devices according to the present disclosure include one or more protection structures that are configured to allow the semiconductor devices to withstand transient voltage events without device failure. A protection structure may include an insulating layer that is provided in a transition region between a device region and the sensor region of the semiconductor device. In the example of an insulated gate semiconductor device, the insulating layer of the protection structure may include a material with a greater breakdown voltage than a breakdown voltage of a gate insulating layer.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: February 25, 2025
    Assignee: Wolfspeed, Inc.
    Inventors: Edward Robert Van Brunt, Sei-Hyung Ryu
  • Publication number: 20250001501
    Abstract: An object of the present invention is to provide an optical fiber sensor embedding method for a three-dimensional (3D) metal printing structure capable of embedding an optical fiber sensor without any damage by regulating 3D printing dwell time at a location where an optical fiber sensor is embedded while embedding an optical fiber sensor for sensing temperature, stress, etc., in a high-temperature harsh environment close to a melting point of metal when manufacturing a 3D metal printing structure. Another object of the present invention provides an optical fiber sensor embedded 3D metal printing turbine blade manufactured by applying the embedding method so that the turbine blade, which is a complex and precise product, is manufactured using 3D metal printing but the optical fiber sensor is embedded using the above-described optical fiber sensor embedding method.
    Type: Application
    Filed: November 18, 2021
    Publication date: January 2, 2025
    Applicant: Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Won Hyung RYU, Seon iL KIM, Ho Yun JUNG
  • Patent number: 12176423
    Abstract: A power semiconductor device includes a semiconductor layer structure comprising a wide bandgap semiconductor material. The semiconductor layer structure includes a drift region of a first conductivity type and a plurality of fin structures protruding from the drift region. The fin structures comprise respective source regions of the first conductivity type and respective channel regions between the respective source regions and the drift region. Related devices and methods are also discussed.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: December 24, 2024
    Assignee: Wolfspeed, Inc.
    Inventors: Naeem Islam, Woongsun Kim, Daniel Jenner Lichtenwalner, Sei-Hyung Ryu
  • Publication number: 20240413197
    Abstract: devices and methods of forming a semiconductor device that includes a deep shielding pattern that may improve a reliability and/or a functioning of the device. An example method may include forming a wide band-gap semiconductor layer structure on a substrate, the semiconductor layer structure including a drift region that has a first conductivity type; forming a plurality of gate trenches in an upper portion of the semiconductor layer structure, the gate trenches spaced apart from each other, each gate trench having a bottom surface, a first sidewall, a second sidewall, and an upper opening; forming an obstruction over a portion of each gate trench that partially obscures the upper opening; and implanting dopants having a second conductivity type that is opposite the first conductivity type into the bottom surfaces of the gate trenches, where the dopants implanted into the bottom surface of the gate trenches form deep shielding patterns.
    Type: Application
    Filed: August 23, 2024
    Publication date: December 12, 2024
    Inventors: Daniel J. Lichtenwalner, Naeem Islam, Woongsun Kim, Sei-Hyung Ryu
  • Publication number: 20240395927
    Abstract: A power semiconductor device comprises a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material that has a first conductivity type, a well region that has a second conductivity type, and a source region that has the first conductivity type in an upper portion of the well region and a gate trench in an upper portion of the semiconductor layer structure and comprising a portion obliquely angled in plan view. Sidewalls of the gate trench may extend along substantially the same crystal plane in the semiconductor layer structure.
    Type: Application
    Filed: August 2, 2024
    Publication date: November 28, 2024
    Inventors: Woongsun Kim, Daniel Jenner Lichtenwalner, Sei-Hyung Ryu, Naeem Islam
  • Publication number: 20240387620
    Abstract: A semiconductor device includes a semiconductor layer having a first conductivity type, a well region in the semiconductor layer, the well region having a second conductivity type opposite the first conductivity type, a source region having the first conductivity type in the well region, and an implanted charge compensation region in the semiconductor layer beneath the well region. The source region is adjacent a channel region in the well region. A method of forming a semiconductor device includes forming a well region having a second conductivity type in a semiconductor layer having a first conductivity type opposite the second conductivity type, forming a source region having the first conductivity type in the well region, and implanting ions into the semiconductor layer to form a charge compensation region in the semiconductor layer beneath the well region. The source region is adjacent a channel region in the well region.
    Type: Application
    Filed: March 7, 2024
    Publication date: November 21, 2024
    Inventors: Kijeong Han, Jeff Kim, Sei-Hyung Ryu, Daniel Lichtenwalner
  • Publication number: 20240379667
    Abstract: Shielding techniques are used to provide an embedded sensor element such as a temperature sensing element on a wide bandgap power semiconductor device. A semiconductor device may include a drift layer and an embedded sensor element. The drift layer may be a wide bandgap semiconductor material. A shielding structure is provided in the drift layer below the embedded sensor element. The embedded sensor element may be provided between contacts that are in electrical contact with the shielding well. The distance between the contacts may be minimized. A noise reduction well may be provided between the contacts to further isolate the embedded sensor element from parasitic signals.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 14, 2024
    Inventors: Joohyung Kim, Sei-Hyung Ryu, Kijeong Han, Thomas E. Harrington, III, Edward Robert Van Brunt
  • Patent number: 12103284
    Abstract: A display device includes a display panel that is bent so that at least a portion of the display panel overlaps another portion of the display panel; and a spacer surrounded by the display panel and that includes a flat portion and a bent portion connected to the flat portion, where an upper surface of the bent portion has a first curvature and a lower surface of the bent portion has a second curvature that differs from the first curvature.
    Type: Grant
    Filed: May 9, 2021
    Date of Patent: October 1, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dong Eun Lee, Do Hyung Ryu, Hyun Sang Park
  • Patent number: 12094926
    Abstract: Semiconductor devices and methods of forming a semiconductor device that includes a deep shielding pattern that may improve a reliability and/or a functioning of the device. An example method may include forming a wide band-gap semiconductor layer structure on a substrate, the semiconductor layer structure including a drift region that has a first conductivity type; forming a plurality of gate trenches in an upper portion of the semiconductor layer structure, the gate trenches spaced apart from each other, each gate trench having a bottom surface, a first sidewall, a second sidewall, and an upper opening; forming an obstruction over a portion of each gate trench that partially obscures the upper opening; and implanting dopants having a second conductivity type that is opposite the first conductivity type into the bottom surfaces of the gate trenches, where the dopants implanted into the bottom surface of the gate trenches form deep shielding patterns.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: September 17, 2024
    Assignee: Wolfspeed, Inc.
    Inventors: Daniel J. Lichtenwalner, Naeem Islam, Woongsun Kim, Sei-Hyung Ryu
  • Patent number: 12087854
    Abstract: A vertical semiconductor device includes one or more of a substrate, a buffer layer over the substrate, one or more drift layers over the buffer layer, and a spreading layer over the one or more drift layers.
    Type: Grant
    Filed: September 6, 2022
    Date of Patent: September 10, 2024
    Assignee: Wolfspeed, Inc.
    Inventors: Daniel Jenner Lichtenwalner, Sei-Hyung Ryu, Kijeong Han, Edward Robert Van Brunt
  • Publication number: 20240294953
    Abstract: Methods and systems are provided for generating and utilizing a genetically engineered bacterium comprising a modification in a nifA gene or homolog thereof that can result in a bacterium with modified regulation of nitrogen fixation or assimilation activity. Genetically engineered bacteria with modified nitrogen fixation or assimilation activity are also provided. The genetically engineered bacterium can fix nitrogen in the presence of nitrogen (e.g., ammonium), and/or oxygen.
    Type: Application
    Filed: June 30, 2022
    Publication date: September 5, 2024
    Inventors: Bilge Ozaydin Eskiyenenturk, Min-Hyung Ryu, Jenny Johnson, Leland Wong
  • Patent number: 12080790
    Abstract: A power semiconductor device comprises a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material that has a first conductivity type, a well region that has a second conductivity type, and a source region that has the first conductivity type in an upper portion of the well region and a gate trench in an upper portion of the semiconductor layer structure and comprising a portion obliquely angled in plan view. Sidewalls of the gate trench may extend along substantially the same crystal plane in the semiconductor layer structure.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: September 3, 2024
    Assignee: Wolfspeed, Inc.
    Inventors: Woongsun Kim, Daniel Jenner Lichtenwalner, Sei-Hyung Ryu, Naeem Islam
  • Publication number: 20240286396
    Abstract: An apparatus for attaching a display panel includes a panel mount which receives a panel bottom cover facing corner portions of the display panel which are extended bent from a front surface of the display panel, and a pressing module which provides a pressing force to the panel bottom cover which is received in the panel mount and faces the corner portions of the display panel. The pressing module includes a pressing pad which applies the pressing force to the panel bottom cover at the corner portions of the display panel to attach the panel bottom cover to the display panel at the corner portions thereof.
    Type: Application
    Filed: April 30, 2024
    Publication date: August 29, 2024
    Inventors: Dae Hyun HWANG, Do Hyung RYU, Hyun Sang PARK, Wu Hyeon JUNG
  • Publication number: 20240290832
    Abstract: A power semiconductor device includes semiconductor layer structure comprising a semiconductor drift region of a first conductivity type and an edge termination region comprising a plurality of guard rings of a second conductivity type. The guard rings extend into a surface of the semiconductor drift region. The guard rings respectively comprise a first portion adjacent the surface and a second portion spaced from the surface, where the first portion is wider than the second portion. Related devices and fabrication methods are also discussed.
    Type: Application
    Filed: May 10, 2024
    Publication date: August 29, 2024
    Inventors: Woongsun Kim, Daniel Jenner Lichtenwalner, Sei-Hyung Ryu, Naeem Islam
  • Patent number: 12074079
    Abstract: Shielding techniques are used to provide an embedded sensor element such as a temperature sensing element on a wide bandgap power semiconductor device. A semiconductor device may include a drift layer and an embedded sensor element. The drift layer may be a wide bandgap semiconductor material. A shielding structure is provided in the drift layer below the embedded sensor element. The embedded sensor element may be provided between contacts that are in electrical contact with the shielding well. The distance between the contacts may be minimized. A noise reduction well may be provided between the contacts to further isolate the embedded sensor element from parasitic signals.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: August 27, 2024
    Assignee: Wolfspeed, Inc.
    Inventors: Joohyung Kim, Sei-Hyung Ryu, Kijeong Han, Thomas E. Harrington, III, Edward Robert Van Brunt
  • Publication number: 20240262072
    Abstract: A display device includes a display panel comprises a display area and a non-display area surrounding the display area; a cover panel disposed on a rear surface of the display panel and comprising a front surface, a first side surface connected to the front surface and bent along a first bending line, a second side surface connected to the front surface and bent along a second bending line intersecting the first bending line, and a first corner located between the first side surface and the second side surface; and an alignment notch defined at the first corner of the cover panel.
    Type: Application
    Filed: March 22, 2024
    Publication date: August 8, 2024
    Inventors: Dae Hyun HWANG, Won Ju KIM, Do Hyung RYU, Wu Hyeon JUNG
  • Publication number: 20240266432
    Abstract: A semiconductor device includes a vertical transistor and a body diode. Various improvements to the semiconductor device allow for improved performance of the body diode, in particular to reduced snappiness and increased softness.
    Type: Application
    Filed: April 16, 2024
    Publication date: August 8, 2024
    Inventors: Kijeong Han, Sei-Hyung Ryu, Daniel Jenner Lichtenwalner
  • Publication number: 20240234567
    Abstract: A semiconductor device includes a semiconductor layer structure comprising a drift region of a first conductivity type and a well region of a second conductivity type above the drift region, a gate on the semiconductor layer structure adjacent the well region, and a contact shielding structure of the second conductivity type that vertically extends from the well region into the drift region, and discontinuously extends in one or more lateral directions. Related devices and fabrication methods are also discussed.
    Type: Application
    Filed: September 22, 2023
    Publication date: July 11, 2024
    Inventors: Madankumar Sampath, Naeem Islam, Woongsun Kim, Sei-Hyung Ryu
  • Publication number: 20240234495
    Abstract: A method of forming a semiconductor device comprises forming a first mask that includes a longitudinally-extending first opening that has a first width on a semiconductor layer structure. A spacer is formed on sidewalls of the first mask that are exposed by the first opening to form a second mask, where the first and second masks comprise a mask structure that has a longitudinally-extending second opening that has a second width that is smaller than the first width. Dopants are implanted through the second opening to form an implanted region in the semiconductor layer structure. The spacer is at least partially removed from the sidewalls of the first mask to form a third opening in the mask structure. The semiconductor layer structure is then etched using the mask structure as an etch mask to form a gate trench in the semiconductor layer structure underneath the third opening.
    Type: Application
    Filed: January 5, 2023
    Publication date: July 11, 2024
    Inventors: Woongsun Kim, Naeem Islam, Madankumar Sampath, Sei-Hyung Ryu, Rahul R. Potera, In-Hwan Ji