Abstract: A system includes a first device coupled with a link which transmits a signal having a repeating pattern, and a second device coupled with the link. The second device is to receive the signal, generate one or more delayed signals from the signal, determine a first duration of a first portion of the repeating pattern and a second duration of a second portion of the repeating pattern using the one or more delayed signals, and adjust a current duty cycle of the signal based on the first duration and the second duration.

Abstract: Technologies for chip-to-chip (C2C) yield and performance optimization in a die stacking platform are described. One stacked die platform includes a substrate, a first die and a second die stacked together, and first and C2C interfaces on the first and second dies, respectively. The stacked die platform also includes switching circuitry and a link monitoring unit. The switching circuitry is configured to selectively connect either the first C2C interface or the second C2C interface to the bump connections, where only one of the first C2C interface and the second C2C interface is active at a time. The link monitoring unit is configured to monitor link status and control operation of the switching circuitry to provide redundancy for C2C communication failures.

Abstract: Technologies for chip-to-chip (C2C) yield and performance optimization in a die stacking platform are described. One apparatus includes a substrate, a first integrated circuit disposed on the substrate at a first location, a second integrated circuit disposed on the substrate at a second location, and a third integrated circuit disposed on the second integrated circuit. The second integrated circuit is coupled to the first integrated circuit using a first chip-to-chip (C2C) interface via a physical terminal. The third integrated circuit is coupled to the first integrated circuit using a second C2C interface via the physical terminal. Only one of the first C2C interface and the second C2C interface is active at a time.

Abstract: The present disclosure provides a wound dressing assembly comprising (i) a blood-clotting mold device with a mold cavity for forming a molded blood clot for use in dressing a wound. Prior to extraction, the molded blood clot is pushed towards the mold cavity's interior, which causes the molded blood clot to disassociate from the cavity walls and thereafter it can be removed with none or only minimal damage to its integrity.

Abstract: Wound dressing assembly including (i) blood-clotting mold device having an enclosure defined between walls of a main body and a removable closure over an opening and configured for introduction of blood thereinto, and (ii) coagulation initiator in amount sufficient to coagulate blood introduced into the enclosure to form a blood clot. The formed blood clot is transferable onto a wound. Method for preparing a wound dressing by introducing a volume of blood into the enclosure of the blood-clotting mold device, maintaining the blood within the enclosure for time sufficient to permit clotting of the blood to obtain a blood clot; removing the closure to open the enclosure; and extracting the blood clot from the enclosure. The formed blood clot may be used in a method for dressing a wound by fixation of the clot onto the wound.

Abstract: Technologies for duty cycle distortion (DCD) estimation are described. A transmitter includes a first output driver comprising a first complementary metal-oxide semiconductor (CMOS) amplifier and a first attenuator coupled to an output of the first CMOS amplifier. The first CMOS amplifier receives an input signal and outputs an intermediate signal to the first attenuator. The first attenuator receives the intermediate signal and outputs an output signal having a signal swing that is less than a signal swing of the input signal. A first duty cycle correction (DCC) loop is coupled to the first output driver. The first DCC loop estimates first DCD in the intermediate signal output by the first CMOS amplifier.

Abstract: An apparatus for generating a data signal comprises a processing circuit configured to generate the data signal, the data signal comprising a sequence of a first signal edge of a first type, a second signal edge of a second type, and a third signal edge of the first type, the first signal edge and the second signal edge being separated by a first time period corresponding to first data to be transmitted, and the second signal edge and the third signal edge being separated by a second time period corresponding to second data to be transmitted. An output interface circuit is configured to output the data signal.

Abstract: Wound dressing assembly including (i) blood-clotting mold device having an enclosure defined between walls of a main body and a removable closure over an opening and configured for introduction of blood thereinto, and (ii) coagulation initiator in amount sufficient to coagulate blood introduced into the enclosure to form a blood clot. The formed blood clot is transferable onto a wound. Method for preparing a wound dressing by introducing a volume of blood into the enclosure of the blood-clotting mold device, maintaining the blood within the enclosure for time sufficient to permit clotting of the blood to obtain a blood clot; removing said the closure to open the enclosure; and extracting the blood clot from the enclosure. The formed blood clot may be used in a method for dressing a wound by fixation of the clot onto the wound.

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

Abstract: The present invention relates to a device (100) for treating a vaginal lesion, by forming a coagulated blood mass, which is introduced by the device (100) into the vagina. The device (100) comprises an elongated guiding tube (102) having a lumen (104) for receiving whole blood and a plunger (112) having a piston element (114) fitted within the lumen (104) thus defining a blood coagulating space (109) between it and a blood-introducing end (106). The guiding tube (102) is configured for being introduced into the vagina and to discharge a coagulating blood mass formed within the lumen (104), in result of displacement of the displaceable piston (114) element. The coagulated blood mass may be maintained in the vagina by an anchoring element (122) configured to expand within the vagina and maintain there for a desired time and then be retrieved. Methods of treatment are also disclosed.

Abstract: A system includes a first device coupled with a link which transmits a signal having a repeating pattern, and a second device coupled with the link. The second device is to receive the signal, generate one or more delayed signals from the signal, determine a first duration of a first portion of the repeating pattern and a second duration of a second portion of the repeating pattern using the one or more delayed signals, and adjust a current duty cycle of the signal based on the first duration and the second duration.

Abstract: A method and apparatus for generating a frequency-modulated continuous wave (FMCW) signal. The apparatus may include a first oscillator configured to generate a first oscillation signal, a frequency modulator configured to generate a frequency-modulated oscillation signal from the first oscillation signal based on a sequence of control words, a frequency modulation code generator configured to generate a sequence of frequency modulation codes for generating an FMCW waveform, and a frequency multiplier configured to generate the FMCW signal by up-converting the frequency-modulated oscillation signal. The sequence of control words is generated based on the sequence of frequency modulation codes. The apparatus may include a second oscillator configured to generate a second oscillation signal, and a phase detector configured to detect a phase difference between the first oscillation signal and the second oscillation signal and generate an offset code based on the phase difference.

Abstract: A system includes a first device, coupled to a link, which transmits a signal having a repeating pattern on one or more paths of the link. The system includes a second device coupled to the link and including one or more circuits and a time-to-digital converter (TDC). The second device is to receive at the one or more circuits the signal. The second device is to determine, by the TDC, a current duty cycle of the signal, the current duty cycle having a first duration associated with a first portion of the signal and a second duration associated with a second portion of the signal. The second device is further to determine the current duty cycle fails to satisfy a condition associated with a target duty cycle in response to determining the current duty cycle of the signal and adjust the current duty cycle to obtain an adjusted duty cycle.

Abstract: An apparatus for generating a data signal comprises a processing circuit configured to generate the data signal, the data signal comprising a sequence of a first signal edge of a first type, a second signal edge of a second type, and a third signal edge of the first type, the first signal edge and the second signal edge being separated by a first time period corresponding to first data to be transmitted, and the second signal edge and the third signal edge being separated by a second time period corresponding to second data to be transmitted. An output interface circuit is configured to output the data signal.

Abstract: Technologies for duty cycle distortion (DCD) estimation are described. A transmitter includes a first output driver comprising a first complementary metal-oxide semiconductor (CMOS) amplifier and a first attenuator coupled to an output of the first CMOS amplifier. The first CMOS amplifier receives an input signal and outputs an intermediate signal to the first attenuator. The first attenuator receives the intermediate signal and outputs an output signal having a signal swing that is less than a signal swing of the input signal. A first duty cycle correction (DCC) loop is coupled to the first output driver. The first DCC loop estimates first DCD in the intermediate signal output by the first CMOS amplifier.

Abstract: Technologies for chip-to-chip (C2C) yield and performance optimization in a die stacking platform are described. One apparatus includes a substrate, a first integrated circuit disposed on the substrate at a first location, a second integrated circuit disposed on the substrate at a second location, and a third integrated circuit disposed on the second integrated circuit. The second integrated circuit is coupled to the first integrated circuit using a first chip-to-chip (C2C) interface via a physical terminal. The third integrated circuit is coupled to the first integrated circuit using a second C2C interface via the physical terminal. Only one of the first C2C interface and the second C2C interface is active at a time.

Abstract: Technologies for jitter extraction are described. A receiver device includes an analog-to-digital converter (ADC) and a signal processing circuit. The signal processing circuit includes an equalizer block to output current data based on samples from the ADC. A clock-recovery (CR) block includes a timing error detector (TED) or a phase detector to measure a sampling offset. The CR block can use the sampling offset to control sampling of subsequent data by the ADC. A jitter extraction block can use the sampling offset to re-sample the current data to obtain re-sampled data based on the sampling offset to remove jitter from the current data.

Abstract: Technologies for jitter extraction are described. A receiver device includes an analog-to-digital converter (ADC) and a signal processing circuit. The signal processing circuit includes an equalizer block to output current data based on samples from the ADC. A clock-recovery (CR) block includes a timing error detector (TED) or a phase detector to measure a sampling offset. The CR block can use the sampling offset to control sampling of subsequent data by the ADC. A jitter extraction block can use the sampling offset to re-sample the current data to obtain re-sampled data based on the sampling offset to remove jitter from the current data.

Abstract: A clock generator calibration system can include a phased-locked loop and a correction circuit. The PLL can generate an output clock signal, and the correction circuit can adjust a frequency signal of the PLL based on a digital signal of the PLL. The digital signal can be generated based on the adjusted frequency signal.

Abstract: A system includes a first device, coupled to a link, which transmits a signal having a repeating pattern on one or more paths of the link. The system includes a second device coupled to the link and including one or more circuits and a time-to-digital converter (TDC). The second device is to receive at the one or more circuits the signal. The second device is to determine, by the TDC, a current duty cycle of the signal, the current duty cycle having a first duration associated with a first portion of the signal and a second duration associated with a second portion of the signal. The second device is further to determine the current duty cycle fails to satisfy a condition associated with a target duty cycle in response to determining the current duty cycle of the signal and adjust the current duty cycle to obtain an adjusted duty cycle.