Patents by Inventor Ik Soo Kim

Ik Soo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220110212
    Abstract: A flexible circuit board according to an embodiment includes a first signal line extending on a first plane, a first dielectric extending in an extension direction of the first signal line while being in contact with the first signal line, a second signal line extending on a second plane parallel with the first plane, and a second dielectric extending in an extension direction of the second signal line while being in contact with the second signal line. The first signal line includes a first part overlapped with the second signal line and a second part not overlapped with the second signal line when viewed in a normal direction of the first plane, and the second signal line includes a first part overlapped with the first signal line and a second part not overlapped with the first signal line when viewed in the normal direction.
    Type: Application
    Filed: March 4, 2020
    Publication date: April 7, 2022
    Inventors: Sang Pil KIM, Ik Soo KIM, Byung Yeol KIM, Hee Seok JUNG
  • Patent number: 11272611
    Abstract: A flexible circuit board with improved bending reliability and a manufacturing method thereof are disclosed, the flexible circuit board comprising: a first dielectric formed to be elongated in a horizontal direction; a second dielectric positioned above the first dielectric; a third dielectric spaced apart from the second dielectric in the horizontal direction and positioned above the first dielectric; a first cover layer positioned on the first dielectric and covering an upper portion of the first dielectric between the second dielectric and the third dielectric; a first bonding sheet positioned between the first dielectric and the second dielectric and covering an upper portion of one end of the first cover layer; and a second bonding sheet positioned between the first dielectric and the third dielectric and covering an upper portion of the other end of the first cover layer.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: March 8, 2022
    Assignee: GIGALANE CO., LTD.
    Inventors: Sang Pil Kim, Byung Yeol Kim, Ik Soo Kim, Hee Seok Jung
  • Patent number: 11266678
    Abstract: The present invention relates to a composition for articular cavity injection comprising a nucleic acid and chitosan. More specifically, in the present invention, it was confirmed that the sol-gel transition occurred depending on the temperature in the composition for articular cavity injection prepared through the mixing of the nucleic acid and chitosan, the proteoglycan biosynthesis of the cartilage tissue was increased by the injection of the composition and the cartilage regeneration effect was exhibited, and the pain was alleviated and the walking speed and stride which are the joint motilities were improved. Therefore, development of a therapeutic agent for arthritis having an excellent therapeutic effect using the composition for articular cavity injection comprising the nucleic acid and chitosan of the present invention is expected.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: March 8, 2022
    Assignee: PHARMARESEARCH CO., LTD.
    Inventors: Ik Soo Kim, Han Gyu Kim, Su Yeon Lee
  • Publication number: 20220069092
    Abstract: A semiconductor device may include first and second fin-shaped patterns on a substrate, that extend in a first direction, and are spaced apart from each other in a second direction. A first epitaxial pattern may be on the first fin-shaped pattern, and a second epitaxial pattern may be on the second fin-shaped pattern. A field insulating layer may be on the substrate, and may cover a sidewall of the first fin-shaped pattern, a sidewall of the second fin-shaped pattern, a part of a sidewall of the first epitaxial pattern, and a part of a sidewall of the second epitaxial pattern. The top surface of the field insulating layer may be higher than the bottom surface of the first epitaxial pattern and the bottom surface of the second epitaxial pattern.
    Type: Application
    Filed: March 30, 2021
    Publication date: March 3, 2022
    Inventors: Sun Ki Min, Chae Ho Na, Sang Koo Kang, Ik Soo Kim, Dong Hyun Roh
  • Patent number: 11225715
    Abstract: A semiconductor manufacturing apparatus includes a chamber that includes a station in which a substrate is provided, a substrate holder that is in the station and receives the substrate, and lower showerheads below the substrate holder, the lower showerheads including an isotropic showerhead having first nozzle holes that isotropically provide a first reaction gas on a bottom surface of the substrate, and a striped showerhead having striped nozzle regions and striped blank regions between the striped nozzle regions, the striped nozzle regions having second nozzle holes that non-isotropically provide a second reaction gas on the bottom surface of the substrate.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: January 18, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Sun Park, Ik Soo Kim, Jiwoon Im, Sangho Rha, Minjae Oh
  • Publication number: 20220005808
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device, the device including a substrate; a lower structure including pad patterns on the substrate, upper surfaces of the pad patterns being at an outer side of the lower structure; a plurality of lower electrodes contacting the upper surfaces of the pad patterns; a dielectric layer and an upper electrode sequentially stacked on a surface of each of the lower electrodes; and a hydrogen supply layer including hydrogen, the hydrogen supply layer being between the lower electrodes and closer to the substrate than the dielectric layer is to the substrate.
    Type: Application
    Filed: September 16, 2021
    Publication date: January 6, 2022
    Inventors: Jun-Won LEE, Hyuk-Woo KWON, Ik-Soo KIM, Byoung-Deog CHOI
  • Publication number: 20210393396
    Abstract: The present invention relates to a dermal layer which is for grafting and has an improved graft survival rate, and a method for producing the same, wherein the dermal layer for grafting can be produced by filling a filling solution, including a DNA fragment mixture and chitosan, into an acellular dermal matrix from which cells have been removed. It was observed that the dermal layer for grafting produced in this manner, due to the filling solution filled therein and including a DNA fragment mixture and chitosan, increases the rate at which cells flow in from the tissue surrounding the graft and are fixed, and thereby alleviates an initial inflammatory reaction and promotes blending with the surrounding tissue.
    Type: Application
    Filed: September 3, 2021
    Publication date: December 23, 2021
    Applicant: PHARMARESEARCH CO., LTD.
    Inventors: Ik Soo KIM, Han Gyu KIM, Su Yeon LEE
  • Publication number: 20210375896
    Abstract: A semiconductor device including a substrate that includes a cell array region and a peripheral circuit region; a cell transistor on the cell array region of the substrate; a peripheral transistor on the peripheral circuit region of the substrate; a first interconnection layer connected to the cell transistor; a second interconnection layer connected to the peripheral transistor; an interlayer dielectric layer covering the first interconnection layer; and a blocking layer spaced apart from the first interconnection layer, the blocking layer covering a top surface and a sidewall of the second interconnection layer.
    Type: Application
    Filed: November 17, 2020
    Publication date: December 2, 2021
    Inventors: Kyoung-Hee KIM, Woo Choel NOH, Ik Soo KIM, Jun Kwan KIM, Jinsub KIM, Yongjin SHIN
  • Publication number: 20210375877
    Abstract: A semiconductor device includes a lower electrode on a substrate, a capacitor dielectric film extending on the lower electrode along a side surface of the lower electrode that is perpendicular to the substrate, an upper electrode on the capacitor dielectric film, an interface layer including a hydrogen blocking film and a hydrogen bypass film on the upper electrode, the hydrogen blocking film including a conductive material, and a contact plug penetrating the interface layer and electrically connected to the upper electrode.
    Type: Application
    Filed: February 2, 2021
    Publication date: December 2, 2021
    Inventors: Jin Sub KIM, Jun Kwan KIM, Woo Choel NOH, Kyoung-Hee KIM, Ik Soo KIM, Yong Jin SHIN
  • Publication number: 20210360780
    Abstract: A flexible circuit board with improved bending reliability and a manufacturing method thereof are disclosed, the flexible circuit board comprising: a first dielectric formed to be elongated in a horizontal direction; a second dielectric positioned above the first dielectric; a third dielectric spaced apart from the second dielectric in the horizontal direction and positioned above the first dielectric; a first cover layer positioned on the first dielectric and covering an upper portion of the first dielectric between the second dielectric and the third dielectric; a first bonding sheet positioned between the first dielectric and the second dielectric and covering an upper portion of one end of the first cover layer; and a second bonding sheet positioned between the first dielectric and the third dielectric and covering an upper portion of the other end of the first cover layer.
    Type: Application
    Filed: November 7, 2019
    Publication date: November 18, 2021
    Inventors: Sang Pil KIM, Byung Yeol KIM, Ik Soo KIM, Hee Seok JUNG
  • Publication number: 20210360773
    Abstract: An antenna carrier includes a flexible circuit board, the flexible circuit board comprising: a first dielectric formed to include a width direction and a length direction; a first signal line positioned on one side in the width direction of an upper surface or a lower surface of the first dielectric; a second signal line spaced apart from the first signal line to the other side in the width direction and positioned on the upper surface or the lower surface of the first dielectric; a second dielectric positioned on one side in the width direction above the first dielectric and having the first signal line positioned below the second dielectric; a third dielectric spaced apart from the second dielectric to the other side in the width direction and positioned below the first dielectric, and having the second signal line positioned above the third dielectric; a first ground; and a second ground.
    Type: Application
    Filed: November 20, 2019
    Publication date: November 18, 2021
    Inventors: Sang Pil KIM, Byung Yeol KIM, Ik Soo KIM, Hee Seok JUNG
  • Publication number: 20210328039
    Abstract: A semiconductor device includes first and second active patterns each extending in a first direction and are spaced apart from each other in a second direction that is perpendicular to the first direction. A field insulating layer is disposed between the first active pattern and the second active pattern. A first gate structure is disposed on the first active pattern and extends in the second direction. An interlayer insulating layer is disposed between the first gate structure and the field insulating layer. The interlayer insulating layer includes a first part disposed below the first gate structure. A spacer is disposed between the first gate structure and the first part of the interlayer insulating layer.
    Type: Application
    Filed: December 4, 2020
    Publication date: October 21, 2021
    Inventors: Sun Hye LEE, Sung Soo KIM, Ik Soo KIM, Woong Sik NAM, Dong Hyun ROH
  • Publication number: 20210308192
    Abstract: The present invention relates to a composition for preventing or treating ischemic enteritis containing a DNA fragment mixture isolated from sperm or testis of fish. The composition of the present invention was verified to have excellent effects in the prevention or treatment of ischemic enteritis. In addition, the composition for preventing or treating ischemic enteritis of the present invention was verified to be safe and have few side effects even when administered for a long period of time. Therefore, a medicine for ischemic enteritis, which is safe without side effects and has an excellent treatment effect, is developed by using the composition for preventing or treating ischemic enteritis of the present invention, and thus the composition of the present invention is expected to be a great help in the treatment of ischemic enteritis.
    Type: Application
    Filed: June 15, 2021
    Publication date: October 7, 2021
    Applicant: PharmaResearch Co., Ltd.
    Inventors: Ik Soo KIM, Seung Gul BAEK, Chang Ju KIM, Jung Won JEON
  • Publication number: 20210313347
    Abstract: A method of manufacturing a vertical memory device includes forming a first sacrificial layer on a substrate, the first sacrificial layer including a first insulating material, forming a mold including an insulation layer and a second sacrificial layer alternately and repeatedly stacked on the first sacrificial layer, the insulation layer and the second sacrificial layer including second and third insulating materials, respectively, different from the first insulating material, forming a channel through the mold and the first sacrificial layer, forming an opening through the mold and the first sacrificial layer to expose an upper surface of the substrate, removing the first sacrificial layer through the opening to form a first gap, forming a channel connecting pattern to fill the first gap, and replacing the second sacrificial layer with a gate electrode.
    Type: Application
    Filed: June 15, 2021
    Publication date: October 7, 2021
    Inventors: Il-Woo KIM, Sang-Ho RHA, Byoung-Deog CHOI, Ik-Soo KIM, Min-Jae OH
  • Patent number: 11133317
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device, the device including a substrate; a lower structure including pad patterns on the substrate, upper surfaces of the pad patterns being at an outer side of the lower structure; a plurality of lower electrodes contacting the upper surfaces of the pad patterns; a dielectric layer and an upper electrode sequentially stacked on a surface of each of the lower electrodes; and a hydrogen supply layer including hydrogen, the hydrogen supply layer being between the lower electrodes and closer to the substrate than the dielectric layer is to the substrate.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: September 28, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun-Won Lee, Hyuk-Woo Kwon, Ik-Soo Kim, Byoung-Deog Choi
  • Publication number: 20210292900
    Abstract: Provided are a precursor supply unit, a substrate processing system, and a method of fabricating a semiconductor device using the same. The precursor supply unit may include an outer container, an inner container provided in the outer container and used to store a precursor source, a gas injection line having an injection port, which is provided below the inner container and in the outer container and is used to provide a carrier gas into the outer container, and a gas exhaust line having an exhaust port, which is provided below the inner container and in the outer container and is used to exhaust the carrier gas in the outer container and a precursor produced from the precursor source.
    Type: Application
    Filed: May 28, 2021
    Publication date: September 23, 2021
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Soyoung LEE, Hyunjae LEE, Ik Soo KIM, Jang-Hee LEE
  • Patent number: 11109955
    Abstract: The present invention relates to a dermal layer which is for grafting and has an improved graft survival rate, and a method for producing the same, wherein the dermal layer for grafting can be produced by filling a filling solution, including a DNA fragment mixture and chitosan, into an acellular dermal matrix from which cells have been removed. It was observed that the dermal layer for grafting produced in this manner, due to the filling solution filled therein and including a DNA fragment mixture and chitosan, increases the rate at which cells flow in from the tissue surrounding the graft and are fixed, and thereby alleviates an initial inflammatory reaction and promotes blending with the surrounding tissue.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: September 7, 2021
    Assignee: PHARMARESEARCH CO., LTD.
    Inventors: Ik Soo Kim, Han Gyu Kim, Su Yeon Lee
  • Patent number: 11107681
    Abstract: A method of fabricating a semiconductor device and a semiconductor processing apparatus are provided. The method of fabricating a semiconductor device comprises preparing a semiconductor substrate having a front side and a back side, opposing each other, and forming a material layer on the semiconductor substrate. The material layer is formed on at least a portion of the back side of the semiconductor substrate while being formed on the front side of the semiconductor substrate. The material layer formed on the at least a portion of the back side of the semiconductor substrate is removed, while the material layer formed on the front side of the semiconductor substrate remains. A semiconductor process is performed to fabricate the semiconductor device using the material layer remaining on the front side of the semiconductor substrate.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: August 31, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji Youn Seo, Ji Woon Im, Dai Hong Kim, Ik Soo Kim, Sang Ho Rha
  • Patent number: 11065281
    Abstract: The present invention relates to a composition for preventing or treating ischemic enteritis containing a DNA fragment mixture isolated from sperm or testis of fish. The composition of the present invention was verified to have excellent effects in the prevention or treatment of ischemic enteritis. In addition, the composition for preventing or treating ischemic enteritis of the present invention was verified to be safe and have few side effects even when administered for a long period of time. Therefore, a medicine for ischemic enteritis, which is safe without side effects and has an excellent treatment effect, is developed by using the composition for preventing or treating ischemic enteritis of the present invention, and thus the composition of the present invention is expected to be a great help in the treatment of ischemic enteritis.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: July 20, 2021
    Assignee: PharmaResearch Co., Ltd.
    Inventors: Ik Soo Kim, Seung Gul Baek, Chang Ju Kim, Jung Won Jeon
  • Patent number: 11063060
    Abstract: A method of manufacturing a vertical memory device includes forming a first sacrificial layer on a substrate, the first sacrificial layer including a first insulating material, forming a mold including an insulation layer and a second sacrificial layer alternately and repeatedly stacked on the first sacrificial layer, the insulation layer and the second sacrificial layer including second and third insulating materials, respectively, different from the first insulating material, forming a channel through the mold and the first sacrificial layer, forming an opening through the mold and the first sacrificial layer to expose an upper surface of the substrate, removing the first sacrificial layer through the opening to form a first gap, forming a channel connecting pattern to fill the first gap, and replacing the second sacrificial layer with a gate electrode.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: July 13, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Il-Woo Kim, Sang-Ho Rha, Byoung-Deog Choi, Ik-Soo Kim, Min-Jae Oh