Patents by Inventor Ikuko Kawamata
Ikuko Kawamata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8445905Abstract: An object is to increase an aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over one substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using metal and a channel layer is formed of an oxide semiconductor, and a driver circuit wiring formed using metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode layer and a drain electrode layer are formed using an oxide conductor and a semiconductor layer is formed of an oxide semiconductor, and a display portion wiring formed using an oxide conductor.Type: GrantFiled: August 6, 2012Date of Patent: May 21, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroyuki Miyake, Hideaki Kuwabara, Ikuko Kawamata
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Patent number: 8427420Abstract: An e-book reader in which destruction of a driver circuit at the time when a flexible panel is handled is inhibited. In addition, an e-book reader having a simplified structure. A plurality of flexible display panels each including a display portion in which display control is performed by a scan line driver circuit and a signal line driver circuit, and a binding portion fastening the plurality of display panels together are included. The signal line driver circuit is provided inside the binding portion, and the scan line driver circuit is provided at the edge of the display panel in a direction perpendicular to the binding portion.Type: GrantFiled: April 28, 2010Date of Patent: April 23, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Yasuyuki Arai, Ikuko Kawamata, Atsushi Miyaguchi, Yoshitaka Moriya
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Patent number: 8420462Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device in high yield are proposed. In a display device including a channel stop thin film transistor with an inverted-staggered structure, the channel stop thin film transistor with the inverted-staggered structure includes a microcrystalline semiconductor film including a channel formation region. An impurity region including an impurity element imparting one conductivity type is formed as selected in a region in the channel formation region of the microcrystalline semiconductor film which does not overlap with a source electrode or a drain electrode. In the channel formation region, a non-doped region, to which the impurity element imparting one conductivity type is not added, is formed between the impurity region, which is a doped region to which the impurity element is added, and the source region or the drain region.Type: GrantFiled: July 23, 2010Date of Patent: April 16, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Kobayashi, Ikuko Kawamata
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Patent number: 8389993Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.Type: GrantFiled: January 31, 2012Date of Patent: March 5, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Kobayashi, Ikuko Kawamata, Koji Dairiki, Shigeki Komori, Toshiyuki Isa, Shunpei Yamazaki
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Patent number: 8324018Abstract: Conductive layers having knots are adjacently formed with uniform distance therebetween. Droplets of the conductive layers are discharged to stagger centers of the droplets in a length direction of wirings so that the centers of the discharged droplets are not on the same line in a line width direction between the adjacent conductive layers. Since the centers of the droplets are staggered, parts of the conductive layers each having a widest line width (the widest width of knot) are not connected to each other, and the conductive layers can be formed adjacently with a shorter distance therebetween.Type: GrantFiled: December 18, 2009Date of Patent: December 4, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshiyuki Isa, Gen Fujii, Masafumi Morisue, Ikuko Kawamata
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Publication number: 20120298990Abstract: An object is to increase an aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over one substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using metal and a channel layer is formed of an oxide semiconductor, and a driver circuit wiring formed using metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode layer and a drain electrode layer are formed using an oxide conductor and a semiconductor layer is formed of an oxide semiconductor, and a display portion wiring formed using an oxide conductor.Type: ApplicationFiled: August 6, 2012Publication date: November 29, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Hiroyuki MIYAKE, Hideaki KUWABARA, Ikuko KAWAMATA
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Patent number: 8319725Abstract: The display device includes: a flexible display panel including a display portion in which scanning lines and signal lines cross each other; a supporting portion for supporting an end portion of the flexible display panel; a signal line driver circuit for outputting a signal to the signal line, which is provided for the supporting portion; and a scanning line driver circuit for outputting a signal to the scanning line, which is provided for a flexible surface of the display panel in a direction which is perpendicular or substantially perpendicular to the supporting portion.Type: GrantFiled: April 28, 2010Date of Patent: November 27, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satohiro Okamoto, Yasuyuki Arai, Ikuko Kawamata, Atsushi Miyaguchi, Yoshitaka Moriya
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Patent number: 8288197Abstract: It is an object of the present invention to provide a technique in which a high-performance and highly reliable semiconductor device can be manufactured at low cost with high yield. A memory device according to the present invention has a first conductive layer including a plurality of insulators, an organic compound layer over the first conductive layer including the insulators, and a second conductive layer over the organic compound layer.Type: GrantFiled: April 25, 2006Date of Patent: October 16, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mikio Yukawa, Nobuharu Ohsawa, Yoshinobu Asami, Ikuko Kawamata, Shunpei Yamazaki
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Patent number: 8242496Abstract: An object is to increase an aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over one substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using metal and a channel layer is formed of an oxide semiconductor, and a driver circuit wiring formed using metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode layer and a drain electrode layer are formed using an oxide conductor and a semiconductor layer is formed of an oxide semiconductor, and a display portion wiring formed using an oxide conductor.Type: GrantFiled: July 13, 2010Date of Patent: August 14, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroyuki Miyake, Hideaki Kuwabara, Ikuko Kawamata
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Patent number: 8232598Abstract: To provide a display device which can realize high performance of a field-effect transistor which forms a pixel of the display device and which can achieve improvement in an aperture ratio of a pixel, which has been reduced due to increase in the number of field-effect transistors, and reduction in the area of the field-effect transistor which occupies the pixel, without depending on a microfabrication technique of the field-effect transistor, even when the number of field-effect transistors in the pixel is increased. A display device is provided with a plurality of pixels in which a plurality of field-effect transistors including a semiconductor layer which is separated from a semiconductor substrate and is bonded to a supporting substrate having an insulating surface are stacked with a planarization layer interposed therebetween.Type: GrantFiled: September 15, 2008Date of Patent: July 31, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Ikuko Kawamata, Atsushi Miyaguchi
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Publication number: 20120126693Abstract: A highly reliable lighting device is provided at low cost by using a simple structure and a simple process. A lighting device with improved convenience, which has a shape suitable for a purpose and can respond to diversified applications is provided. A light-emitting panel which includes a light-emitting element provided over a flexible substrate and including an electroluminescent (EL) layer (the panel is also referred to as an “EL film”) is put in a glass housing. The EL film is flexible and thus can be provided in a variety of forms in accordance with the shape of the glass housing.Type: ApplicationFiled: November 3, 2011Publication date: May 24, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., Ltd.Inventors: Satoshi SEO, Masaaki HIROKI, Kaoru HATANO, Ikuko KAWAMATA
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Publication number: 20120129288Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.Type: ApplicationFiled: January 31, 2012Publication date: May 24, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Satoshi KOBAYASHI, Ikuko Kawamata, Koji Dairiki, Shigeki Komori, Toshiyuki Isa, Shunpei Yamazaki
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Patent number: 8183067Abstract: A display device which can be manufactured with improved material use efficiency and through a simplified manufacturing process, and a manufacturing technique thereof. A light-absorbing layer is formed, an insulating layer is formed over the light-absorbing layer, the light-absorbing layer and the insulating layer are selectively irradiated with laser light to remove an irradiated region of the insulating layer so that a first opening is formed in the insulating layer, and the light-absorbing layer is selectively removed by using the insulating layer having the first opening as a mask so that a second opening is formed in the insulating layer and the light-absorbing layer. A conductive film is formed in the second opening to be in contact with the light-absorbing layer, thereby electrically connecting to the light-absorbing layer with the insulating layer interposed therebetween.Type: GrantFiled: July 26, 2007Date of Patent: May 22, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Koichiro Tanaka, Hironobu Shoji, Ikuko Kawamata
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Patent number: 8133771Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.Type: GrantFiled: July 16, 2010Date of Patent: March 13, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Kobayashi, Ikuko Kawamata, Koji Dairiki, Shigeki Komori, Toshiyuki Isa, Shunpei Yamazaki
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Publication number: 20120045894Abstract: When a mask layer is formed, a first liquid composition containing a mask-layer-forming material is applied on an outer side of a pattern that is desired to be formed (corresponding to a contour or an edge portion of a pattern) to form a first mask layer having a frame shape. A second liquid composition containing a mask-layer-forming material is applied so as to fill a space inside the first mask layer having a frame shape to form a second mask layer. The first mask layer and the second mask layer are formed to be in contact with each other, and the first mask layer is formed to surround the second mask layer. Therefore, the first mask layer and the second mask layer can be used as one continuous mask layer.Type: ApplicationFiled: October 28, 2011Publication date: February 23, 2012Inventors: Shunpei YAMAZAKI, Hironobu SHOJI, Ikuko KAWAMATA
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Publication number: 20120012846Abstract: To provide a semiconductor device and a display device which can be manufactured through a simplified process and the manufacturing technique. Another object is to provide a technique by which a pattern of wirings or the like which is partially constitutes a semiconductor device or a display device can be formed with a desired shape with controllability.Type: ApplicationFiled: September 23, 2011Publication date: January 19, 2012Inventors: Toshiyuki Isa, Masafumi Morisue, Ikuko Kawamata
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Patent number: 8048473Abstract: When a mask layer is formed, a first liquid composition containing a mask-layer-forming material is applied on an outer side of a pattern that is desired to be formed (corresponding to a contour or an edge portion of a pattern) to form a first mask layer having a frame shape. A second liquid composition containing a mask-layer-forming material is applied so as to fill a space inside the first mask layer having a frame shape to form a second mask layer. The first mask layer and the second mask layer are formed to be in contact with each other, and the first mask layer is formed to surround the second mask layer. Therefore, the first mask layer and the second mask layer can be used as one continuous mask layer.Type: GrantFiled: June 27, 2007Date of Patent: November 1, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hironobu Shoji, Ikuko Kawamata
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Patent number: 7972935Abstract: When single crystal semiconductor layers are transposed from a single crystal semiconductor substrate (a bond wafer), the single crystal semiconductor substrate is etched selectively (this step is also referred to as groove processing), and a plurality of single crystal semiconductor layers, which are being divided in size of manufactured semiconductor elements, are transposed to a different substrate (a base substrate). Thus, a plurality of island-shaped single crystal semiconductor layers (SOI layers) can be formed over the base substrate. Further, etching is performed on the single crystal semiconductor layers formed over the base substrate, and the shapes of the SOI layers are controlled precisely by being processed and modified.Type: GrantFiled: August 18, 2010Date of Patent: July 5, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Ikuko Kawamata, Yasuyuki Arai
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Patent number: 7947981Abstract: It is an object to provide a display device including a thin film transistor which can operate at high speed and is driven at a low voltage in a drive circuit region, and a thin film transistor having high voltage-resistance and high reliability in a pixel region. Accordingly, it is an object to provide a high reliable display device which consumes less power. A display device including a pixel region and a drive circuit region over a substrate having an insulating surface is provided. A thin film transistor is provided in each of the pixel region and the drive circuit region. A channel formation region in a semiconductor layer of the thin film transistor provided in the drive circuit region is formed to be locally thin, and the thickness of the channel formation region is smaller than that in the pixel region.Type: GrantFiled: January 14, 2008Date of Patent: May 24, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Ikuko Kawamata, Yasuyuki Arai
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Publication number: 20110086475Abstract: In order to form a plurality of semiconductor elements over an insulating surface, in one continuous semiconductor layer, an element region serving as a semiconductor element and an element isolation region having a function to electrically isolate element regions from each other by repetition of PN junctions. The element isolation region is formed by selective addition of an impurity element of at least one or more kinds of oxygen, nitrogen, and carbon and an impurity element that imparts an opposite conductivity type to that of the adjacent element region in order to electrically isolate elements from each other in one continuous semiconductor layer.Type: ApplicationFiled: December 15, 2010Publication date: April 14, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Yasuyuki ARAI, Ikuko KAWAMATA