Abstract: A method for forming a nanostructure penetrating a layer and the device made thereof is disclosed. In one aspect, the device has a substrate, a layer present thereon, and a nanostructure penetrating the layer. The nanostructure defines a nanoscale passageway through which a molecule to be analyzed can pass through. The nanostructure has, in cross-sectional view, a substantially triangular shape. This shape is particularly achieved by growth of an epitaxial layer having crystal facets defining tilted sidewalls of the nanostructure. It is highly suitably for use for optical characterization of molecular structure, particularly with surface plasmon enhanced transmission spectroscopy.

Abstract: Described herein is a low-voltage unidirectional bypass element connected across a solar cell and operable to allow current to flow when the operation of the solar cell is suspended. The bypass element includes a single field effect transistor connected between first and second terminals as a switch, and a detection circuit for detecting suspension of the solar cell's operation and activating the switch to bypass the solar cell in the event of its operation suspension. Diodes are connected in parallel with the normally-open switch and receive current, when the solar cell's operation is suspended, to trigger operation of the detection circuit. The detection circuit includes a charge pump, a timer circuit, a control generation unit and a switch control circuit. The switch control circuit generates a control signal to close the switch and to allow current to bypass the solar cell.

Abstract: A method is disclosed for determining the inactive doping concentration of a semiconductor region using a PMOR method. In one aspect, the method includes providing two semiconductor regions having substantially the same known as-implanted concentration but known varying junction depths. The method includes determining on one of these semiconductor regions the as-implanted concentration. The semiconductor regions are then partially activated. PMOR measures are then performed on the partially activated semiconductor regions to measure (a) the signed amplitude of the reflected probe signal as function of junction depth and (b) the DC probe reflectivity as function of junction depth. The method includes extracting from these measurements the active doping concentration and then calculating the inactive doping concentration using the determined total as-implanted concentration and active doping concentration.

Abstract: The present disclosure relates to a front-end system for a radio device, the front-end system comprising a low-noise amplifier (LNA), arranged for receiving a radio frequency input signal (RFIN) and arranged for outputting an amplified radio frequency signal (RFOUT), wherein the low-noise amplifier comprises a first differential amplifier, and a mixer (MIX), arranged for down-converting the amplified radio signal (RFOUT) provided by the low-noise amplifier (LNA) to a baseband signal (BB), by multiplying the amplified radio signal (RFOUT) with a local oscillator (LO) frequency tone, said low-noise amplifier (LNA) and said mixer (MIX) being inductively coupled.

Abstract: The present disclosure relates to an injection-locked local oscillator and a method for calibrating the same. The local oscillator includes an active circuit having at least one first resonator connected to the output of the active circuit, and at least one second resonator coupled to the at least one first resonator, thereby forming at least one coupled resonator. In another aspect, the present disclosure relates to a method for calibrating a local oscillator, the calibration being a two-step calibration based mainly on power measurement.

Abstract: An ADC includes sampling means for sampling an input voltage signal, comparator(s) for receiving the sampled signal, and a DAC including circuitry for generating a search signal approximating the input signal and a calibration signal. The search signal and the calibration signal are to be applied to a comparator. The ADC also includes a search logic block for receiving a comparator output signal, for providing input to the DAC for generating the search signal, and for producing a digital output signal. Further, the ADC includes a calibration logic block for producing a control signal to control the circuitry of the DAC and including processing means for observing the output signal, for comparing the output signal with a desired output, and for compensating analogue non-idealities of the ADC. The DAC circuitry is adapted for generating the calibration signal in accordance with the control signal and with the sampled input signal.

Abstract: A device including a sample and hold circuit for providing a signal related to an input analogue current signal, by sampling the input analogue current signal and integrating it on capacitive means, thereby charging the capacitive means to a charge value. The capacitive means being configurable to dynamically change its effective capacitance value in order to shape a voltage signal present on the capacitive means such that the charge value remains unchanged. The device also including an analogue-to digital conversion (ADC) and control circuit arranged for performing an ADC of the at least one related signal at the output of the sample and hold circuit into an output digital signal, the ADC and control circuit including successive approximation ADC means for considering the value of the voltage signal on the capacitive means and converting the charge value present in the capacitive means into the digital output signal.

Abstract: A conductive-bridge random access memory device is disclosed comprising a second metal layer configured to provide second metal cations; a layer of insulator adjacent to the second metal layer; the layer of insulator comprising a layer of first insulator and a layer of second insulator; the layer of second insulator being adjacent to the second metal layer; a first metal layer adjacent to the layer of first insulator, the first metal layer being opposite to the second metal layer; wherein the density of the layer of second insulator is higher than the density of the layer of first insulator.

Abstract: A method for determining an active dopant concentration profile of a semiconductor substrate based on optical measurements is disclosed. The active dopant concentration profile includes a concentration level and a junction depth. In one aspect, the method includes obtaining a photomodulated reflectance (PMOR) amplitude offset curve and a PMOR phase offset curve for the semiconductor substrate based on PMOR measurements, determining a decay length parameter based on a first derivative of the amplitude offset curve, determining a wavelength parameter based on a first derivative of the phase offset curve, and determining, from the decay length parameter and the wavelength parameter, the concentration level and the junction depth of the active dopant concentration profile.

Abstract: Disclosed is a method for selecting a design option for a Viterbi decoder model. In some embodiments, the method includes deriving a set of design options for a Viterbi decoder model by differentiating at least one design parameter, where the at least one design parameter comprises at least a first value for a look-ahead parameter. The method further includes performing an evaluation of each design option in the set of design options in a multi-dimensional design space and, based on the evaluation of each design option, selecting a design option in the set of design options that (i) satisfies a predetermined energy efficiency constraint and (ii) yields at least a second value for the look-ahead parameter, wherein the second value is greater than the first value and satisfies a predetermined area budget.

Abstract: A nonvolatile memory device is disclosed comprising a metal-to-insulator transition material thermally coupled to a Peltier element. During programming, a selected current is flowing through the Peltier element, the level thereof determining whether the temperature of the Peltier element and hence of the thermally coupled metal-to-insulator transition material decreases or increases. In response to this temperature change, the metal-to-insulator transition material will change from one electrical conduction phase to another. The memory device is read by applying current through the metal-to-insulator transition material, the current level being selected to maintain the phase of the metal-to-insulator transition material.

Abstract: A built-in self-calibration system and method for a micro-mirror array device, for example, operating as a variable focal length lens is described. The calibration method comprises determining a capacitance value for each micro-mirror element in the array device at a number of predetermined reference angles to provide a capacitance-reference angle relationship. From the capacitance values, an interpolation step is carried to determine intermediate tilt angles for each micro-mirror element in the array. A voltage sweep is applied to the micro-mirror array and capacitance values, for each micro-mirror element in the array, are measured. For a capacitance value that matches one of the values in the capacitance-reference angle relationship, the corresponding voltage is linked to the associated tilt angle to provide a voltage-tilt angle characteristic which then stored in a memory for subsequent use.

Abstract: A complementary logic technology is disclosed whereby a logic gate comprises at least two metal-to-insulator transition (MIT) elements and at least two thermoelectric elements, each MIT element being thermally coupled to a corresponding thermoelectric element. In logic gates, each electric signal at an input terminal of a logic gate is first converted into two complementary thermal signals, and these thermal signals in turn determine the status of the output terminal of the logic gate, thereby generating an electrical output signal inverse to the electrical input signal or an output signal which is a Boolean operation on input signals. The parallel connection(s) of thermoelectric elements of the logic gate is used to create corresponding thermal signals for each electrical input signal. The MIT elements of the logic gate are then arranged to, in response to the associated thermal signals, execute a Boolean operation.

Abstract: A method of manufacturing a semiconductor device is disclosed. In one aspect, the method includes: forming a dummy gate over a substrate layer; forming first gate insulating spacers adjacent to sidewalls of the dummy gate and over the substrate layer, the first spacers having two sidewalls and two surface profiles where the sidewalls meet the substrate layer; forming a source and drain region using the surface profiles; forming second gate insulating spacers adjacent to the sidewalls of the first spacers and over the source and drain regions; removing the dummy gate and the first spacers, thereby forming a first recess; depositing a dielectric layer in the first recess along the side walls of the second spacers and over the substrate layer, thereby forming a second recess; and depositing a gate electrode in the second recess.

Abstract: A method is provided for producing a LED device, comprising a stack of layers comprising a light producing layer the light producing layer not being the top or bottom layer of the stack, wherein a layer at the top or bottom of the stack is subjected to a texturization aimed at enhancing the light extraction efficiency of the LED, wherein the texturization comprises the step of producing on the top or bottom surface a plurality of surface features, the surface features being arranged according to a pattern defined by starting from a regular pattern of features and subjecting each feature of the regular pattern to a deviation from the location in the regular pattern, the deviation being in a random direction and/or having a random amplitude. According to another embodiment, a random deviation is applied to one or more dimensions of the features in the regular pattern.

Abstract: A method for measuring a concentration of a biogenic substance in a living body includes steps of: preparing an apparatus including a light source, a substrate which has periodic metal structures and generates surface enhanced Raman scattering light by being irradiated with light from the light source, and spectroscopic means which disperses and detects the light, wherein the periodic metal structure is arranged with first and second distances in first and second direction respectively, the first distance is set to generate surface plasmon by matching a phase of the light from the light source, and the second distance is smaller than the first distance and is set between 300 nm and 350 nm; irradiating the substrate with the light from the light source to generate the surface enhanced Raman scattering; detecting the scattering with the spectroscopic means; and calculating the concentration of the biogenic substance based on the scattering.

Abstract: A programmable device suitable for software defined radio terminal is disclosed. In one aspect, the device includes a scalar cluster providing a scalar data path and a scalar register file and arranged for executing scalar instructions. The device may further include at least two interconnected vector clusters connected with the scalar cluster. Each of the at least two vector clusters provides a vector data path and a vector register file and is arranged for executing at least one vector instruction different from vector instructions performed by any other vector cluster of the at least two vector clusters.

Abstract: An implant free quantum well transistor wherein the doped region comprises an implant region having an increased concentration of dopants with respect to the concentration of dopants of adjacent regions of the substrate, the implant region being substantially positioned at a side of the quantum well region opposing the gate region.

Abstract: A tunnel Field Effect Transistor is provided comprising an interface between a source and a channel, the source side of this interface being a layer of a first crystalline semiconductor material being substantially uniformly doped with a metal to the solubility level of the metal in the first crystalline material and the channel side of this interface being a layer of this first crystalline semiconductor material doped with this metal, the concentration decreasing towards the channel.

Abstract: A method and system are described for performing extreme ultraviolet photolithographic processing. The method comprises obtaining a substrate comprising a hard mask and a patterned layer of extreme ultraviolet (EUV) photoresist formed above the hard mask, encapsulating the patterned layer of EUV photoresist by forming an encapsulating layer being one of a silicon-oxide, silicon-nitride, silicon-oxynitride, germanium-oxide, germanium-nitride, germanium-oxynitride, silicongermanium-oxide, silicongermanium-nitride, silicongermanium-oxynitride layer on the photoresist and dry etching of the substrate for patterning the hard mask. The encapsulation layer thereby is formed at a temperature below the weakening temperature Tg of the EUV photoresist by using a first precursor being one of the group of silicon-tetrahalogenide, silicon tetrahydride, germanium-tetrahalogenide, germanium tetrahydride, silicongermanium-tetrahalogenide or silicongermanium tetrahydride precursor and an oxygen precursor.