Patents by Inventor In Ki Jeon

In Ki Jeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110014760
    Abstract: A method of forming a field effect transistor (FET) includes: forming a drift region comprising a stack of alternating conductivity type silicon layers; forming a drain region of a first conductivity type extending into the stack of alternating conductivity type silicon layers; forming a trench gate extending into the stack of alternating conductivity type silicon layers, the trench gate having a non-active sidewall and an active sidewall being perpendicular to one another; and forming a body region of a second conductivity type adjacent to the active sidewall of the trench gate, wherein the trench gate and the drain region are formed such that the non-active sidewall of the trench gate faces the drain region.
    Type: Application
    Filed: September 27, 2010
    Publication date: January 20, 2011
    Inventors: Chang-ki Jeon, Gary Dolny
  • Publication number: 20100320537
    Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device.
    Type: Application
    Filed: August 30, 2010
    Publication date: December 23, 2010
    Applicant: Fairchild Korea Semiconductor, Ltd.
    Inventors: Jong-ho Park, Chang-ki Jeon, Hyi-Jeong Park, Hye-mi Kim
  • Patent number: 7851341
    Abstract: A semiconductor device is provided including a transistor element on a substrate, a silicide on a gate and a source/drain of the transistor element; and an amorphous capping layer on the silicide.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: December 14, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Dong Ki Jeon
  • Publication number: 20100271079
    Abstract: Disclosed is a power semiconductor device including a bootstrap circuit. The power semiconductor device includes a high voltage unit that provides a high voltage control signal so that a high voltage is output; a low voltage unit that provides a low voltage control signal so that a ground voltage is output, and is spaced apart from the high voltage unit; a charge enable unit that is electrically connected to the low voltage unit and charges a bootstrap capacitor for supplying power to the high voltage unit when the high voltage is output, when the ground voltage is output; and a high voltage cut-off unit that cuts off the high voltage when the high voltage is output so that the high voltage is not applied to the charge enable unit, and includes a first terminal electrically connected to the charge enable unit and a second terminal electrically connected to the high voltage unit.
    Type: Application
    Filed: April 20, 2010
    Publication date: October 28, 2010
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventors: Yongcheol CHOI, Chang-Ki JEON, Minsuk KIM, Donghwan KIM
  • Publication number: 20100253640
    Abstract: A touch screen display device includes; a touch screen display panel including; first sensing lines which extend in a first direction, second sensing lines which extend in a second direction , and a plurality of touch sensors located at a plurality of sensing positions, each of which provides touch data or untouch data, a readout unit which reads the touch data or the untouch data and outputs the read data as sensing data corresponding to each of the sensing positions, and a sensing unit which groups the sensing positions into at least one pre-touch areas using the sensing data and which recognizes at least one touch positions using the pre-touch areas, wherein when first and third sensing positions from among first through third sensing positions provide the touch data while the second sensing position provides the untouch data, the sensing unit recognizes the untouch data as the touch data.
    Type: Application
    Filed: December 1, 2009
    Publication date: October 7, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Zhi-Feng ZHAN, Byung-Ki JEON, Jong-Woung PARK
  • Patent number: 7803676
    Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: September 28, 2010
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Jong-ho Park, Chang-Ki Jeon, Hyi-Jeong Park, Hye-mi Kim
  • Patent number: 7804150
    Abstract: A field effect transistor includes a trench gate extending into a semiconductor region. The trench gate has a front wall facing a drain region and a side wall perpendicular to the front wall. A channel region extends along the side wall of the trench gate, and a drift region extends at least between the drain region and the trench gate. The drift region includes a stack of alternating conductivity type silicon layers.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: September 28, 2010
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Chang-ki Jeon, Gary Dolny
  • Patent number: 7797428
    Abstract: A system and method for providing an Internet Protocol (IP)-based service in a communication system are provided. In an IP Multimedia Subsystem (IMS) communication system, a menu server generates a service object based on service capability information of a subscriber received from a service provider, and a terminal activates the service object received from the menu server so that the subscriber can easily use services. The user can select one of services from a service menu displayed on the terminal and immediately implement the selected service.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: September 14, 2010
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Joon-Ho Jung, Young-Ky Kim, Young-Ki Jeon
  • Publication number: 20100214705
    Abstract: An electrostatic discharge (ESD) protection element includes a first diode, a second diode, and a poly resistor. The first diode is connected between a first voltage and an input/output (I/O) pad. The second diode is connected between the I/O pad and a second voltage. The poly resistor is formed on the second diode.
    Type: Application
    Filed: February 12, 2010
    Publication date: August 26, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Suk-Jin Kim, Han-Gu Kim, Jae-Hyok Ko, Hyo-Cheol Ban, Min-Chang Ko, Kyoung-Ki Jeon
  • Patent number: 7780624
    Abstract: Disclosed herein is an apparatus for removing fine tumor cells, which remain around a treatment area of patient body, from which a tumor is eliminated, after surgery for removing the tumor has been conducted. The apparatus of the present invention includes a main body, which has a supply tube and a discharge tube that circulate liquid supplied from a storage tank, which is provided outside, and a therapeutic member, which is integrally coupled to an extension pipe that is coupled to the main body and surrounds the supply tube and the discharge tube. A cavity, which communicates with the supply tube and the discharge tube and is supplied with the liquid, is defined in the therapeutic member. The apparatus further includes a temperature sensing unit, which measures a temperature of a treatment area of a patient.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: August 24, 2010
    Assignee: National Cancer Center
    Inventors: Seung-Hoon Lee, Yung-Ho Jo, Heon Yoo, Sang-Hoon Shin, Heung-Ki Jeon
  • Patent number: 7777524
    Abstract: Provided are a high-voltage semiconductor device including a junction termination which electrically isolates a low voltage unit from a high voltage unit, and a method of fabricating the same. The high voltage semiconductor device includes a high voltage unit, a low voltage unit surrounding the high voltage unit, and a junction termination formed between the high voltage unit and the low voltage unit and surrounding the high voltage unit to electrically isolate the high voltage unit from the low voltage unit. The junction termination includes at least one level shifter which level shifts signals from the low voltage unit and supplies the same to the high voltage unit, a first device isolation region surrounding the high voltage unit to electrically isolate the high voltage unit from the level shifter, and a resistor layer electrically connecting neighboring level shifters.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: August 17, 2010
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Chang-ki Jeon, Min-suk Kim, Yong-cheol Choi
  • Patent number: 7760021
    Abstract: The present invention relates to a variable gain amplifier. The variable gain amplifier in an ultrasound includes an attenuator. The attenuator includes resistor strings each having a plurality of resistors connected in series to each other and a gain control unit. The gain control unit has tap inputs taken from a plurality of junctions between a first resistor string receiving a first input signal and a second resistor string receiving a second input signal. The gain control unit is configured to provide an attenuated differential input signal based on the tap inputs. The variable gain amplifier includes an amplifying unit having a feedback amplifying section configured to amplify the attenuated differential input signal to output a first amplified signal and a clipping amplifying section configured to amplify the first amplified signal to output a second amplified signal that falls within a predetermined voltage range.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: July 20, 2010
    Assignee: Medison Co., Ltd.
    Inventors: Chang Sun Kim, Ki Jeon
  • Publication number: 20100128721
    Abstract: An apparatus and a method for providing other Voice over Internet Protocol (VoIP) services (e.g., Skype, Google talk, and the like) using a terminal which supports an IP Multimedia Subsystem (IMS) network are provided. The apparatus includes an interworking apparatus for converting information received from a VoIP service network to information supportable by an IMS terminal to interwork the IMS terminal and other VoIP services not supported by the IMS terminal, and converting information received from the IMS terminal to information supportable by a VoIP service network.
    Type: Application
    Filed: November 23, 2009
    Publication date: May 27, 2010
    Applicant: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Shi-Jae LEE, Young-Ki JEON, Joon-Ho JUNG
  • Patent number: 7709381
    Abstract: A semiconductor device fabricating method may include forming an insulating layer on a semiconductor substrate; forming a through hole with a first depth in the insulating layer and the semiconductor substrate; forming a metal layer thereon, thereby forming a through electrode in the through hole; and exposing the through electrode by polishing the bottom surface of the semiconductor substrate.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: May 4, 2010
    Assignee: Dongbu Hi Tek Co., Ltd.
    Inventors: Jaewon Han, Dong Ki Jeon
  • Publication number: 20100082726
    Abstract: A presence service providing system and method is disclosed that provides presence information regarding presentities to watchers. The presence system sets mapping information, which contains the presence information that matches position information corresponding to at least one presentity. When the position information is received via a positioning system, the presence system detects the presence information, which matches the received position information, from the set mapping information. The detected presence information is transmitted from the presence system to a watcher. The presence service providing system can provide a variety of presence information according to the location of the presentity, so that watchers can more specifically and clearly identify the states of the presentity from the presence information.
    Type: Application
    Filed: September 28, 2009
    Publication date: April 1, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Su KIM, Young Ki JEON
  • Patent number: 7666762
    Abstract: A method for fabricating a semiconductor device is provided. A nickel layer is deposited on a semiconductor substrate and plasma-processed. Rapid thermal processing is performed on the plasma-processed nickel layer to form a nickel silicide layer. The portion of the nickel layer that has not reacted with silicon is then removed.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: February 23, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventors: Dong Ki Jeon, Han Choon Lee
  • Patent number: 7655979
    Abstract: There is provided a high voltage gate driver integrated circuit. The high voltage gate driver integrated circuit includes: a high voltage region; a junction termination region surrounding the high voltage region; a low voltage region surrounding the junction termination region; a level shift transistor disposed between the high voltage region and the low voltage region, at least some portions of the level shift transistor being overlapped with the junction termination region; and/or a high voltage junction capacitor disposed between the high voltage region and the low voltage region, at least some portions of the high voltage junction capacitor being overlapped with the junction termination region.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: February 2, 2010
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Chang-Ki Jeon, Sung-Iyong Kim, Tae-hun Kwon
  • Patent number: 7656232
    Abstract: The present invention relates to a variable gain amplifier. The variable gain amplifier includes an input unit including first and second input nodes and an output node, the input unit being configured to receive first and second input signals. The variable gain amplifier further includes a first clipping unit operable to clip a voltage level at the output node to be equal to or lower than a level of a first reference voltage and a second clipping unit operable to clip a voltage level at the output node to be equal to or greater than a level of a second reference voltage, wherein the second reference voltage is lower than the first reference voltage. A predetermined level of a voltage is outputted through an output unit included in the variable gain amplifier based on the clipped voltage level.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: February 2, 2010
    Assignee: Medison Co., Ltd.
    Inventors: Chang Sun Kim, Ki Jeon
  • Publication number: 20100001343
    Abstract: Provided are a high voltage semiconductor device in which a field shaping layer is formed on the entire surface of a semiconductor substrate and a method of fabricating the same. Specifically, the high voltage semiconductor device includes a first conductivity-type semiconductor substrate. A second conductivity-type semiconductor layer is disposed on a surface of the semiconductor substrate, and a first conductivity-type body region is formed in semiconductor layer. A second conductivity-type source region is formed in the body region. A drain region is formed in the semiconductor layer and is separated from the body region. The field shaping layer is formed on the entire surface of the semiconductor layer facing the semiconductor layer.
    Type: Application
    Filed: July 1, 2009
    Publication date: January 7, 2010
    Applicant: Fairchild Korea Semiconductor Ltd.
    Inventors: Yong-cheol CHOI, Chang-ki JEON, Min-suk KIM
  • Patent number: 7605040
    Abstract: A method of forming a metal oxide semiconductor (MOS) transistor includes the following steps. A substrate of a first conductivity is provided. A first buried layer of a second conductivity type is formed over the substrate. A second buried layer of the first conductivity type is formed in the first buried layer. An epitaxial layer of the second conductivity type is formed over the substrate. A drift region of a second conductivity type is formed in the epitaxial layer. A gate layer is formed over the drift region. A body region of the first conductivity type is formed in the drift region such that the gate overlaps a surface portion of the body region. A source region of the second conductivity is formed in the body region. A drain region of the second conductivity type is formed in the drift region. The drain region is laterally spaced from the body region. The first and second buried layers laterally extend from under the body region to under the drain region.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: October 20, 2009
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Yong-cheol Choi, Chang-ki Jeon, Cheol-joong Kim