Abstract: A nonvolatile memory device is provided which includes a cell array including a plurality of memory cells; a page buffer unit including a plurality of page buffers and configured to sense whether programming of selected memory cells is completed, at a program verification operation; and a control logic configured to provide a set pulse for setting data latches of each of the page buffers to a program inhibit state according to the sensing result, wherein the control logic provides the set pulse to at least two different page buffers such that data latches of the at least two different page buffers are set.

Abstract: A method for fabricating a semiconductor device includes forming an insulation layer over a substrate; forming an open portion in the insulation layer; forming a sacrificial spacer over sidewalls of the open portion; forming, over the sacrificial spacer, a first conductive pattern in a lower section of the open portion; forming an ohmic contact layer over the first conductive pattern; forming an air gap by removing the sacrificial spacer; capping the air gap by forming a barrier layer over the ohmic contact layer; and forming a second conductive pattern over the barrier layer to fill an upper section of the open portion.

Abstract: Disclosed are a phenyl-isoxazol derivative compound, which is useful as a treatment material for virus infection, especially, infection of an influenza virus, or its pharmaceutically acceptable derivative, a preparation method thereof, and an illness treatment pharmaceutical composition including the compound as an active ingredient.

Abstract: A semiconductor device includes a dielectric structure which has an opening exposing a surface of a substrate; and a conductive structure which is formed in the opening, wherein the conductive structure comprises: a first conductive pattern recessed in the opening; a second conductive pattern covering a top surface and sidewalls of the first conductive pattern; an air gap defined between sidewalls of the opening and the second conductive pattern; and a third conductive pattern capping the second conductive pattern and the air gap.

Abstract: A semiconductor device includes a dielectric structure which has an opening exposing a surface of a substrate; and a conductive structure which is formed in the opening, wherein the conductive structure comprises: a first conductive pattern recessed in the opening; a second conductive pattern covering a top surface and sidewalls of the first conductive pattern; an air gap defined between sidewalls of the opening and the second conductive pattern; and a third conductive pattern capping the second conductive pattern and the air gap.

Abstract: A semiconductor device includes a substrate having a plurality of contact surfaces, an interlayer dielectric layer formed over the substrate and having a first open portion which exposes a part of the contact surfaces and a second open portion which exposes the other contact surfaces, a storage node contact (SNC) plug filling the first open portion, and a damascene structure filing the second open portion and including a bit line, a spacer formed on both sidewalls of the bit line, a capping layer formed over the bit line and the spacer, and an air gap formed between the bit line and the spacer. The bit line includes a conductive material of which the volume is contracted by a heat treatment to form the air gap.

Abstract: A semiconductor device includes a plurality of first conductive structures formed over a substrate, second conductive structures each formed between neighboring first conductive structures of the first conductive structures, air gaps each formed between the second conductive structures and the neighboring first conductive structures thereof, third conductive structures each capping a portion of the air gaps, and capping structures each capping the other portion of the air gaps.

Abstract: A semiconductor device includes a dielectric structure which has an opening exposing a surface of a substrate; and a conductive structure which is formed in the opening, wherein the conductive structure comprises: a first conductive pattern recessed in the opening; a second conductive pattern covering a top surface and sidewalls of the first conductive pattern; an air gap defined between sidewalls of the opening and the second conductive pattern; and a third conductive pattern capping the second conductive pattern and the air gap.

Abstract: A semiconductor device includes a substrate having a plurality of contact surfaces, an interlayer dielectric layer formed over the substrate and having a first open portion which exposes a part of the contact surfaces and a second open portion which exposes the other contact surfaces, a storage node contact (SNC) plug filling the first open portion, and a damascene structure filing the second open portion and including a bit line, a spacer formed on both sidewalls of the bit line, a capping layer formed over the bit line and the spacer, and an air gap formed between the bit line and the spacer. The bit line includes a conductive material of which the volume is contracted by a heat treatment to form the air gap.

Abstract: Provided are a Phase-change Random Access Memory (PRAM) device and a method of manufacturing the same. In particular, a PRAM device including a heating layer, wherein the heating layer comprises first and second heating layers having different physical properties from each other and a method of manufacturing the same are provided. Since the PRAM device according to the present invention includes a heating layer having optimal heating characteristics, a PRAM device having high reliability and excellent operating characteristics can be manufactured.

Abstract: Provided is an apparatus and method for controlling a portable terminal. The apparatus includes a contact sensing unit which senses an area of an external surface of the portable terminal contacted by a user as the user holds the portable terminal, a recognizing unit which recognizes a function mode of the portable terminal based on information about the contacted area sensed by the contact sensing unit, and a control unit which changes the portable terminal to a function mode recognized by the recognizing unit. Since a function mode of the portable terminal is controlled according to the way a user holds the portable terminal, convenience of changing a function mode of the portable terminal is provided through a single manipulation.

Abstract: A method for fabricating a semiconductor device includes forming an insulation layer over a substrate; forming an open portion in the insulation layer; forming a sacrificial spacer over sidewalls of the open portion; forming, over the sacrificial spacer, a first conductive pattern in a lower section of the open portion; forming an ohmic contact layer over the first conductive pattern; forming an air gap by removing the sacrificial spacer; capping the air gap by forming a barrier layer over the ohmic contact layer; and forming a second conductive pattern over the barrier layer to fill an upper section of the open portion.

Abstract: Disclosed is a cell chip and methods for the use thereof, wherein the cell chip includes a substrate made of an opaque material and having a plurality of insertion holes formed therein, a filler made of a transparent material and inserted into each of the insertion holes so as to protrude from the substrate, and a biomatrix which is formed on the filler and immobilizes a biomaterial. Also, another substrate having a plurality of wells which store a fluid is further provided thus forming a 3D cell chip.

Abstract: A method for fabricating a semiconductor device includes forming a semiconductor structure having an open portion over a substrate, forming a sacrificial spacer on sidewalls of the open portion, forming a recessed first plug in the open portion, forming an air gap by removing the sacrificial spacer, forming a capping layer to expose the top surface of the recessed first plug and to cap the air gap, forming a protective layer over the capping layer and the recessed first plug, forming an ohmic contact layer over the protective layer, and forming a second plug over the ohmic contact layer.

Abstract: There is provided a fluid discharging device including: a first pressure generating unit generating a first pressure for discharging a fluid; a second pressure generating unit generating a second pressure for discharging a fluid, and being controllable so as to change a magnitude of the second pressure; and a nozzle discharging the fluid pressurized by the first and second pressure generating units.

Abstract: This technology provides a semiconductor device and a method of fabricating the same, which may reduce parasitic capacitance between adjacent conductive structures. The method of fabricating a semiconductor device may include forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers over sidewalls of the contact holes, forming first plugs recessed into the respective contact holes, forming air gaps by removing the sacrificial spacers, forming capping structures capping the air gaps while exposing top surfaces of the first plugs, and forming second plugs over the first plugs.

Abstract: A method for fabricating a semiconductor device includes forming a semiconductor structure having an open portion over a substrate, forming a sacrificial spacer on sidewalls of the open portion, forming a recessed first plug in the open portion, forming an air gap by removing the sacrificial spacer, forming a capping layer to expose the top surface of the recessed first plug and to cap the air gap, forming a protective layer over the capping layer and the recessed first plug, forming an ohmic contact layer over the protective layer, and forming a second plug over the ohmic contact layer.

Abstract: A nonvolatile memory device is provided which includes a cell array including a plurality of memory cells; a page buffer unit including a plurality of page buffers and configured to sense whether programming of selected memory cells is completed, at a program verification operation; and a control logic configured to provide a set pulse for setting data latches of each of the page buffers to a program inhibit state according to the sensing result, wherein the control logic provides the set pulse to at least two different page buffers such that data latches of the at least two different page buffers are set.

Abstract: There is provided a cell chip including: a first substrate having biomaterials fixed thereto; a second substrate provided with one or more receiving space in which a culture medium is stored; and a circulation unit circulating the culture medium stored in the receiving space.

Abstract: Provided are a phase-change memory device using a phase-change material having a low melting point and a high crystallization speed, and a method of fabricating the same. The phase-change memory device includes an antimony (Sb)-selenium (Se) chalcogenide SbxSe100-x phase-change material layer contacting a heat-generating electrode layer exposed through a pore and filling the pore. Due to the use of SbxSe100-x in the phase-change material layer, a higher-speed, lower-power consumption phase-change memory device than a GST memory device can be manufactured.