Abstract: An image processing method and analog front end circuit are described. An analog signal is converted to digital form to obtain a digital signal by increasing a conversion resolution value of an analog-to-digital converter module. The digital signal is subsequently amplified to obtain an amplified digital output signal.

Abstract: A method and apparatus for analog-to-digital pipeline conversion are described. The apparatus includes a sample/hold circuit having an input to receive an analog input voltage, a comparator device coupled to the input of the sample/hold circuit to receive the analog input voltage, and a separate gain circuit coupled to an output of the sample/hold circuit and to the comparator device. The sample/hold circuit and the comparator device sample the analog input voltage and the separate gain circuit amplifies an analog residue voltage obtained from the analog input voltage to obtain an amplified analog residue voltage in a first phase of a non-overlapping clock. The analog residue voltage is obtained in a second phase of the non-overlapping clock, when the sample/hold circuit holds the analog input voltage sampled in the first phase, and the comparator device compares the analog input voltage sampled in the first phase with a reference voltage value.

Abstract: Embodiments of a dual input differential amplifier are described. The dual input differential amplifier includes multiple input devices forming at least two sets of differential inputs for an operational amplifier, and multiple switches within the operational amplifier, each switch being coupled to a corresponding input device to switch an active input set of the at least two sets in order to enable a reduction in residual charge associated with switching at an output of the corresponding switch.

Abstract: A method and apparatus for an improved A/D technique, and an architecture utilizing this technique is disclosed. By performing multiple conversions with circuit elements in a different arrangement for each conversion, and combining the results, an A/D technique that has reduced nonlinearities is achieved. By performing conversions in a cyclic architecture a power savings may be achieved.

Abstract: A low-voltage reference circuit is provided wherein (i) the output voltage can be set to be a fraction of the silicon bandgap voltage of 1.206 volts, or on the order of 0.9 volts, (ii) the output voltage can have a zero thermal coefficient (TC), and (iii) the operating supply voltage Vcc can be less than 1.5 volts, or on the order of 1.1 volts. In one embodiment, the reference circuit modifies a conventional Brokaw bandgap circuit to lower both the required Vcc level and the output voltage by a constant offset. Referring to FIG. 3, the modification includes adding bipolar transistor (Q6), an opamp (A3) and resistors (R5, R6 and R7). In another embodiment, the reference circuit modifies a conventional circuit with PNP transistors connected to the substrate, referring to FIG. 4, by adding current source I6, NMOS transistor M3, opamp A4 and resistors R8-R10. A further embodiment modifies FIG. 4, referring to FIG. 5, by omitting the current source I6, and moving the location of resistor R4.

Abstract: A thermostat circuit (FIG. 4) is provided which (i) works properly with very low supply voltages, (ii) does not need a separate constant value as a reference, and (iii) has improved temperature sensitivity over prior art thermostat circuits. The thermostat circuit compares two reference currents—IPTAT and IVBE. When IVBE>IPTAT, the output of the thermostat circuit is one logic state (either high or low). When IPTAT>IVBE, the output of the thermostat circuit is a different logic state (either low or high). Current IPTAT comes from a PTAT current generator (FIGS. 5-7), and current IVBE comes from a VBE current generator (FIGS. 8-10). The PTAT current generator and the VBE current generator may be implemented with cascode amplifiers. In an embodiment, the currents IPTAT and IVBE can be compared at a current comparator circuit (FIG. 11) with a summing node and an output node.

Abstract: A method and apparatus to generate an optimum common-mode voltage in analog differential circuits are described. A first output voltage is generated as a function of a power supply voltage and a positive saturation voltage in a differential amplifier circuit A second output voltage is then generated as a function of a negative saturation voltage in the differential amplifier circuit. An optimum common-mode level output voltage is then calculated as an average of said first output voltage and said second output voltage to obtain a linear output range of said differential amplifier circuit.

Abstract: A low-voltage reference circuit is provided wherein (i) the output voltage can be set to be a fraction of the silicon bandgap voltage of 1.206 volts, or on the order of 0.9 volts, (ii) the output voltage can have a zero thermal coefficient (TC), and (iii) the operating supply voltage Vcc can be less than 1.5 volts, or on the order of 1.1 volts. In one embodiment, the reference circuit modifies a conventional Brokaw bandgap circuit to lower both the required Vcc level and the output voltage by a constant offset. Referring to FIG. 3, the modification includes adding bipolar transistor (Q6), an opamp (A3) and resistors (R5, R6 and R7). In another embodiment, the reference circuit modifies a conventional circuit with PNP transistors connected to the substrate, referring to FIG. 4, by adding current source I6, NMOS transistor M3, opamp A4 and resistors R8-R10. A further embodiment modifies FIG. 4, referring to FIG. 5, by omitting the current source I6, and moving the location of resistor R4.

Abstract: A low-voltage reference circuit is provided wherein (i) the output voltage can be set to be a fraction of the silicon bandgap voltage of 1.206 volts, or on the order of 0.9 volts, (ii) the output voltage can have a zero thermal coefficient (TC), and (iii) the operating supply voltage Vcc can be less than 1.5 volts, or on the order of 1.1 volts. In one embodiment, the reference circuit modifies a conventional Brokaw bandgap circuit to lower both the required Vcc level and the output voltage by a constant offset. Referring to FIG. 3, the modification includes adding bipolar transistor (Q6), an opamp (A3) and resistors (R5, R6 and R7). In another embodiment, the reference circuit modifies a conventional circuit with PNP transistors connected to the substrate, referring to FIG. 4, by adding current source I6, NMOS transistor M3, opamp A4 and resistors R8-R10. A further embodiment modifies FIG. 4, referring to FIG. 5, by omitting the current source I6, and moving the location of resistor R4.

Abstract: A low-voltage reference circuit is provided wherein (i) the output voltage can be set to be a fraction of the silicon bandgap voltage of 1.206 volts, or on the order of 0.9 volts, (ii) the output voltage can have a zero thermal coefficient (TC), and (iii) the operating supply voltage Vcc can be less than 1.5 volts, or on the order of 1.1 volts. In one embodiment, the reference circuit modifies a conventional Brokaw bandgap circuit to lower both the required Vcc level and the output voltage by a constant offset. Referring to FIG. 3, the modification includes adding bipolar transistor (Q6), an opamp (A3) and resistors (R5, R6 and R7). In another embodiment, the reference circuit modifies a conventional circuit with PNP transistors connected to the substrate, referring to FIG. 4, by adding current source 16, NMOS transistor M3, opamp A4 and resistors R8-R10. A further embodiment modifies FIG. 4, referring to FIG. 5, by omitting the current source 16, and moving the location of resistor R4.

Abstract: A thermostat circuit (FIG. 4) is provided which (i) works properly with very low supply voltages, (ii) does not need a separate constant value as a reference, and (iii) has improved temperature sensitivity over prior art thermostat circuits. The thermostat circuit compares two reference currents—IPTAT and IVBE. When IVBE>IPTAT, the output of the thermostat circuit is one logic state (either high or low). When IPTAT>IVBE, the output of the thermostat circuit is a different logic state (either low or high). Current IPTAT comes from a PTAT current generator (FIGS. 5-7), and current IVBE comes from a VBE current generator (FIGS. 8-10). The PTAT current generator and the VBE current generator may be implemented with cascode amplifiers. In an embodiment, the currents IPTAT and IVBE can be compared at a current comparator circuit (FIG. 11) with a summing node and an output node.

Abstract: In a bandgap voltage reference circuit in accordance with the present invention, the different-sized emitters of the two bipolar devices of a &Dgr;VBE stage return to ground (or other bias voltage) through separate resistors. The VBE term of the reference device is supplied by a VBE current source through a third resistor. The proportional-to-absolute-temperature (PTAT) term of the reference occurs as the difference of base-emitter voltages &Dgr;VBE between the larger and smaller emitters. An output voltage Vout multiplier resistor feeds to the larger emitter through an inverting amplifier. In one embodiment of the invention, the output voltage Vout trim at one temperature is obtained by trimming the base-emitter resistor of the “small emitter” device to compensate for the VBE process variation.

Abstract: A low-voltage reference circuit is provided wherein (i) the output voltage can be set to be a fraction of the silicon bandgap voltage of 1.206 volts, or on the order of 0.9 volts, (ii) the output voltage can have a zero thermal coefficient (TC), and (iii) the operating supply voltage Vcc can be less than 1.5 volts, or on the order of 1.1 volts. In one embodiment, the reference circuit modifies a conventional Brokaw bandgap circuit to lower both the required Vcc level and the output voltage by a constant offset. Referring to FIG. 3, the modification includes adding bipolar transistor (Q6), an opamp (A3) and resistors (R5, R6 and R7). In another embodiment, the reference circuit modifies a conventional circuit with PNP transistors connected to the substrate, referring to FIG. 4, by adding current source I6, NMOS transistor M3, opamp A4 and resistors R8-R10. A further embodiment modifies FIG. 4, referring to FIG. 5, by omitting the current source I6, and moving the location of resistor R4.

Abstract: For use in a low-power digital imaging devices, for example a low-power single CCD-based digital camera, particularly in a battery-operated camera, a method for implementing video signal processing is provided wherein a single amplifier is employed in switched but parallel and uncorrelated signal paths in a manner which avoids fixed pattern noise that would be introduced by mismatches in gain and offset in various paths. The desired effect is achieved through use of a controller that switches appropriate sets of capacitors in parallel paths to establish different gains for each pixel component. The invention achieves power savings and flexibility to independently control gain of each color component.

Abstract: A low power reference buffer includes a new amplifier design with very large transconductance and high frequency non-dominant poles and a triple bonding scheme to a large off-chip capacitor that avoids the problems related to the lead wire inductance.

Abstract: For use in a low-power digital imaging devices, for example a low-power single CCD-based digital camera, particularly in a battery-operated camera, a method for implementing video signal processing is provided wherein a single amplifier is employed in switched but parallel and uncorrelated signal paths in a manner which avoids fixed pattern noise that would be introduced by mismatches in gain and offset in various paths. The desired effect is achieved through use of a controller that switches appropriate sets of capacitors in parallel paths to establish different gains for each pixel component. The invention achieves power savings and flexibility to independently control gain of each color component.

Abstract: A method and apparatus for an improved track-and-hold circuit is disclosed. By utilizing an amplifier connected to the input signal in combination with, in essence, a replica of the track-and-hold sampling transistor, a track-and-hold technique that reduces distortion and nonlinearities in the sampling process is achieved.

Abstract: A subcircuit including three bipolar transistors is substituted in place of a single bipolar transistor to achieve extrinsic base and emitter series resistance compensation in translinear circuits. The subcircuit substitution is applied to a Brokaw-type bandgap cell. The subcircuit substitution is applied to a current multiplier circuit, and the resulting circuit is rearranged for external control circuit efficiency. A low-voltage bandgap circuit uses an operational amplifier feedback circuit with bipolar transistors having differing emitter areas and a voltage divider to generate base voltages for a Brokaw-type bandgap cell. A proportional-to-absolute-temperature sensor circuit uses parallel two stacked bipolar transistor paths in which the bipolar transistors' emitter areas are selected to adhere to a relationship so as to provide extrinsic series base and emitter resistance compensation.

Abstract: A method of generating a symmetrical output signal with a 50% duty cycle. The symmetrical output signal is generated without the need for the input signal to be at twice the frequency of the output signal. By utilizing the differential output of a circuit and cross-coupling this to the inputs of comparators a series of outputs are obtained. These outputs are then used to control a latch device by utilizing only a single edge. Because only a single edge is used to control the low to high and high to low transition, the delay is a fixed constant and the resulting output is a symmetrical output signal with a 50% duty cycle.

Abstract: In a digital image processing device such as a portable digital camera, an analog decimation circuit is provided as a front end for the digital video imaging circuit so that the data rate is reduced without substantial loss in fidelity so that the power dissipation is minimized. In a decimation circuit, the data rate is reduced by reducing only higher frequency spectral components of a captured image without substantial loss in fidelity of the remaining spectral components of the captured image. The required amount of digital data processing is so substantially reduced that considerable power savings result. A mixture of decimation modes may be effected using the same circuit.