Abstract: A method for identifying a short circuit at a circuit node may include activating a current source to drive a signal at the circuit node, and sampling a voltage level at the circuit node at a particular time. The method may further include determining that the circuit node is not shorted to another circuit node if the voltage level at the first circuit node exceeds a threshold value; and determining that the first circuit node is shorted to another circuit node if the voltage level at the first circuit node does not exceed the threshold value.

Abstract: An electronic device includes a packaged device and a thermal dissipater. The packaged device includes a component that generates thermal energy, a package that encapsulates the component, and an interconnect that forms a portion of a high thermal conduction between the component and a circuit card. The thermal dissipater obtains the thermal energy using the circuit card and radiates the thermal energy.

Abstract: An information handling system includes a synchronizer and a module identifier. The module identifier identifies a module identification event for a module attached to the information handling system; in response to identifying the module identification event: obtains a module identifier from the module, and makes a determination that the module identifier indicates that the module is a synchronization type of module, and initiates, based on the determination, time synchronization for the information handling system with a second information handling system using the module and the synchronizer.

Abstract: A computing device includes a module that connects to a main board and a short detector. The short detector applies a voltage to a first electrical contact of the module; while the voltage is applied: makes a comparison of a second voltage on a second electrical contact of the module to the voltage; makes a determination, based on the comparison, that the first electrical contact is connected to the second electrical contact via a short circuit; and in response to the determination, initiates remediation of the short circuit.

Abstract: Methods, systems, and computer programs encoded on computer storage medium, for receiving a request to switch a mode of an information handling system (IHS) from a multi-socket mode to a multi-single socket mode; in response to receiving the request, placing each socket of the IHS in an auxiliary power state independent of each other; after placing each socket of the IHS in the auxiliary power state, altering parameters of the sockets of the IHS, including: altering CPU straps, power sequencing, reset sequencing, and bus re-direction associated with one or more of the sockets of the IHS; and in response to altering the parameters of the sockets of the IHS, switching the mode of the IHS from the multi-socket mode to the multi-single socket mode such that a processor for each socket is a bootstrap processor.

Abstract: Methods, systems, and computer programs encoded on computer storage medium, for receiving a request to switch a mode of an information handling system (IHS) from a multi-socket mode to a multi-single socket mode; in response to receiving the request, placing each socket of the IHS in an auxiliary power state independent of each other; after placing each socket of the IHS in the auxiliary power state, altering parameters of the sockets of the IHS, including: altering CPU straps, power sequencing, reset sequencing, and bus re-direction associated with one or more of the sockets of the IHS; and in response to altering the parameters of the sockets of the IHS, switching the mode of the IHS from the multi-socket mode to the multi-single socket mode such that a processor for each socket is a bootstrap processor.

Abstract: A method and information handling system (IHS) resets one or more system registers of the IHS. The method includes receiving, by the IHS, a system register reset request. In response to receiving the system register reset request, an auxiliary power disable signal is sent to an auxiliary power source and a system register reset enable signal is sent to a register reset controller. The method further includes disabling, by the auxiliary power source, an auxiliary power source output in response to receiving the auxiliary power disable signal. The method further includes disabling, by the register reset controller, a system register power source in response to receiving the system register reset enable signal. The method further resets the one or more system registers to one or more default values in response to detecting that the auxiliary power source output and the system register power source are disabled.

Abstract: A method and information handling system (IHS) resets one or more system registers of the IHS. The method includes receiving, by the IHS, a system register reset request. In response to receiving the system register reset request, an auxiliary power disable signal is sent to an auxiliary power source and a system register reset enable signal is sent to a register reset controller. The method further includes disabling, by the auxiliary power source, an auxiliary power source output in response to receiving the auxiliary power disable signal. The method further includes disabling, by the register reset controller, a system register power source in response to receiving the system register reset enable signal. The method further resets the one or more system registers to one or more default values in response to detecting that the auxiliary power source output and the system register power source are disabled.