Abstract: An electronic device includes a packaged device and a thermal dissipater. The packaged device includes a component that generates thermal energy, a package that encapsulates the component, and an interconnect that forms a portion of a high thermal conduction between the component and a circuit card. The thermal dissipater obtains the thermal energy using the circuit card and radiates the thermal energy.

Abstract: Methods, systems, and computer programs encoded on computer storage medium, for receiving a request to switch a mode of an information handling system (IHS) from a multi-socket mode to a multi-single socket mode; in response to receiving the request, placing each socket of the IHS in an auxiliary power state independent of each other; after placing each socket of the IHS in the auxiliary power state, altering parameters of the sockets of the IHS, including: altering CPU straps, power sequencing, reset sequencing, and bus re-direction associated with one or more of the sockets of the IHS; and in response to altering the parameters of the sockets of the IHS, switching the mode of the IHS from the multi-socket mode to the multi-single socket mode such that a processor for each socket is a bootstrap processor.

Abstract: Methods, systems, and computer programs encoded on computer storage medium, for receiving a request to switch a mode of an information handling system (IHS) from a multi-socket mode to a multi-single socket mode; in response to receiving the request, placing each socket of the IHS in an auxiliary power state independent of each other; after placing each socket of the IHS in the auxiliary power state, altering parameters of the sockets of the IHS, including: altering CPU straps, power sequencing, reset sequencing, and bus re-direction associated with one or more of the sockets of the IHS; and in response to altering the parameters of the sockets of the IHS, switching the mode of the IHS from the multi-socket mode to the multi-single socket mode such that a processor for each socket is a bootstrap processor.

Abstract: A method and information handling system (IHS) resets one or more system registers of the IHS. The method includes receiving, by the IHS, a system register reset request. In response to receiving the system register reset request, an auxiliary power disable signal is sent to an auxiliary power source and a system register reset enable signal is sent to a register reset controller. The method further includes disabling, by the auxiliary power source, an auxiliary power source output in response to receiving the auxiliary power disable signal. The method further includes disabling, by the register reset controller, a system register power source in response to receiving the system register reset enable signal. The method further resets the one or more system registers to one or more default values in response to detecting that the auxiliary power source output and the system register power source are disabled.

Abstract: A method and information handling system (IHS) resets one or more system registers of the IHS. The method includes receiving, by the IHS, a system register reset request. In response to receiving the system register reset request, an auxiliary power disable signal is sent to an auxiliary power source and a system register reset enable signal is sent to a register reset controller. The method further includes disabling, by the auxiliary power source, an auxiliary power source output in response to receiving the auxiliary power disable signal. The method further includes disabling, by the register reset controller, a system register power source in response to receiving the system register reset enable signal. The method further resets the one or more system registers to one or more default values in response to detecting that the auxiliary power source output and the system register power source are disabled.