Abstract: Leadframe systems and related methods. Specific implementations of leadframe systems may include a die pad, a semiconductor die coupled to the die pad, where the semiconductor die has a perimeter. A leadframe may be coupled over the die pad and the semiconductor die where the leadframe has a solder dam coupled around the semiconductor die and, the solder dam has a perimeter that corresponds with the semiconductor die The die pad may have no groove adjacent to the semiconductor die.

Abstract: Leadframe systems and related methods. Specific implementations of leadframe systems may include a die pad, a semiconductor die coupled to the die pad, where the semiconductor die has a perimeter. A leadframe may be coupled over the die pad and the semiconductor die where the leadframe has a solder dam coupled around the semiconductor die and, the solder dam has a perimeter that corresponds with the semiconductor die The die pad may have no groove adjacent to the semiconductor die.

Abstract: In a general aspect, a semiconductor device package assembly can include a first leadframe portion. The first leadframe portion can have a recessed region defined therein. The recessed region can have a sidewall and a bottom. The assembly can also include a second leadframe portion that is press-fit into the recessed region, such that a bottom surface of the second leadframe portion is in contact with the bottom of the recessed region. The second leadframe portion can be retained in the recessed region by mechanical force between an outer surface of the second leadframe portion and an inner surface of the sidewall, where the outer surface of the second leadframe portion can be in contact with the inner surface of the sidewall.

Abstract: Conventional semiconductor devices have a problem that it is difficult to prevent the short circuit between chips and to improve accuracy in temperature detection with the controlling semiconductor chips. In a semiconductor device of the present invention, a first mount region to which a driving semiconductor chip is fixedly attached and a second mount region to which a controlling semiconductor chip is fixedly attached are formed isolated from each other. A projecting area is formed in the first mount region, and the projecting area protrudes into the second mount region. The controlling semiconductor chip is fixedly attached to the top surfaces of the projecting area and the second mount region by use of an insulating adhesive sheet material. This structure prevents the short circuit between the two chips, and improves accuracy in temperature detection with the controlling semiconductor chip.

Abstract: Conventional semiconductor devices have a problem that it is difficult to prevent the short circuit between chips and to improve accuracy in temperature detection with the controlling semiconductor chips. In a semiconductor device of the present invention, a first mount region to which a driving semiconductor chip is fixedly attached and a second mount region to which a controlling semiconductor chip is fixedly attached are formed isolated from each other. A projecting area is formed in the first mount region, and the projecting area protrudes into the second mount region. The controlling semiconductor chip is fixedly attached to the top surfaces of the projecting area and the second mount region by use of an insulating adhesive sheet material. This structure prevents the short circuit between the two chips, and improves accuracy in temperature detection with the controlling semiconductor chip.

Abstract: Conventional semiconductor devices have a problem that it is difficult to prevent the short circuit between chips and to improve accuracy in temperature detection with the controlling semiconductor chips. In a semiconductor device of the present invention, a first mount region to which a driving semiconductor chip is fixedly attached and a second mount region to which a controlling semiconductor chip is fixedly attached are formed isolated from each other. A projecting area is formed in the first mount region, and the projecting area protrudes into the second mount region. The controlling semiconductor chip is fixedly attached to the top surfaces of the projecting area and the second mount region by use of an insulating adhesive sheet material. This structure prevents the short circuit between the two chips, and improves accuracy in temperature detection with the controlling semiconductor chip.

Abstract: The invention reduces outside dimensions of a semiconductor device mounted with a semiconductor die on an external connection medium and minimizes degradation of electrical characteristics of the semiconductor device. The semiconductor device of the invention having a semiconductor die and a lead frame with a plurality of lead terminals has following features. The semiconductor die has a plurality of pad electrodes formed on its front surface, at least one via hole penetrating the semiconductor die, a columnar electrode electrically connected with the pad electrode through the via hole, and a protrusion electrode electrically connected with the columnar electrode. At least one of the lead terminals of the lead frame is formed extending to a position connectable with the protrusion electrode, being connected with the protrusion electrode.

Abstract: The invention is directed to an improvement of reliability in a chip-size package type semiconductor device and a manufacturing method thereof. A semiconductor substrate formed with a pad electrode is prepared, and a first protection layer formed of epoxy resin is formed on a front surface of the semiconductor substrate. Then, a via hole is formed from a back surface of the semiconductor substrate to the pad electrode. A wiring layer is then formed from the via hole of the semiconductor substrate, being electrically connected with the pad electrode through the via hole. Then, a second protection layer and a conductive terminal are formed, and the semiconductor substrate is separated into individual semiconductor dies by dicing.

Abstract: The invention provides a semiconductor device and a manufacturing method thereof where mounting strength and accuracy can be improved without making processes complex. Grooves are formed on a back surface of a semiconductor substrate along a dicing line. Via holes are formed penetrating the semiconductor substrate from its back surface to pad electrodes. Embedded electrodes are then formed in the via holes, and a wiring layer connected with the embedded electrodes is formed extending to a region near a dicing line. Conductive terminals are formed at end portions of the wiring layer. Then, dicing is performed along the dicing line to complete the semiconductor device having inclined surfaces at end portions of its back surface. When the semiconductor device is connected with the circuit board by a reflow process, conductive paste having increased fluidity covers the conductive terminals and the inclined surfaces.

Abstract: The preferred embodiments provide a lead frame wherein a first air vent 29 and a second air vent 30 are formed in an air vent forming region 32. When resin-molding, one end of this first air vent 29 is disposed within the cavity, whereby air in the cavity when resin-molding can be completely released to the outside of the cavity. As a result, a package after resin-molding includes no unfilled regions or voids, whereby a semiconductor device with excellent product quality can be provided. In the background, air in cavities could not be completely released when resin-molding since, for instance, one air vent was provided at a position apart from the cavity region, and unfilled regions or voids were created.

Abstract: It is an object of the present invention to provide a circuit device in which a plurality of circuit elements including a circuit element having a hollow inside are sealed with resin, and to provide a method of manufacturing the same. A circuit device (10) has a first circuit element (13A) having a hollow inside and a plurality of second circuit elements (13B) electrically connected to the first circuit element (13A). The first and second circuit elements (13A) and (13B) are sealed with sealing resin (15). The distances by which the first circuit element (13A) is separated from the second circuit elements (13B) are longer than those by which the second circuit elements (13B) are separated from each other.

Abstract: Die pads 50, 51, an external connecting electrode 52 and a bridge are covered with an insulating resin after half-etching, formed into a single package without a coupling member such as a supporting lead or adhesive tape. In addition, since no supporting board is required, a low-profile semiconductor device with improved heat radiation can be provided.

Abstract: A semiconductor device (21) can include, e.g., a recessed portion (25) on the reverse surface (224) of an insulating resin (22) which is the mounting surface of the semiconductor device (21). Additionally, on the outer peripheral surface of the recessed portion (25), the exposed region of leads (26) and the reverse surface (224) of the insulating resin (22) form generally the same plane. This allows, e.g., a QFN semiconductor device (21) according to preferred embodiments herein to place dust particles in the recessed portion (25) even in the presence of dust particles such as crushed burr particles of the leads (26) or plastic burrs, thereby avoiding mounting deficiencies when mounting the semiconductor device.

Abstract: The related arts have difficulty in efficiently dissipating the heat generated by a resin-molded semiconductor element, and thus have the problem of thermal stress causing damage to the semiconductor element. To solve the problem, a semiconductor device of the preferred embodiments includes common leads coupled to an island, and a part of the common leads projects out from a resin seal body. The projecting common leads have a coupling portion. When mounting the semiconductor device, the common leads are bridged with brazing material. Thus, the heat generated by an integrated circuit chip mounted on the island is dissipated through the common leads to the outside of the resin seal body. In the preferred embodiments of the invention, a further improvement in heat dissipation characteristics can be accomplished by increasing the surface areas of the common leads.

Abstract: In order to provide a circuit device 10 where a second circuit element 15B is exposed from a sealing resin 16, a circuit device 10A comprises: an island 12 to whose top a first circuit element 15A is fixedly fitted; a plurality of leads 11 which are extended around the island 12 and electrically connected to the first circuit element 15A; a sealing resin 16 which seals the first circuit element 15A, the island 12, and leads 11 and forms a cavity portion 18; and a second circuit element 15B stored in the cavity portion 18. Accordingly, since the second circuit element 15B can be externally provided, the degree of freedom for mounting can be improved.

Abstract: The invention provides an algorithm for aligning a rotating blade in a dicing process of partially dicing a wafer attached to a substrate. A width of a cut groove and distance between pads in the cut groove are detected by a recognition camera. Based on a result of this detection, alignment data ?y which is distance between a centerline of the width of the cut groove and a real centerline are calculated. Based on a difference between the distance of the pads in the cut groove and a target value of the distance, data ?z on alignment in a depth direction of the cut groove is calculated. The rotating blade is aligned by using the alignment data ?y and ?z.

Abstract: A resin sealing-type semiconductor device comprises a first semiconductor chip 15 with a large amount of heat generation, whose external electrode leading-out bonding pads 16 are wire-bonded to respective outer leads 25A and a second semiconductor chip 17 smaller in the amount of heat generation than the first semiconductor chip, whose external electrode leading-out bonding pads 18 are wire-bonded to respective outer leads 25A, wherein the first semiconductor chip 15 is molded by a high thermal conductive resin 28, and the second semiconductor chip 17 and the first semiconductor chip 15 molded by the high thermal conductive resin are integrally molded by a non-high thermal conductive resin 31. A method includes manufacturing the resin sealing-type semiconductor device.

Abstract: The invention provides a semiconductor device and a manufacturing method thereof where mounting strength and accuracy can be improved without making processes complex. Grooves are formed on a back surface of a semiconductor substrate along a dicing line. Via holes are formed penetrating the semiconductor substrate from its back surface to pad electrodes. Embedded electrodes are then formed in the via holes, and a wiring layer connected with the embedded electrodes is formed extending to a region near a dicing line. Conductive terminals are formed at end portions of the wiring layer. Then, dicing is performed along the dicing line to complete the semiconductor device having inclined surfaces at end portions of its back surface. When the semiconductor device is connected with the circuit board by a reflow process, conductive paste having increased fluidity covers the conductive terminals and the inclined surfaces.

Abstract: The invention is directed to an improvement of reliability in a chip-size package type semiconductor device and a manufacturing method thereof. A semiconductor substrate formed with a pad electrode is prepared, and a first protection layer formed of epoxy resin is formed on a front surface of the semiconductor substrate. Then, a via hole is formed from a back surface of the semiconductor substrate to the pad electrode. A wiring layer is then formed from the via hole of the semiconductor substrate, being electrically connected with the pad electrode through the via hole. Then, a second protection layer and a conductive terminal are formed, and the semiconductor substrate is separated into individual semiconductor dies by dicing.

Abstract: The related arts have difficulty in efficiently dissipating the heat generated by a resin-molded semiconductor element, and thus have the problem of thermal stress causing damage to the semiconductor element. To solve the problem, a semiconductor device of the preferred embodiments includes common leads coupled to an island, and a part of the common leads projects out from a resin seal body. The projecting common leads have a coupling portion. When mounting the semiconductor device, the common leads are bridged with brazing material. Thus, the heat generated by an integrated circuit chip mounted on the island is dissipated through the common leads to the outside of the resin seal body. In the preferred embodiments of the invention, a further improvement in heat dissipation characteristics can be accomplished by increasing the surface areas of the common leads.