Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.

Abstract: According to one embodiment, a method of manufacturing a thin-film transistor includes forming a semiconductor layer on a gate electrode with an insulating layer 12 being interposed, forming interconnect formation layers on the semiconductor layer, forming a plurality of interconnects and electrodes by patterning the interconnect formation layers through etching, patterning the semiconductor layer in an island shape through etching after forming the electrodes, exposing a channel region of the semiconductor layer by etching a part of the electrodes on the semiconductor layer, and forming a protective layer so as to overlap the interconnects, the electrodes and the semiconductor layer having the island shape.

Abstract: A display device includes a first resin substrate; a second resin substrate facing the first. resin substrate; a liquid crystal layer held between the first resin substrate and the second resin substrate; a first insulating film located between the first resin substrate and the liquid crystal layer; a second insulating film located between the first insulating film and the liquid crystal layer, the second insulating film having a compressive stress; a third insulating film located between the second resin substrate and the liquid crystal layer; a fourth insulating film located between the second insulating film. and the liquid crystal layer, the fourth insulating film having a compressive stress; and a plurality of spacers located between the first resin substrate and the second resin substrate, the plurality of spacers defining an interval between the first resin substrate and the second resin substrate.

Abstract: A semiconductor device includes an oxide semiconductor layer, a gate electrode facing the oxide semiconductor layer, a gate insulating layer between the oxide semiconductor layer and the gate electrode, a first barrier layer below the oxide semiconductor layer, and a second barrier layer above the oxide semiconductor layer, the second barrier layer covering a top surface and side surfaces of the oxide semiconductor layer and being in contact with the first barrier layer in a region around the oxide semiconductor layer.

Abstract: A manufacturing method of a semiconductor device includes forming an oxide semiconductor layer on an insulating layer, a part of the insulating layer being exposed from the oxide semiconductor layer, performing a plasma process by use of chlorine-containing gas on the part of the insulating layer exposed from the oxide semiconductor layer, and removing chlorine impurities from a surface layer of the exposed part of the insulating layer. The chlorine impurities may be removed by a first etching process performed by use of fluorine-containing gas. The fluorine-containing gas may contain CF4 and CHF3. The plasma process may be a second etching process performed by use of chlorine-containing gas.

Abstract: Provided are a reliable high performance thin film transistor and a reliable high performance display device. The display device has: a gate electrode which is formed on a substrate; a gate insulating film which is formed to cover the substrate and the gate electrode; an oxide semiconductor layer which is formed on the gate electrode through the gate insulating film; a channel protective layer which is in contact with the oxide semiconductor layer and formed on the oxide semiconductor layer; and source/drain electrodes which are electrically connected to the oxide semiconductor layer and formed to cover the oxide semiconductor layer. A metal oxide layer is formed on an upper part of the channel protective layer. The source/drain electrodes are formed to be divided apart on the channel protective layer and the metal oxide layer.

Abstract: The present invention provides a display device having: gate electrodes formed on a transparent substrate; a gate insulating film for covering the gate electrodes; an oxide semiconductor formed on the gate insulating film; drain electrodes and source electrodes formed at a distance from each other with channel regions of the oxide semiconductor in between; an interlayer capacitor film for covering the drain electrodes and source electrodes; common electrodes formed on top of the interlayer capacitor film; and pixel electrodes formed so as to face the common electrodes, and wherein an etching stopper layer for covering the channel regions is formed between the oxide semiconductor and the drain electrodes and source electrodes, the drain electrodes are a multilayer film where a transparent conductive film and a metal film are layered on top of each other, and the drain electrodes and source electrodes make direct contact with the oxide semiconductor.

Abstract: In a bottom gate thin film transistor using a first oxide semiconductor layer as a channel layer, the first oxide semiconductor layer and second semiconductor layers include In and O. An (O/In) ratio of the second oxide semiconductor layers is equal to or larger than that of the first oxide semiconductor layer, and a film thickness thereof is thicker than that of the first oxide semiconductor layer.

Abstract: According to one embodiment, a thin-film transistor includes a semiconductor layer SC including a channel region, and a source region and a drain region on both sides of the channel region, a gate electrode GE, a first electrode SE connected to the source region via a first contact hole CH1, a second electrode DE connected to the drain region via a second contact hole CH2, a source line connected to the first electrode, and a drain line connected to the second electrode. A distance from the first and second contact holes to an end of the respective regions in a direction of a channel width is greater than or equal to 5 ?m and less than or equal to 30 ?m. The source line and the drain line extend in directions different from each other.

Abstract: In a bottom gate thin film transistor using a first oxide semiconductor layer as a channel layer, the first oxide semiconductor layer and second semiconductor layers include In and O. An (O/In) ratio of the second oxide semiconductor layers is equal to or larger than that of the first oxide semiconductor layer, and a film thickness thereof is thicker than that of the first oxide semiconductor layer.

Abstract: There is provided a bottom gate channel etched thin film transistor that can suppress initial Vth depletion and a Vth shift. A thin film transistor is formed, including a gate electrode interconnection disposed on a substrate, a gate insulating film, an oxide semiconductor layer to be a channel layer, a stacked film of a source electrode interconnection and a first hard mask layer, a stacked film of a drain electrode interconnection and a second hard mask layer, and a protective insulating film.

Abstract: A thin film transistor includes, an insulating substrate, a gate electrode provided on an upper surface of the insulating substrate, a gate insulating film formed so as to cover the gate electrode, an oxide semiconductor layer provided on the gate insulating film, a channel protective layer provided at least on an upper surface of the oxide semiconductor layer, and a source electrode and a drain electrode provided so as to come into contact with the oxide semiconductor layer, wherein the channel protective layer is formed such that the film density of a portion provided so as to come into contact with the oxide semiconductor layer is higher than the film density of a portion distant from the oxide semiconductor layer.

Abstract: According to one embodiment, a display device includes thin-film transistor. The thin-film transistor includes a first semiconductor layer, a first insulating film, a gate electrode, a second insulating film, a second semiconductor layer, a first electrode and a second electrode. The gap between the bottom surface of the gate electrode and the upper surface of the first channel region of the first semiconductor layer is larger than the gap between the upper surface of the gate electrode and the bottom surface of the second channel region of the second semiconductor layer.

Abstract: According to one embodiment, a display device includes a TFT on an insulating substrate. The TFT includes a gate electrode, an insulating layer on the gate electrode, a semiconductor layer on the insulating layer, and a source electrode and a drain electrode each provided in contact with at least a part of the semiconductor layer. The source and drain electrodes have a laminated structure including a lower layer, an intermediate layer and an upper layer. The source and drain electrodes include sidewalls each including a first tapered portion on the upper layer side, a second tapered portion on the lower layer side and a sidewall protective film attached to the second tapered portion. The taper angle of the first tapered portion is smaller than that of the second tapered portion.

Abstract: A thin film transistor includes, an insulating substrate, a gate electrode provided on an upper surface of the insulating substrate, a gate insulating film formed so as to cover the gate electrode, an oxide semiconductor layer provided on the gate insulating film, a channel protective layer provided at least on an upper surface of the oxide semiconductor layer, and a source electrode and a drain electrode provided so as to come into contact with the oxide semiconductor layer, wherein the channel protective layer is formed such that the film density of a portion provided so as to come into contact with the oxide semiconductor layer is higher than the film density of a portion distant from the oxide semiconductor layer.

Abstract: Provided are a reliable high performance thin film transistor and a reliable high performance display device. The display device has: a gate electrode which is formed on a substrate; a gate insulating film which is formed to cover the substrate and the gate electrode; an oxide semiconductor layer which is formed on the gate electrode through the gate insulating film; a channel protective layer which is in contact with the oxide semiconductor layer and formed on the oxide semiconductor layer; and source/drain electrodes which are electrically connected to the oxide semiconductor layer and formed to cover the oxide semiconductor layer. A metal oxide layer is formed on an upper part of the channel protective layer. The source/drain electrodes are formed to be divided apart on the channel protective layer and the metal oxide layer.

Abstract: There is provided a bottom gate channel etched thin film transistor that can suppress initial Vth depletion and a Vth shift. A thin film transistor is formed, including a gate electrode interconnection disposed on a substrate, a gate insulating film, an oxide semiconductor layer to be a channel layer, a stacked film of a source electrode interconnection and a first hard mask layer, a stacked film of a drain electrode interconnection and a second hard mask layer, and a protective insulating film.

Abstract: To maintain good operation of a peripheral circuit using an oxide thin film transistor in a liquid crystal display panel to which photo alignment is applied, the liquid crystal display panel includes: a transparent substrate provided with an oxide thin film transistor in the periphery of a pixel portion in which pixel electrodes are arranged, to control the pixel electrodes; and an alignment film to align liquid crystal provided in the pixel portion. The alignment film is subjected to photo alignment treatment by ultraviolet irradiation. Further, an ultraviolet absorbing layer is provided so as to cover the oxide thin film transistor. For example, an alignment film is used for the ultraviolet absorbing layer to absorb the ultraviolet light for the photo aliment treatment of the alignment film, in the peripheral circuit portion for controlling the pixel electrodes, thereby preventing the threshold voltage of the oxide thin film transistor from shifting.

Abstract: A thin film transistor includes a drain electrode layer and a source electrode layer that are formed above an oxide semiconductor layer via an insulating film. The drain electrode layer and the source electrode layer are electrically connected with the oxide semiconductor layer via through-holes formed in the insulating film. A first through-hole that electrically connects the drain electrode layer with the oxide semiconductor layer and a second through-hole that electrically connects the source electrode layer with the oxide semiconductor layer each include two or more through-holes that are arranged in parallel in a channel width direction of the thin film transistor. A total width of opening widths of the first or second through-holes in the channel width direction is a channel width of the thin film transistor.

Abstract: A railcar control apparatus comprises a synchronous slide/slip detector which determines that the axles are synchronously sliding/slipping if an absolute value of axle's speed difference is less than a synchronous slide/slip speed difference threshold and an absolute value of axle's acceleration is greater than a predetermined synchronous slide/slip acceleration threshold.