Patents by Inventor Isik C. Kizilyalli

Isik C. Kizilyalli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8969994
    Abstract: An MPS diode includes a III-nitride substrate characterized by a first conductivity type and a first dopant concentration and having a first side and a second side. The MPS diode also includes a III-nitride epitaxial structure comprising a first III-nitride epitaxial layer coupled to the first side of the substrate, wherein a region of the first III-nitride epitaxial layer comprises an array of protrusions. The III-nitride epitaxial structure also includes a plurality of III-nitride regions of a second conductivity type, each partially disposed between adjacent protrusions. Each of the plurality of III-nitride regions of the second conductivity type comprises a first section laterally positioned between adjacent protrusions and a second section extending in a direction normal to the first side of the substrate. The MPS diode further includes a first metallic structure electrically coupled to one or more of the protrusions and to one or more of the second sections.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: March 3, 2015
    Assignee: Avogy, Inc.
    Inventors: Madhan M. Raj, Brian Alvarez, David P. Bour, Andrew P. Edwards, Hui Nie, Isik C. Kizilyalli
  • Patent number: 8969912
    Abstract: A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, a gate region at least partially surrounding the channel region, having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: March 3, 2015
    Assignee: Avogy, Inc.
    Inventors: Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano, David P. Bour, Richard J. Brown, Thomas R. Prunty
  • Patent number: 8946788
    Abstract: A method of growing a III-nitride-based epitaxial structure includes providing a substrate in an epitaxial growth reactor and heating the substrate to a predetermined temperature. The method also includes flowing a gallium-containing gas into the epitaxial growth reactor and flowing a nitrogen-containing gas into the epitaxial growth reactor. The method further includes flowing a gettering gas into the epitaxial growth reactor. The predetermined temperature is greater than 1000° C.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: February 3, 2015
    Assignee: Avogy, Inc.
    Inventors: Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano, David P. Bour, Richard J. Brown, Thomas R. Prunty
  • Patent number: 8946725
    Abstract: A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: February 3, 2015
    Assignee: Avogy, Inc.
    Inventors: Donald R. Disney, Hui Nie, Isik C. Kizilyalli, Richard J. Brown
  • Patent number: 8941117
    Abstract: An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: January 27, 2015
    Assignee: Avogy, Inc.
    Inventors: Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano, David P. Bour, Richard J. Brown, Thomas R. Prunty
  • Patent number: 8937244
    Abstract: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. A photovoltaic (PV) unit, according to embodiments of the invention, may have a very thin absorber layer produced by epitaxial lift-off (ELO), all electrical contacts positioned on the back side of the PV device to avoid shadowing, and/or front side and back side light trapping employing a diffuser and a reflector to increase absorption of the photons impinging on the front side of the PV unit. Several PV units may be combined into PV banks, and an array of PV banks may be connected to form a PV module with thin strips of metal or conductive polymer applied at low temperature. Such innovations may allow for greater efficiency and flexibility in PV devices when compared to conventional solar cells.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: January 20, 2015
    Assignee: Alta Devices, Inc.
    Inventors: Isik C. Kizilyalli, Melissa Archer, Harry Atwater, Thomas J. Gmitter, Gang He, Andreas Hegedus, Gregg Higashi
  • Publication number: 20150017792
    Abstract: A method of forming a doped region in a III-nitride substrate includes providing the III-nitride substrate and forming a masking layer having a predetermined pattern and coupled to a portion of the III-nitride substrate. The III-nitride substrate is characterized by a first conductivity type and the predetermined pattern defines exposed regions of the III-nitride substrate. The method also includes heating the III-nitride substrate to a predetermined temperature and placing a dual-precursor gas adjacent the exposed regions of the III-nitride substrate. The dual-precursor gas includes a nitrogen source and a dopant source. The method further includes maintaining the predetermined temperature for a predetermined time period, forming p-type III-nitride regions adjacent the exposed regions of the III-nitride substrate, and removing the masking layer.
    Type: Application
    Filed: September 26, 2014
    Publication date: January 15, 2015
    Inventors: David P. Bour, Richard J. Brown, Isik C. Kizilyalli, Thomas R. Prunty, Linda Romano, Andrew P. Edwards, Hui Nie, Mahdan Raj
  • Patent number: 8933532
    Abstract: A semiconductor structure includes a III-nitride substrate characterized by a first conductivity type and having a first side and a second side opposing the first side, a III-nitride epitaxial layer of the first conductivity type coupled to the first side of the III-nitride substrate, and a plurality of III-nitride epitaxial structures of a second conductivity type coupled to the III-nitride epitaxial layer. The semiconductor structure further includes a III-nitride epitaxial formation of the first conductivity type coupled to the plurality of III-nitride epitaxial structures, and a metallic structure forming a Schottky contact with the III-nitride epitaxial formation and coupled to at least one of the plurality of III-nitride epitaxial structures.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: January 13, 2015
    Assignee: Avogy, Inc.
    Inventors: Andrew Edwards, Hui Nie, Isik C. Kizilyalli, Richard J. Brown, David P. Bour, Linda Romano, Thomas R. Prunty
  • Patent number: 8927999
    Abstract: An edge terminated semiconductor device is described including a GaN substrate; a doped GaN epitaxial layer grown on the GaN substrate including an ion-implanted insulation region, wherein the ion-implanted region has a resistivity that is at least 90% of maximum resistivity and a conductive layer, such as a Schottky metal layer, disposed over the GaN epitaxial layer, wherein the conductive layer overlaps a portion of the ion-implanted region. A Schottky diode is prepared using the Schottky contact structure.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: January 6, 2015
    Assignee: Avogy, Inc.
    Inventors: Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano, David Bour, Richard J. Brown, Thomas R. Prunty
  • Publication number: 20140374769
    Abstract: A Schottky diode and method of fabricating the Schottky diode using gallium nitride (GaN) materials is disclosed. The method includes providing an n-type GaN substrate having first and second opposing surfaces. The method also includes forming an ohmic metal contact electrically coupled to the first surface, forming an n-type GaN epitaxial layer coupled to the second surface, and forming an n-type aluminum gallium nitride (AlGaN) surface layer coupled to the n-type GaN epitaxial layer. The AlGaN surface layer has a thickness which is less than a critical thickness, and the critical thickness is determined based on an aluminum mole fraction of the AlGaN surface layer. The method also includes forming a Schottky contact electrically coupled to the n-type AlGaN surface layer, where, during operation, an interface between the n-type GaN epitaxial layer and the n-type AlGaN surface layer is substantially free from a two-dimensional electron gas.
    Type: Application
    Filed: September 8, 2014
    Publication date: December 25, 2014
    Inventors: Richard J. Brown, Thomas R. Prunty, David P. Bour, Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano, Madhan Raj
  • Publication number: 20140370669
    Abstract: A semiconductor device includes a III-nitride substrate, a first III-nitride epitaxial layer coupled to the III-nitride substrate and having a mesa, and a second III-nitride epitaxial layer coupled to a top surface of the mesa. The semiconductor device further includes a III-nitride gate structure coupled to a side surface of the mesa, and a spacer configured to provide electrical insulation between the second III-nitride epitaxial layer and the III-nitride gate structure.
    Type: Application
    Filed: August 28, 2014
    Publication date: December 18, 2014
    Inventors: Don Disney, Isik C. Kizilyalli, Hui Nie, Linda Romano, Richard J. Brown, Madhan Raj
  • Patent number: 8912432
    Abstract: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. In one embodiment of a photovoltaic (PV) device, the PV device generally includes an n-doped layer and a p+-doped layer adjacent to the n-doped layer to form a p-n layer such that electric energy is created when electromagnetic radiation is absorbed by the p-n layer. The n-doped layer and the p+-doped layer may compose an absorber layer having a thickness less than 500 nm. Such a thin absorber layer may allow for greater efficiency and flexibility in PV devices when compared to conventional solar cells.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: December 16, 2014
    Assignee: Alta Devices, Inc.
    Inventors: Isik C. Kizilyalli, Melissa J. Archer, Harry Atwater, Thomas J. Gmitter, Gang He, Andreas G. Hegedus, Gregg Higashi
  • Publication number: 20140346527
    Abstract: A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material.
    Type: Application
    Filed: August 7, 2014
    Publication date: November 27, 2014
    Inventors: Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Richard J. Brown, Donald R. Disney
  • Patent number: 8895845
    Abstract: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. A photovoltaic (PV) unit, according to embodiments of the invention, may have a very thin absorber layer produced by epitaxial lift-off (ELO), all electrical contacts positioned on the back side of the PV device to avoid shadowing, and/or front side and back side light trapping employing a diffuser and a reflector to increase absorption of the photons impinging on the front side of the PV unit. Several PV units may be combined into PV banks, and an array of PV banks may be connected to form a PV module with thin strips of metal or conductive polymer applied at low temperature. Such innovations may allow for greater efficiency and flexibility in PV devices when compared to conventional solar cells.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: November 25, 2014
    Assignee: Alta Devices, Inc.
    Inventors: Isik C. Kizilyalli, Melissa Archer, Harry Atwater, Thomas J. Gmitter, Gang He, Andreas Hegedus, Gregg Higashi
  • Patent number: 8895847
    Abstract: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. A photovoltaic (PV) device may incorporate front side and/or back side light trapping techniques in an effort to absorb as many of the photons incident on the front side of the PV device as possible in the absorber layer. The light trapping techniques may include a front side antireflective coating, multiple window layers, roughening or texturing on the front and/or the back sides, a back side diffuser for scattering the light, and/or a back side reflector for redirecting the light into the interior of the PV device. With such light trapping techniques, more light may be absorbed by the absorber layer for a given amount of incident light, thereby increasing the efficiency of the PV device.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: November 25, 2014
    Assignee: Alta Devices, Inc.
    Inventors: Isik C. Kizilyalli, Melissa J. Archer, Harry Atwater, Thomas J. Gmitter, Gang He, Andreas G. Hegedus, Gregg Higashi
  • Patent number: 8895846
    Abstract: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. A photovoltaic (PV) unit, according to embodiments of the invention, may have a very thin absorber layer produced by epitaxial lift-off (ELO), all electrical contacts positioned on the back side of the PV device to avoid shadowing, and/or front side and back side light trapping employing a diffuser and a reflector to increase absorption of the photons impinging on the front side of the PV unit. Several PV units may be combined into PV banks, and an array of PV banks may be connected to form a PV module with thin strips of metal or conductive polymer applied at low temperature. Such innovations may allow for greater efficiency and flexibility in PV devices when compared to conventional solar cells.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: November 25, 2014
    Assignee: Alta Devices, Inc.
    Inventors: Isik C. Kizilyalli, Melissa Archer, Harry Atwater, Thomas J. Gmitter, Gang He, Andreas Hegedus, Gregg Higashi
  • Publication number: 20140312355
    Abstract: A method for fabricating a merged p-i-n Schottky (MPS) diode in gallium nitride (GaN) based materials includes providing an n-type GaN-based substrate having a first surface and a second surface. The method also includes forming an n-type GaN-based epitaxial layer coupled to the first surface of the n-type GaN-based substrate, and forming a p-type GaN-based epitaxial layer coupled to the n-type GaN-based epitaxial layer. The method further includes removing portions of the p-type GaN-based epitaxial layer to form a plurality of dopant sources, and regrowing a GaN-based epitaxial layer including n-type material in regions overlying portions of the n-type GaN-based epitaxial layer, and p-type material in regions overlying the plurality of dopant sources. The method also includes forming a first metallic structure electrically coupled to the regrown GaN-based epitaxial layer.
    Type: Application
    Filed: April 19, 2013
    Publication date: October 23, 2014
    Applicant: AVOGY, INC.
    Inventors: Isik C. Kizilyalli, Dave P. Bour, Thomas R. Prunty, Hui Nie, Quentin Diduck, Ozgur Aktas
  • Patent number: 8866147
    Abstract: A semiconductor structure includes a III-nitride substrate and a drift region coupled to the III-nitride substrate along a growth direction. The semiconductor substrate also includes a channel region coupled to the drift region. The channel region is defined by a channel sidewall disposed substantially along the growth direction. The semiconductor substrate further includes a gate region disposed laterally with respect to the channel region.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: October 21, 2014
    Assignee: Avogy, Inc.
    Inventors: Richard J. Brown, Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, David P. Bour
  • Patent number: 8853063
    Abstract: A method of growing an n-type III-nitride-based epitaxial layer includes providing a substrate in an epitaxial growth reactor, forming a masking material coupled to a portion of a surface of the substrate, and flowing a first gas into the epitaxial growth reactor. The first gas includes a group III element and carbon. The method further comprises flowing a second gas into the epitaxial growth reactor. The second gas includes a group V element, and a molar ratio of the group V element to the group III element is at least 5,000. The method also includes growing the n-type III-nitride-based epitaxial layer.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: October 7, 2014
    Assignee: Avogy, Inc.
    Inventors: David P. Bour, Thomas R. Prunty, Linda Romano, Richard J. Brown, Isik C. Kizilyalli, Hui Nie
  • Publication number: 20140291691
    Abstract: A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.
    Type: Application
    Filed: February 27, 2014
    Publication date: October 2, 2014
    Applicant: Avogy, Inc.
    Inventors: Donald R. Disney, Hui Nie, Isik C. Kizilyalli, Richard J. Brown