Patents by Inventor Istvan Novak

Istvan Novak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230156953
    Abstract: A substrate reinforcement or stiffener can be toolless, slide-on, slide-off, and removable. A hold down can carry pre-attached solder balls, solder units, or fusible elements. Fusible elements can be shaped to reduce thermal and mechanical stresses when reflowed onto a substrate. A heat-producing article can include a heat-dissipation material selectively located on, or immediately adjacent to, a heat-producing article. Clips with a plurality of fingers can be added to power conductors. Graphene strips, graphene coatings, or nanomaterials can be applied to electrically non-conductive articles and are able to selectively direct unwanted heat away from the heat-producing article. Electro-magnetic interference can be reduced by selective placement of voids in a shield of an electrical component.
    Type: Application
    Filed: April 7, 2021
    Publication date: May 18, 2023
    Inventors: Burrell G. BEST, Brian R. VICICH, Kevin R. MEREDITH, Chadrick P. FAITH, Istvan NOVAK, Jonathan E. BUCK
  • Patent number: 10768211
    Abstract: Systems and methods are provided for compensating for parasitics in current measurements utilizing series current sense resistors. In one or more embodiments, the techniques include connecting a probe to a terminal of a circuit and a waveform measuring device. A waveform measuring device then acquires, through the probe, a voltage waveform. A virtual probe netlist is generated, where the netlist is descriptive of a series resistance and associated parasitics. A virtual probe processor converts, based on the virtual probe netlist, the voltage waveform to a current waveform representative of a current in the circuit.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: September 8, 2020
    Assignee: Oracle International Corporation
    Inventors: Peter J. Pupalaikis, Lawrence W. Jacobs, Istvan Novak
  • Patent number: 10564191
    Abstract: Methodologies and systems are described herein whereby performance parameters of a power converter may be tested. In one or more embodiments, a system for testing the performance parameters comprises a multi-channel monitoring device including a first channel for monitoring a switch voltage of a power converter and a second channel for concurrently monitoring an output voltage of the power converter. The system further comprises a set of one or more processors for generating, as a function of the switch voltage and the output voltage, and displaying an inductor current waveform approximating current through an inductor of the power converter. Additionally or alternatively, other waveforms such as output current waveforms and inductor voltage waveforms, may be generated during testing of the power converter. An arbitrary wave generator may inject different signals during testing of the power converter.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: February 18, 2020
    Assignee: Oracle International Corporation
    Inventors: Istvan Novak, Peter J. Pupalaikis
  • Patent number: 10551417
    Abstract: An inductor current measurement probe apparatus and system are described herein. In an embodiment, a system comprises a probe interconnect including a first connector that couples to a positive terminal of the inductor and a second connector that couples to a negative terminal of the inductor. The system further comprises an RC filter that is coupled to the probe interconnect and that includes at least one resistor and at least one capacitor in an arrangement that converts a voltage of the inductor to a differential capacitor voltage. The system further comprises a differential active probe input circuitry including a positive terminal and a negative terminal that are coupled to the RC filter and arranged to convert the differential capacitor voltage to a single-ended capacitor voltage. In other embodiments, the RC filter may be coupled directly to the inductor. The system may further convert the capacitor voltage to inductor current.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: February 4, 2020
    Assignee: Oracle International Corporation
    Inventors: Istvan Novak, Peter J. Pupalaikis, Lawrence W. Jacobs
  • Publication number: 20190064231
    Abstract: Systems and methods are provided for compensating for parasitics in current measurements utilizing series current sense resistors. In one or more embodiments, the techniques include connecting a probe to a terminal of a circuit and a waveform measuring device. A waveform measuring device then acquires, through the probe, a voltage waveform. A virtual probe netlist is generated, where the netlist is descriptive of a series resistance and associated parasitics. A virtual probe processor converts, based on the virtual probe netlist, the voltage waveform to a current waveform representative of a current in the circuit.
    Type: Application
    Filed: April 25, 2018
    Publication date: February 28, 2019
    Applicant: Oracle International Corporation
    Inventors: Peter J. Pupalaikis, Lawrence W. Jacobs, Istvan Novak
  • Patent number: 10126374
    Abstract: Methodologies and systems are described herein whereby the electrical performance of a device may be tested. In one or more embodiments, a system for testing the electrical performance comprises a monitoring device configured to perform a set of operations including concurrently monitoring at least three different test points of a device under test (DUT) and aggregating test data comprising signal information collected concurrently from at least three different test points of the DUT. In one or more embodiments, the system is configured to monitor at least three channels wherein at least one channel corresponds to a frequency range of less than 300 kHz and the phases of signals on at least three channels are different.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: November 13, 2018
    Assignee: Oracle International Corporation
    Inventor: Istvan Novak
  • Publication number: 20180143227
    Abstract: Methodologies and systems are described herein whereby performance parameters of a power converter may be tested. In one or more embodiments, a system for testing the performance parameters comprises a multi-channel monitoring device including a first channel for monitoring a switch voltage of a power converter and a second channel for concurrently monitoring an output voltage of the power converter. The system further comprises a set of one or more processors for generating, as a function of the switch voltage and the output voltage, and displaying an inductor current waveform approximating current through an inductor of the power converter. Additionally or alternatively, other waveforms such as output current waveforms and inductor voltage waveforms, may be generated during testing of the power converter. An arbitrary wave generator may inject different signals during testing of the power converter.
    Type: Application
    Filed: September 29, 2017
    Publication date: May 24, 2018
    Applicant: Oracle International Corporation
    Inventors: Istvan Novak, Peter J. Pupalaikis
  • Publication number: 20180143264
    Abstract: An inductor current measurement probe apparatus and system are described herein. In an embodiment, a system comprises a probe interconnect including a first connector that couples to a positive terminal of the inductor and a second connector that couples to a negative terminal of the inductor. The system further comprises an RC filter that is coupled to the probe interconnect and that includes at least one resistor and at least one capacitor in an arrangement that converts a voltage of the inductor to a differential capacitor voltage. The system further comprises a differential active probe input circuitry including a positive terminal and a negative terminal that are coupled to the RC filter and arranged to convert the differential capacitor voltage to a single-ended capacitor voltage. In other embodiments, the RC filter may be coupled directly to the inductor. The system may further convert the capacitor voltage to inductor current.
    Type: Application
    Filed: November 3, 2017
    Publication date: May 24, 2018
    Applicant: Oracle International Corporation
    Inventors: Istvan Novak, Peter J. Pupalaikis, Lawrence W. Jacobs
  • Publication number: 20180024204
    Abstract: Methodologies and systems are described herein whereby the electrical performance of a device may be tested. In one or more embodiments, a system for testing the electrical performance comprises a monitoring device configured to perform a set of operations including concurrently monitoring at least three different test points of a device under test (DUT) and aggregating test data comprising signal information collected concurrently from at least three different test points of the DUT. In one or more embodiments, the system is configured to monitor at least three channels wherein at least one channel corresponds to a frequency range of less than 300 kHz and the phases of signals on at least three channels are different.
    Type: Application
    Filed: July 20, 2016
    Publication date: January 25, 2018
    Applicant: Oracle International Corporation
    Inventor: Istvan Novak
  • Patent number: 8514549
    Abstract: A stable power, low electromagnetic interference (EMI) apparatus and method for connecting electronic devices and circuit boards is disclosed. The apparatus involves a capacitor which includes a body member, a set of power terminals and a set of ground terminals connected to the top of the body member. The set of power terminals and the set of ground terminals alternate one with another. As a result of this configuration, a high inductance on the PCB side is achieved. The capacitor further includes a set of terminals connected to the bottom of the body member and includes metal planes within the body member. The metal planes are positioned to electrically connect either the set of power terminals or the set of ground terminals to the set of terminals.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: August 20, 2013
    Assignee: Oracle America, Inc.
    Inventors: David Hockanson, Istvan Novak, Leesa Noujeim
  • Patent number: 8152536
    Abstract: A connecting device for connecting to an electrical connection system of a solar module includes a connector housing to be arranged on an outer surface of the solar module and also at least one conductor component, which is arranged in the connector housing. At least one connection mechanism is provided with connecting device, and formed for connecting to a conductor, which is led out of the solar module, of the electrical connection system of the solar module. The connection mechanism has at least one resilient contact region, which is embodied for contacting the led-out conductor in a contacting position, the connection mechanism also includes at least one engagement portion, which is embodied for engaging a tool in order to move the resilient contact region out of its contacting position. This allows the connector housing to be attached to the connector housing in a largely automated manner and to be connected to a led-out conductor of the connection system.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: April 10, 2012
    Assignee: Tyco Electronics Amp GmbH
    Inventors: Heinz-Peter Scherer, Guenter Feldmeier, Istvan Novak
  • Publication number: 20110164392
    Abstract: A stable power, low electromagnetic interference (EMI) apparatus and method for connecting electronic devices and circuit boards is disclosed. The apparatus involves a capacitor which includes a body member, a set of power terminals and a set of ground terminals connected to the top of the body member. The set of power terminals and the set of ground terminals alternate one with another. As a result of this configuration, a high inductance on the PCB side is achieved. The capacitor further includes a set of terminals connected to the bottom of the body member and includes metal planes within the body member. The metal planes are positioned to electrically connect either the set of power terminals or the set of ground terminals to the set of terminals.
    Type: Application
    Filed: March 15, 2011
    Publication date: July 7, 2011
    Inventors: David Hockanson, Istvan Novak, Leesa Noujeim
  • Patent number: 7969712
    Abstract: A stable power, low electromagnetic interference (EMI) apparatus and method for connecting electronic devices and circuit boards is disclosed. The apparatus involves a capacitor which includes a body member, a set of power terminals and a set of ground terminals connected to the top of the body member. The set of power terminals and the set of ground terminals alternate one with another. As a result of this configuration, a high inductance on the PCB side is achieved. The capacitor further includes a set of terminals connected to the bottom of the body member and includes metal planes within the body member. The metal planes are positioned to electrically connect either the set of power terminals or the set of ground terminals to the set of terminals.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: June 28, 2011
    Assignee: Oracle America, Inc.
    Inventors: Leesa Noujeim, David Hockanson, Istvan Novak
  • Publication number: 20100233909
    Abstract: A connecting device for connecting to an electrical connection system of a solar module includes a connector housing to be arranged on an outer surface of the solar module and also at least one conductor component, which is arranged in the connector housing. At least one connection mechanism is provided with connecting device, and formed for connecting to a conductor, which is led out of the solar module, of the electrical connection system of the solar module. The connection mechanism has at least one resilient contact region, which is embodied for contacting the led-out conductor in a contacting position, the connection mechanism also includes at least one engagement portion, which is embodied for engaging a tool in order to move the resilient contact region out of its contacting position. This allows the connector housing to be attached to the connector housing in a largely automated manner and to be connected to a led-out conductor of the connection system.
    Type: Application
    Filed: March 5, 2010
    Publication date: September 16, 2010
    Inventors: Heinz-Peter Scherer, Guenter Feldmeier, Istvan Novak
  • Publication number: 20080259521
    Abstract: A stable power, low electromagnetic interference (EMI) apparatus and method for connecting electronic devices and circuit boards is disclosed. The apparatus involves a capacitor which includes a body member, a set of power terminals and a set of ground terminals connected to the top of the body member. The set of power terminals and the set of ground terminals alternate one with another. As a result of this configuration, a high inductance on the PCB side is achieved. The capacitor further includes a set of terminals connected to the bottom of the body member and includes metal planes within the body member. The metal planes are positioned to electrically connect either the set of power terminals or the set of ground terminals to the set of terminals.
    Type: Application
    Filed: April 19, 2007
    Publication date: October 23, 2008
    Applicant: Sun Microsystems, Inc.
    Inventors: David Hockanson, Istvan Novak, Leesa Noujeim
  • Patent number: 7277841
    Abstract: An adaptive subgridding method for power/ground plane simulations. The method includes superimposing a grid of cells onto a circuit plane. For each cell, the method may determine a fill ratio representing the amount of area in a given cell that overlaps with the circuit plane. For each cell having a fill ratio that is less than a predetermined upper limit or a predetermined lower limit the cell may be divided into a plurality of subcells. The method may then determine the fill ratio for each of the subcells. As with the original cells, each of the subcells having a fill ratio less than the predetermined upper limit and greater than the predetermined lower limit may be further subdivided into additional subcells. The loop may repeat itself until a predetermined integer value is reached, wherein the integer value indicates the number of times a cell may be subdivided.
    Type: Grant
    Filed: February 7, 2003
    Date of Patent: October 2, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Istvan Novak, Jason R. Miller, Eric L. Blomberg, Deborah Foltz, Kenneth Laird
  • Patent number: 7204701
    Abstract: A bolster plate apparatus, used to secure a semiconductor device intermediate a printed circuit board and a heat sink apparatus, includes either an indentation or an open aperture into which a radio frequency absorptive material may be disposed. The absorptive material may be a ferrite material specifically selected to absorb frequencies in the range of the second to fourth harmonic of the processor clock signal frequency. The type of the ferrite material implanted in the bolster plate is selected to maximize the absorption of radio frequency energy, particularly that emitted at the pad vias on the underside of the printed circuit board, without affecting the signal integrity of the other pad connections. The shape of the cutout or aperture is also defined by the arrangement of RF emitting pads on the underside of the printed circuit board.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: April 17, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Wigneswaran W. Balasingham, Istvan Novak, Robert S. Moffett, Daniel D. Gonsalves
  • Patent number: 7162795
    Abstract: A system and method for distributing power to an integrated circuit. In one embodiment, a power laminate may be mounted to a printed circuit board (PCB). The integrated circuit for which power is to be distributed may be electrically coupled to the PCB. The power laminate may include one or more power planes and one or more reference (i.e. ground) planes, with each pair of power/reference planes separated by a dielectric layer. The power laminate may also include a connector or other means for receiving power from an external power source. The power laminate may be electrically coupled to the integrated circuit, thereby enabling it to provide power to the integrated circuit. The power laminate may also include a voltage regulator circuit, and a plurality of decoupling capacitors.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: January 16, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Larry D. Smith, Istvan Novak, Michael C. Freda
  • Patent number: 6923656
    Abstract: A socket, such as a Land Grid Array (LGA) socket, for forming electrical connections between a first surface having a first contact array and a second surface having a second contact array. The socket includes a plurality of compliant contacts, each contact inserted into one of a plurality of passages that extend through a plate. Each contact has a first contact surface for electrically engaging the first contact array, and a second contact surface for electrically engaging the second contact array. At least one of the contacts is a low current contact, and at least one of the contacts is a high current contact capable of passing more current than the low current contact.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: August 2, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Shlomo Novotny, Istvan Novak
  • Patent number: 6894230
    Abstract: An interconnecting apparatus employing a lossy power distribution network to reduce power plane resonances. In one embodiment, a printed circuit board includes a lossy power distribution network formed by a pair of parallel planar conductors separated by a dielectric layer.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: May 17, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: Istvan Novak