Patents by Inventor Ivo Raaijmakers
Ivo Raaijmakers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7927942Abstract: A method of self-aligned silicidation on structures having high aspect ratios involves depositing a metal oxide film using atomic layer deposition (ALD) and converting the metal oxide film to metal film in order to obtain uniform step coverage. The substrate is then annealed such that the metal in regions directly overlying the patterned and exposed silicon reacts with the silicon to form uniform metal silicide at the desired locations.Type: GrantFiled: December 19, 2008Date of Patent: April 19, 2011Assignee: ASM International N.V.Inventor: Ivo Raaijmakers
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Patent number: 7921805Abstract: A liquid injector is used to vaporize and inject a silicon precursor into a process chamber to form silicon-containing layers during a semiconductor fabrication process. The injector is connected to a source of silicon precursor, which preferably comprises liquid trisilane in a mixture with one or more dopant precursors. The mixture is metered as a liquid and delivered to the injector, where it is then vaporized and injected into the process chamber.Type: GrantFiled: January 21, 2010Date of Patent: April 12, 2011Assignee: ASM America, Inc.Inventors: Michael A. Todd, Ivo Raaijmakers
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Patent number: 7893433Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 ? or less, a surface roughness of about 5 ? rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.Type: GrantFiled: September 12, 2007Date of Patent: February 22, 2011Assignee: ASM America, Inc.Inventors: Michael A. Todd, Ivo Raaijmakers
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Publication number: 20100155859Abstract: A method of self-aligned silicidation on structures having high aspect ratios involves depositing a metal oxide film using atomic layer deposition (ALD) and converting the metal oxide film to metal film in order to obtain uniform step coverage. The substrate is then annealed such that the metal in regions directly overlying the patterned and exposed silicon reacts with the silicon to form uniform metal silicide at the desired locations.Type: ApplicationFiled: December 19, 2008Publication date: June 24, 2010Inventor: Ivo Raaijmakers
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Patent number: 7732331Abstract: The present invention provides a method of fabricating a semiconductor device, which could advance the commercialization of semiconductor devices with a copper interconnect. In a process of metal interconnect line fabrication, a TiN thin film combined with an Al intermediate layer is used as a diffusion barrier on trench or via walls. For the formation, Al is deposited on the TiN thin film followed by copper filling the trench. Al diffuses to TiN layer and reacts with oxygen or nitrogen, which will stuff grain boundaries efficiently, thereby blocking the diffusion of copper successfully.Type: GrantFiled: November 16, 2004Date of Patent: June 8, 2010Assignee: ASM International N.V.Inventors: Ki-Bum Kim, Pekka J. Soininen, Ivo Raaijmakers
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Publication number: 20100107978Abstract: A liquid injector is used to vaporize and inject a silicon precursor into a process chamber to form silicon-containing layers during a semiconductor fabrication process. The injector is connected to a source of silicon precursor, which preferably comprises liquid trisilane in a mixture with one or more dopant precursors. The mixture is metered as a liquid and delivered to the injector, where it is then vaporized and injected into the process chamber.Type: ApplicationFiled: January 21, 2010Publication date: May 6, 2010Applicant: ASM America, Inc.Inventors: Michael A. Todd, Ivo Raaijmakers
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Patent number: 7682947Abstract: Methods for depositing epitaxial films such as epitaxial Ge and SiGe films. During cooling from high temperature processing to lower deposition temperatures for Ge-containing layers, Si or Ge compounds are provided to the substrate. Smooth, thin, relatively defect-free Ge or SiGe layers result. Retrograded relaxed SiGe is also provided between a relaxed, high Ge-content seed layer and an overlying strained layer.Type: GrantFiled: May 30, 2007Date of Patent: March 23, 2010Assignee: ASM America, Inc.Inventors: Paul D. Brabant, Joseph P. Italiano, Chantal J. Arena, Pierre Tomasini, Ivo Raaijmakers, Matthias Bauer
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Patent number: 7674728Abstract: A liquid injector is used to vaporize and inject a silicon precursor into a process chamber to form silicon-containing layers during a semiconductor fabrication process. The injector is connected to a source of silicon precursor, which preferably comprises liquid trisilane in a mixture with one or more dopant precursors. The mixture is metered as a liquid and delivered to the injector, where it is then vaporized and injected into the process chamber.Type: GrantFiled: March 29, 2007Date of Patent: March 9, 2010Assignee: ASM America, Inc.Inventors: Michael A Todd, Ivo Raaijmakers
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Patent number: 7670944Abstract: Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Trenches and contact vias are formed in insulating layers. The trenches and vias are exposed to alternating chemistries to form monolayers of a desired lining material. Exemplary process flows include alternately pulsed metal halide and ammonia gases injected into a constant carrier flow. Self-terminated metal layers are thus reacted with nitrogen. Near perfect step coverage allows minimal thickness for a diffusion barrier function, thereby maximizing the volume of a subsequent filling metal for any given trench and via dimensions.Type: GrantFiled: August 28, 2006Date of Patent: March 2, 2010Assignee: ASM International N.V.Inventors: Ivo Raaijmakers, Suvi P. Haukka, Ville A. Saanila, Pekka J. Soininen, Kai-Erik Elers, Ernst H.A. Granneman
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Publication number: 20100009080Abstract: Methods and systems for depositing a film on a substrate are disclosed. In one embodiment, a method includes converting a non-gaseous precursor into vapor phase. Converting the precursor includes: forming a fluidized bed by flowing gas at a sufficiently high flow rate to suspend and stir a plurality of solid particles, and converting the phase of the non-gaseous precursor into vapor phase in the fluidized bed. The method also includes transferring the precursor in vapor phase through a passage; and performing deposition on one or more substrates with the transferred precursor in vapor phase.Type: ApplicationFiled: July 7, 2009Publication date: January 14, 2010Applicant: ASM INTERNATIONAL N.V.Inventors: Gert Jan Snijders, Ivo Raaijmakers
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Publication number: 20100006024Abstract: Methods for depositing epitaxial films such as epitaxial Ge and SiGe films. During cooling from high temperature processing to lower deposition temperatures for Ge-containing layers, Si or Ge compounds are provided to the substrate. Smooth, thin, relatively defect-free Ge or SiGe layers result. Retrograded relaxed SiGe is also provided between a relaxed, high Ge-content seed layer and an overlying strained layer.Type: ApplicationFiled: September 9, 2009Publication date: January 14, 2010Applicant: ASM AMERICA, INC.Inventors: Paul D. Brabant, Joseph P. Italiano, Chantal J. Arena, Pierre Tomasini, Ivo Raaijmakers, Matthias Bauer
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Publication number: 20090068832Abstract: Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g.Type: ApplicationFiled: August 29, 2008Publication date: March 12, 2009Applicant: ASM INTERNATIONAL N.V.Inventors: Suvi P. Haukka, Ivo Raaijmakers, Wei Min Li, Juhana Kostamo, Hessel Sprey, Christrian J. Werkhoven
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Patent number: 7465658Abstract: A method is proposed for improving the adhesion between a diffusion barrier film and a metal film. Both the diffusion barrier film and the metal film can be deposited in either sequence onto a semiconductor substrate. A substrate comprising a first film, which is one of a diffusion barrier film or a metal film, with the first film being exposed at least at part of the surface area of the substrate, is exposed to an oxygen-containing reactant to create a surface termination of about one monolayer of oxygen-containing groups or oxygen atoms on the exposed parts of the first film. Then the second film, which is the other one of a diffusion barrier film and a metal film, is deposited onto the substrate. Furthermore, an oxygen bridge structure is proposed, the structure comprising a diffusion barrier film and a metal film having an interface with the diffusion barrier film, wherein the interface comprises a monolayer of oxygen atoms.Type: GrantFiled: April 25, 2006Date of Patent: December 16, 2008Assignee: ASM America, Inc.Inventors: Ivo Raaijmakers, Pekka J. Soininen, Kai-Erik Elers
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Patent number: 7452757Abstract: Silicon-on-insulator (SOI) structures are provided by forming a single-crystal insulator over a substrate, followed by heteroepitaxy of a semiconductor layer thereover. Atomic layer deposition (ALD) is preferably used to form an amorphous insulator, followed by solid phase epitaxy to convert the layer into a single-crystal structure. Advantageously, the crystalline insulator has a lattice structure and lattice constant closely matching that of the semiconductor formed over it, and a ternary insulating material facilitates matching properties of the layers. Strained silicon can be formed without need for a buffer layer. An amorphous SiO2 layer can optionally be grown underneath the insulator. In addition, a buffer layer can be grown, either between the substrate and the insulator or between the insulator and the semiconductor layer, to produce desired strain in the active semiconductor layer.Type: GrantFiled: May 7, 2003Date of Patent: November 18, 2008Assignee: ASM America, Inc.Inventors: Christiaan J. Werkhoven, Ivo Raaijmakers, Chantal Arena
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Patent number: 7431767Abstract: An improved apparatus and method for substrate layer deposition in which substrate layers are grown by carrier gas delivery of sequential pulses of reactants to the substrate surface. At least one of the reactants comprises excited species, e.g., radicals. In a specific embodiment, the apparatus of this invention provides sequential repeated pulses of reactants in a flow of carrier gas for reaction at a substrate surface. The reactant pulses are delivered with sufficient intervening delay times to minimize undesirable reaction between reactants in adjacent pulses in the gas phase or undesired uncontrolled reactions on the substrate surface.Type: GrantFiled: November 27, 2006Date of Patent: October 7, 2008Assignee: ASM America, Inc.Inventor: Ivo Raaijmakers
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Publication number: 20080237048Abstract: A device for electrodepositing a conductive material from a first solution into at least one feature formed on a wafer includes a hollow body, an electrode, and a moving mechanism. The hollow body includes a first opening and a second opening. The first solution is supplied to the second opening and injected from the first opening. The electrode is disposed within the hollow body. A potential difference is applicable between the first electrode and the surface of the wafer to electrodeposit the conductive material into the at least one feature. The moving mechanism is mechanically coupled to the hollow body. The moving mechanism is configured to position the first opening of the hollow body over the at least one feature.Type: ApplicationFiled: March 30, 2007Publication date: October 2, 2008Inventors: Ismail Emesh, Ivo Raaijmakers
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Patent number: 7419903Abstract: Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g.Type: GrantFiled: April 13, 2005Date of Patent: September 2, 2008Assignee: ASM International N.V.Inventors: Suvi P. Haukka, Ivo Raaijmakers, Wei Min Li, Juhana Kostamo, Hessel Sprey
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Patent number: 7402504Abstract: Methods for depositing epitaxial films such as epitaxial Ge and SiGe films. During cooling from high temperature processing to lower deposition temperatures for Ge-containing layers, Si or Ge compounds are provided to the substrate. Smooth, thin, relatively defect-free Ge or SiGe layers result. Retrograded relaxed SiGe is also provided between a relaxed, high Ge-content seed layer and an overlying strained layer.Type: GrantFiled: August 18, 2006Date of Patent: July 22, 2008Assignee: ASM America, Inc.Inventors: Paul D. Brabant, Joseph P. Italiano, Chantal J. Arena, Pierre Tomasini, Ivo Raaijmakers, Matthias Bauer
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Publication number: 20080093711Abstract: High dielectric constant (high-k) materials are formed directly over oxidation-susceptible conductors such as silicon. A discontinuous layer is formed, with gaps between grains of the high-k material. Exposed conductor underneath the grain boundaries is oxidized or nitridized to form, e.g., silicon dioxide or silicon nitride, when exposed to oxygen or nitrogen source gases at elevated temperatures. This dielectric growth is preferential underneath the grain boundaries such that any oxidation or nitridation at the interface between the high-k material grains and covered conductor is not as extensive. The overall dielectric constant of the composite film is high, while leakage current paths between grains is reduced. Ultrathin high-k materials with low leakage current are thereby enabled.Type: ApplicationFiled: December 17, 2007Publication date: April 24, 2008Applicant: ASM INTERNATIONAL N.V.Inventors: Ivo Raaijmakers, Pekka Soininen, Jan Maes
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Publication number: 20080073645Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 ? or less, a surface roughness of about 5 ? rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.Type: ApplicationFiled: September 12, 2007Publication date: March 27, 2008Applicant: ASM America, Inc.Inventors: Michael Todd, Ivo Raaijmakers