Abstract: Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Trenches and contact vias are formed in insulating layers. The trenches and vias are exposed to alternating chemistries to form monolayers of a desired lining material. Exemplary process flows include alternately pulsed metal halide and ammonia gases injected into a constant carrier flow. Self-terminated metal layers are thus reacted with nitrogen. Near perfect step coverage allows minimal thickness for a diffusion barrier function, thereby maximizing the volume of a subsequent filling metal for any given trench and via dimensions.

Abstract: A method and apparatus for growing a thin film onto a substrate is disclosed. According to one embodiment, a plurality of substrates, each having a width and a length, are placed in a reaction space and the substrates are subjected to surface reactions of vapor-phase reactants according to the ALD method to form a thin film on the surfaces of the substrates. The reaction space comprises an elongated gas channel having a cross-section with a width greater that the height and which has a length which is at least 2 times greater than the length of one substrate in the direction of the gas flow in the channel, the channel having a folded configuration with at least one approximately 180 degree turn in the direction of the gas flow.

Abstract: A method is proposed for improving the adhesion between a diffusion barrier film and a metal film. Both the diffusion barrier film and the metal film can be deposited in either sequence onto a semiconductor substrate. A substrate comprising a first film, which is one of a diffusion barrier film or a metal film, with the first film being exposed at least at part of the surface area of the substrate, is exposed to an oxygen-containing reactant to create a surface termination of about one monolayer of oxygen-containing groups or oxygen atoms on the exposed parts of the first film. Then the second film, which is the other one of a diffusion barrier film and a metal film, is deposited onto the substrate. Furthermore, an oxygen bridge structure is proposed, the structure comprising a diffusion barrier film and a metal film having an interface with the diffusion barrier film, wherein the interface comprises a monolayer of oxygen atoms.

Abstract: A wafer carrier adapted to hold a plurality of wafers and is positioned on an elevator plate in a load lock. The elevator plate is adapted to move between a first position with the carrier in a first chamber of the load lock and a second position with the carrier in the auxiliary chamber. In the second position, the elevator plate substantially seals the auxiliary chamber from the first chamber. In use, a first wafer is placed onto the wafer carrier. The wafer carrier can moved into the auxiliary chamber before or after the first wafer is placed onto the wafer carrier. The first wafer is auxiliary processed in the auxiliary chamber. A second wafer is placed onto the wafer carrier. Preferably after the second wafer is placed onto the wafer carrier, the first wafer is removed from the load lock. A third wafer is preferably then placed onto the wafer carrier so that the second wafer can cool. The second wafer is then removed from the load lock. The cycle is repeated.

Abstract: A liquid injector is used to vaporize and inject a silicon precursor into a process chamber to form silicon-containing layers during a semiconductor fabrication process. The injector is connected to a source of silicon precursor, which preferably comprises liquid trisilane in a mixture with one or more dopant precursors. The mixture is metered as a liquid and delivered to the injector, where it is then vaporized and injected into the process chamber.

Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 ? or less, a surface roughness of about 5 ? rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon-containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 ? or less, a surface roughness of about 5 ? rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

Abstract: Methods and apparatuses are provided for cooling semiconductor substrates prior to handling. In one embodiment, a substrate and support structure combination is lifted after high temperature processing to a cold wall of a thermal processing chamber, which acts as a heat sink. Conductive heat transfer across a small gap from the substrate to the heat sink speeds wafer cooling prior to handling the wafer (e.g., with a robot). In another embodiment, a separate plate is kept cool within a pocket during processing, and is moved close to the substrate and support after processing. In yet another embodiment, a cooling station between a processing chamber and a storage cassette includes two movable cold plates, which are movable to positions closely spaced on either side of the wafer.

Abstract: Methods and apparatuses are provided for cooling semiconductor substrates prior to handling. In one embodiment, a substrate and support structure combination is lifted after high temperature processing to a cold wall of a thermal processing chamber, which acts as a heat sink. Conductive heat transfer across a small gap from the substrate to the heat sink speeds wafer cooling prior to handling the wafer (e.g., with a robot). In another embodiment, a separate plate is kept cool within a pocket during processing, and is moved close to the substrate and support after processing. In yet another embodiment, a cooling station between a processing chamber and a storage cassette includes two movable cold plates, which are movable to positions closely spaced on either side of the wafer.

Abstract: A single-wafer, chemical vapor deposition reactor is provided with hydrogen and silicon source gas suitable for epitaxial silicon deposition, as well as a safe mixture of oxygen in a non-reactive gas. Methods are provided for forming oxide and silicon layers within the same chamber. In particular, a sacrificial oxidation is performed, followed by a hydrogen bake to sublime the oxide and leave a clean substrate. Epitaxial deposition can follow in situ. A protective oxide can also be formed over the epitaxial layer within the same chamber, preventing contamination of the critical epitaxial layer. Alternatively, the oxide layer can serve as the gate dielectric, and a polysilicon gate layer can be formed in situ over the oxide.

Abstract: The present invention provides a method of fabricating a semiconductor device, which could advance the commercialization of semiconductor devices with a copper interconnect. In a process of metal interconnect line fabrication, a TiN thin film combined with an Al intermediate layer is used as a diffusion barrier on trench or via walls. For the formation, Al is deposited on the TiN thin film followed by copper filling the trench. Al diffuses to TiN layer and reacts with oxygen or nitrogen, which will stuff grain boundaries efficiently, thereby blocking the diffusion of copper successfully.

Abstract: Improvements in the design of a low mass wafer holder are disclosed. The improvements include the use of peripherally located, integral lips to space a wafer or other substrate above the base plate of the wafer holder. A uniform gap is thus provided between the wafer and the base plate, such as will temper rapid heat exchanges, allow gas to flow between the wafer and wafer holder during wafer pick-up, and keep the wafer holder thermally coupled with the wafer. At the same time, thermal disturbance from lip contact with the wafer is reduced. Gas flow during pick-up can be provided through radial channels in a wafer holder upper surface, or through backside gas passages. A thicker ring is provided at the wafer holder perimeter, and is provided in some embodiments as an independent piece to accommodate stresses accompanying thermal gradients. Self-centering mechanisms are provided to keep the wafer holder centered relative to a spider which is subject to differential thermal expansion.

Abstract: Thin films are formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g.

Abstract: Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g.

Abstract: A wafer temperature estimator calibrates contact-type temperature sensor measurements that are used by a temperature controller to control substrate temperature in a high temperature processing chamber. Wafer temperature estimator parameters provide an estimated wafer temperature from contact-type temperature sensor measurements. The estimator parameters are refined using non-contact-type temperature sensor measurements during periods when the substrate temperature is decreasing or the heaters are off. A corresponding temperature control system includes a heater, a contact-type temperature sensor in close proximity to the substrate, and an optical pyrometer placed to read temperature directly from the substrate. A wafer temperature estimator uses the estimator parameters and measurements from the contact-type sensor to determine an estimated wafer temperature. A temperature controller reads the estimated wafer temperature and makes changes to the heater power accordingly.

Abstract: A method and apparatus is provided for determining substrate drift from its nominal or intended position. The apparatus includes at least two fixed reference points. The reference points can be fixed with respect to the processing tool, or with respect to the end effector. As a robotic arm moves the end effector and substrate along a path, a camera captures images of the edge of the substrate and the reference points. Two or more cameras can also be provided. A computer can then calculate positional drift of the substrate, relative to its expected or centered position on the end effector, based upon these readings, and this drift can be corrected in subsequent robotic arm movement.

Abstract: Improvements in the design of a low mass wafer holder are disclosed. The improvements include the use of peripherally located, integral lips to space a wafer or other substrate above the base plate of the wafer holder. A uniform gap is thus provided between the wafer and the base plate, such as will temper rapid heat exchanges, allow gas to flow between the wafer and wafer holder during wafer pick-up, and keep the wafer holder thermally coupled with the wafer. At the same time, thermal disturbance from lip contact with the wafer is reduced. Gas flow during pick-up can be provided through radial channels in a wafer holder upper surface, or through backside gas passages. A thicker ring is provided at the wafer holder perimeter, and is provided in some embodiments as an independent piece to accommodate stresses accompanying thermal gradients. Self-centering mechanisms are provided to keep the wafer holder centered relative to a spider which is subject to differential thermal expansion.

Abstract: The present invention provides a method of fabricating a semiconductor device, which could advance the commercialization of semiconductor devices with a copper interconnect. In a process of metal interconnect line fabrication, a TiN thin film combined with an Al intermediate layer is used as a diffusion barrier on trench or via walls. For the formation, Al is deposited on the TiN thin film followed by copper filling the trench. Al diffuses to TiN layer and reacts with oxygen or nitrogen, which will stuff grain boundaries efficiently, thereby blocking the diffusion of copper successfully.

Abstract: Methods for depositing epitaxial films such as epitaxial Ge and SiGe films. During cooling from high temperature processing to lower deposition temperatures for Ge-containing layers, Si or Ge compounds are provided to the substrate. Smooth, thin, relatively defect-free Ge or SiGe layers result. Retrograded relaxed SiGe is also provided between a relaxed, high Ge-content seed layer and an overlying strained layer.

Abstract: Various reactors for growing thin films on a substrate by subjecting the substrate to alternately repeated surface reactions of vapor-phase reactants are disclosed. In one embodiment, the reactor comprises a reaction chamber. A showerhead plate divides the reaction chamber into upper and lower parts. A first precursor is directed towards the lower half of the reaction chamber and a second precursor is directed towards the upper half of the reaction chamber. The substrate is disposed within the lower half of the reaction chamber. The showerhead plate includes plurality passages such that the upper half is in communication with the lower half of the reaction chamber. In another arrangement, the upper half of the reaction chamber defines a plasma cavity in which in-situ radicals are formed. In yet another arrangement, the reaction chamber includes a shutter plate, which is configured to selectively open and close the passages in the showerhead plate.