Patents by Inventor Iwao Takemoto

Iwao Takemoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4992876
    Abstract: A noise reduction circuit receives a periodic signal from an imaging device, and includes first and second circuits in which noise components opposite in phase are offset by delaying the input signal to produce a delayed signal and adding the delayed signal and the input signal. The output of the first circuit is supplied to a low pass filter, while the output of the second circuit is integrated through a first high-pass filter for a time wherein an output signal representing the sum of the input signal and the delayed signal is generated and is then outputted through a second high pass filter. Output signals of the low-pass filter and the second high-pass filter are then added and the result is outputted as a signal free noise.
    Type: Grant
    Filed: July 31, 1989
    Date of Patent: February 12, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Shigeki Nishizawa, Toshio Miyazawa, Iwao Takemoto, Tetsuro Izawa
  • Patent number: 4972255
    Abstract: A monolithic color line sensor having a plurality of photoelectric converter arrays, such as three photoelectric converter arrays, each one thereof being associated with respective color filters corresponding to one of the primary colors red, green and blue. The photoelectric arrays are formed in respectively different well regions of the semiconductor substrate and which well regions are, furthermore, formed as laterally elongated well regions along a common lateral direction and which well regions are also respectively spaced-apart from each other along a vertical direction which is orthogonal to said lateral direction with respect to a common plane. The monolithic color line sensor is further associated with a read-out operation for time-serially outputting the signals from the photoelectric converters via corresponding pixel signal lines.
    Type: Grant
    Filed: November 1, 1988
    Date of Patent: November 20, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Toshiki Suzuki, Yoshiharu Oowaku, Iwao Takemoto
  • Patent number: 4896217
    Abstract: A solid-state imaging device is provided which includes an optical low-pass filter, and a solid-state imaging element chip for receiving optical signals through the low-pass filter. In addition, a shielding member having an optical transmissivity and an electric conductivity is interposed between the low-pass filter and the solid-state imaging element chip to improve image quality.
    Type: Grant
    Filed: June 10, 1988
    Date of Patent: January 23, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Miyazawa, Kouzou Yasuda, Hiroichi Soukei, Iwao Takemoto
  • Patent number: 4870493
    Abstract: Disclosed is a solid state imaging device with a first and a second vertical scanning register for full-electrically setting the photo-sensitivity of a TV camera in accordance with the difference of the vertical scanning timing.
    Type: Grant
    Filed: July 30, 1987
    Date of Patent: September 26, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Tetsurou Izawa, Toshio Miyazawa, Shigeki Nishizawa, Iwao Takemoto, Kouzou Yasuda
  • Patent number: 4866292
    Abstract: Disclosed is a solid state imaging system with a variable sensitivity function in which the sensitivity of the image sensor device is varied in response to the output level of the device.
    Type: Grant
    Filed: September 30, 1987
    Date of Patent: September 12, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Iwao Takemoto, Tetsurou Izawa, Hiroichi Sokei, Toshiki Suzuki
  • Patent number: 4841369
    Abstract: A solid-state imaging system is provided with a vertical and/or horizontal window function, in which vertical and/or horizontal scanning corresponding to an unnecessary pick-up range of a camera subject (hatched portions of FIG. 8) is done with a high rate or omitted by driving with high frequency or resetting a vertical and/or a horizontal scanning register.
    Type: Grant
    Filed: July 2, 1987
    Date of Patent: June 20, 1989
    Inventors: Shigeki Nishizawa, Iwao Takemoto, Toshio Miyazawa, Tetsurou Izawa
  • Patent number: 4774586
    Abstract: In the interline type charge transfer imaging device, two of the three groups of wiring through which driving pulses are sent to each of three groups of electrodes constituting vertical charge transfer devices are arranged in horizontal direction and the remaining one group of wiring is arranged in vertical direction. Light-shielding layer is installed on the vertically running wires and the electrodes connected with those wires.
    Type: Grant
    Filed: August 21, 1985
    Date of Patent: September 27, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Norio Koike, Masaaki Nakai, Kenji Itoh, Toshiyuki Akiyama, Iwao Takemoto, Shinya Oba
  • Patent number: 4621291
    Abstract: This invention relates to an area imaging device having an array of picture elements formed of photodiodes and insulated-gate MOSTs which is vertically scanned by a shift register and horizontally scanned by a charge transfer device (CTD). The solid-state imaging device according to this invention has a transfer MOST provided between a vertical signal output line and a horizontal switch MOST, a resetting MOST connected to the junction between said transfer MOST and the horizontal switch MOST, and a mechanism for setting the vertical signal line at a reference potential just before signal transfer. The transfer MOST connected between the junction of the horizontal switch MOST and the resetting MOST and the vertical signal line is a double-gate MOST formed of a series connection of a transfer gate and another transfer gate. Therefore, the charges under the gate of the transfer MOST can be removed for fixed noise to be greatly reduced.
    Type: Grant
    Filed: February 1, 1983
    Date of Patent: November 4, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Iwao Takemoto, Shinya Ohba, Masakazu Aoki, Haruhisa Ando, Masaaki Nakai, Toshifumi Ozaki, Takuya Imaide
  • Patent number: 4599133
    Abstract: On a semiconductor substrate surface, a plurality of polycrystalline or amorphous silicon films and a plurality of insulator films which are substantially transparent to an irradiating energy beam and each of which has an opening are formed so as to be alternately stacked. Thereafter, the plurality of polycrystalline or amorphous silicon films are turned into a single crystal by irradiating them with the energy beam.
    Type: Grant
    Filed: May 4, 1983
    Date of Patent: July 8, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Masanobu Miyao, Makoto Ohkura, Iwao Takemoto, Masao Tamura
  • Patent number: 4577230
    Abstract: A solid state imaging device is disclosed in which photodiodes are arranged regularly in horizontal and vertical directions and generate signal charges in response to incident light, the signal charge thus obtained and smear charges stored on vertical signal lines are alternately and separately transferred to an output end by a horizontal charge transfer device, each of the smear charges is converted at the output end into a first voltage, the resultant charge of a signal charge following the above smear charge and another kind of smear charge is converted at the output end into a second voltage, a reset operation for the smear charge and resultant charge held at the output end is performed at an interval twice as long as the repetition period of a transfer pulse applied to the horizontal charge transfer device, and at least one of the first and second voltages is attenuated or amplified so that a difference between the first and second voltages thus processed provides an image signal in which any smear compo
    Type: Grant
    Filed: January 16, 1985
    Date of Patent: March 18, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Ozawa, Toshiyuki Akiyama, Shuusaku Nagahara, Iwao Takemoto
  • Patent number: 4577231
    Abstract: Disclosed is a two-dimensionally arrayed solid-state imaging device for a television camera having a photodiode array arranged at a photo-sensing section and a readout horizontal register constructed by a charge transfer device (CTD) such as a BCD, CCD or BBD. An inverter circuit is provided for each of the vertical signal lines. An input of the inverter circuit is connected to a vertical signal line drain of at least one transfer transistor arranged between the vertical signal line and the CTD, and an output of the inverter circuit is connected to a gate of the transfer transistor. Transfer efficiency is improved by the insertion of the inverter circuit and fixed pattern noise is substantially reduced by supplying bias currents.
    Type: Grant
    Filed: March 17, 1983
    Date of Patent: March 18, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Shinya Ohba, Haruhisa Ando, Masaaki Nakai, Toshifumi Ozaki, Koichi Seki, Kenji Takahashi, Toshiyuki Akiyama, Iwao Takemoto, Takuya Imaide, Akihide Okuda, Masaharu Kubo
  • Patent number: 4570175
    Abstract: At least one layer of insulator film and single-crystal film are alternately stacked and deposited on a surface of a semiconductor substrate, and an impurity-doped region formed in each semiconductor film is used as a gate, source or drain of a MOS transistor.Thus, a three-dimensional semiconductor device is constructed in which MOS transistors are arranged, not only in the direction of the semiconductor substrate surface, but also in a direction perpendicular thereto.
    Type: Grant
    Filed: June 16, 1983
    Date of Patent: February 11, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Masanobu Miyao, Makoto Ohkura, Iwao Takemoto, Terunori Warabisako, Kiichiro Mukai, Ryo Haruta, Yasushiro Nishioka, Shinichiro Kimura, Takashi Tokuyama
  • Patent number: 4551742
    Abstract: A solid-state imaging device is provided with picture elements which are each composed of a photoelectric conversion element and a MOS transistor as a switching element and which are arranged in the form of a matrix. A scanning mechanism sequentially scans the picture elements to sequentially read out photoelectric conversion signals. To eliminate smear and reduce parasitic capacitance, a high-impurity-concentration diffusion layer serving as an output terminal of the MOS transistor constituting the picture element is formed on an insulator layer for isolating the elements.
    Type: Grant
    Filed: August 14, 1984
    Date of Patent: November 5, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Iwao Takemoto, Shiya Ohba, Masakazu Aoki, Haruhisa Ando, Masaaki Nakai, Toshifumi Ozaki, Masao Tamura, Masanobu Miyao
  • Patent number: 4543610
    Abstract: A solid-state imaging device comprises a number of photodiodes arrayed in horizontal rows and vertical columns, a first output circuit for sequentially reading out signal charges from those photodiodes which are arrayed on odd-numbered horizontal rows, a second output circuit for sequentially reading out signal charges from the photodiodes arrayed on the even-numbered horizontal rows, a synchronizing pulse generator for synchronizing operation of the first and second output circuits, a first subtracting circuit for determining the difference between the output signals of the first and second output circuits in odd-numbered field, and a second subtracting circuit for determining the difference between the output signals of the first and second output circuits in even-numbered field. The outputs of the first and second subtracting circuit are alternately extracted in synchronism with the synchronizing pulse produced by the synchronizing pulse generator.
    Type: Grant
    Filed: July 29, 1983
    Date of Patent: September 24, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Ozawa, Shusaku Nagahara, Kenji Takahashi, Iwao Takemoto, Shigeki Nishizawa, Masanori Sato, Satoshi Suzuki
  • Patent number: 4532549
    Abstract: Disclosed is a solid-state imaging device wherein optical information of a number of photo-electric conversion elements arranged in a matrix is read into vertical signal lines by a vertical shift register and then the optical information on the vertical signal lines is horizontally scanned by a horizontal register of a charge transfer device. Bias charge storage means and quasi-signal sweep-out drains are disposed between the horizontal register and the vertical signal lines, and a bias charge input means is arranged in the horizontal register. In order to ensure high efficiency in transferring signals between the vertical lines to the storage means, the sweep-out drains and the charge transfer device, it is arranged for bias charges to be provided at each stage of transfer. Thus, bias charges supplied from the storage means are used to transfer charges from the vertical lines to the storage means.
    Type: Grant
    Filed: March 10, 1983
    Date of Patent: July 30, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Toshifumi Ozaki, Shinya Ohba, Iwao Takemoto, Masaaki Nakai, Haruhisa Ando, Shusaku Nagahara, Takuya Imaide, Kenji Takahashi, Toshiyuki Akiyama
  • Patent number: 4514766
    Abstract: A solid-state imaging device is provided which employs CCDs as vertical shift registers and a horizontal shift register for vertically and horizontally scanning and reading out a large number of photoelectric elements arrayed in a two-dimensional plane. The imaging device is characterized in that the photoelectric elements of each column arranged between the vertical shift registers are alternately connected to the right and left vertical shift registers. This results in the resolution of the device being enhanced sharply.
    Type: Grant
    Filed: April 7, 1983
    Date of Patent: April 30, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Norio Koike, Iwao Takemoto, Shinya Ohba, Toshiaki Masuhara, Masaharu Kubo
  • Patent number: 4456929
    Abstract: In a solid state image pick-up device of the type comprising a first semiconductor layer including a photoelectric conversion element array, and vertical and horizontal switching elements adapted to select the photoelectric conversion elements, a second semiconductor layer including a horizontal shift register for selecting the horizontal switching elements, a third semiconductor layer including a vertical shift register for selecting the vertical switching elements, the first, second and third semiconductor layers are insulated from each other, and gate voltage V.sub.SMOS.L impressed upon a gate electrode of a not selected horizontal switching element is made to satisfy a relation V.sub.SMOS.L .gtoreq.V.sub.WPD +F.sub.FB where V.sub.WPD represents a potential of the first semiconductor layer, and V.sub.FB a flat band voltage beneath gate electrodes of the horizontal switching elements.
    Type: Grant
    Filed: June 4, 1982
    Date of Patent: June 26, 1984
    Assignee: Hitachi, Ltd.
    Inventors: Masakazu Aoki, Haruhisa Ando, Shinya Ohba, Iwao Takemoto
  • Patent number: 4413283
    Abstract: A solid-state imaging device comprises a plurality of photodiodes arranged in a matrix form in the same semiconductor substrate, horizontal and vertical switching elements for selecting the photodiodes, horizontal and vertical shift registers for supplying scan pulses to the horizontal and vertical switching elements, and an interlace circuit for simultaneously selecting two vertical gate lines to simultaneously read two picture element rows. A buffer circuit is inserted between the interlace circuit and the vertical gate lines for changing a potential level of one of the two selected vertical gate lines from a high level to a low level prior to changing the potential level of the other vertical gate line.
    Type: Grant
    Filed: December 21, 1981
    Date of Patent: November 1, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Masakazu Aoki, Haruhisa Ando, Shinya Ohba, Iwao Takemoto
  • Patent number: 4407010
    Abstract: A solid state image pickup device having a plurality of solid state elements in a two-dimensional array so as to form picture cells. Each solid state element includes a photoelectric converting element and a switching field effect transistor to permit scanning of the elements by scanners. To counteract noise and blooming, a second field effect transistor acting as an amplifier is connected between the photoelectric converting element and the switching field effect transistor. A third field effect transistor is coupled to the photoelectric converting element for resetting the same.
    Type: Grant
    Filed: August 6, 1981
    Date of Patent: September 27, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Toru Baji, Toshihisa Tsukada, Norio Koike, Toshiyuki Akiyama, Iwao Takemoto, Shigeru Shimada, Chushirou Kusano, Shinya Ohba, Haruo Matsumaru
  • Patent number: 4405935
    Abstract: Disclosed is a solid-state imaging device having a semiconductor integrated circuit in which a plurality of switching elements for selecting positions of picture elements and scanners for turning "on" and "off" the switching elements in time sequence are disposed on an identical substrate, a photoconductive film which is disposed on the integrated circuit and which is connected to one end of each of the switching elements, and a light transmitting electrode which is disposed on the photoconductive film, characterized at least in that a breakdown voltage of a junction formed between the semiconductor substrate and an impurity region which has a conductivity type opposite to that of the semiconductor substrate and which stores therein carriers attendant upon incidence of light is made smaller than a breakdown voltage between the storing first impurity region of said each switching element and a second impurity region thereof which forms a signal leading-out portion.
    Type: Grant
    Filed: January 23, 1981
    Date of Patent: September 20, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Toru Baji, Norio Koike, Toshihisa Tsukada, Iwao Takemoto, Hideaki Yamamoto, Yukio Takasaki