Abstract: A circuit board includes: a first wiring layer provided on a substrate; an insulating layer including an opening, the insulating layer being provided on the first wiring layer; a surface-energy control layer provided in a region opposed to the opening of the insulating layer on the first wiring layer, the surface-energy control layer controlling surface energy of the first wiring layer; a semiconductor layer provided in a selective region on the insulating layer; and a second wiring layer on the insulating layer, the second wiring layer being electrically connected to the semiconductor layer, and being electrically connected to the first wiring layer through the opening.

Abstract: A high-performance thin film transistor structure which is easily manufactured is provided. The thin film transistor structure includes: a first electrode; second and third electrodes apart from each other in a hierarchical level different from that of the first electrode; first, second, and third wirings connected to the first, second, and third electrodes, respectively; a main stack body disposed so as to be opposed to the first electrode with an interlayer insulating layer in between, between the first electrode, and the second and third electrodes; and a sub stack body including an insulating layer and a semiconductor layer, disposed so as to be opposed to the first wiring with the interlayer insulating layer in between, between the first and second wirings in a position where the first and second wirings overlap and/or between the first and third wirings in a position where the first and third wirings overlap.

Abstract: A high-performance thin film transistor structure which is easily manufactured is provided. The thin film transistor structure includes: a first electrode; second and third electrodes apart from each other in a hierarchical level different from that of the first electrode; first, second, and third wirings connected to the first, second, and third electrodes, respectively; a main stack body disposed so as to be opposed to the first electrode with an interlayer insulating layer in between, between the first electrode, and the second and third electrodes; and a sub stack body including an insulating layer and a semiconductor layer, disposed so as to be opposed to the first wiring with the interlayer insulating layer in between, between the first and second wirings in a position where the first and second wirings overlap and/or between the first and third wirings in a position where the first and third wirings overlap.

Abstract: A thin film transistor capable of stably obtaining good performance is provided. The thin film transistor includes an organic semiconductor layer, and a protective layer and a source electrode and a drain electrode formed on the organic semiconductor layer. The protective layer is disposed at least in a region between the source electrode and the drain electrode.

Abstract: A method of forming a display device including source/drain electrodes on a substrate, a pixel electrode, an insulating partition wall layer, a channel-region semiconductor layer. Source/drain electrodes of a thin-film transistor are formed on the substrate, while a pixel electrode is connected to the source/drain electrodes. The insulating partition wall layer is formed on the substrate, where the partition wall layer has a first opening extending to between the source electrode and the drain electrode. Furthermore, a channel-region semiconductor layer is formed by depositing a semiconductor layer over the partition wall layer. The channel-region semiconductor layer is on the bottom of the first opening to be separate from a upper part of the partition wall layer.

Abstract: A display device includes: a substrate including a display region and a peripheral region; a first wiring provided on a front face of the substrate; and a second wiring provided on a rear face of the substrate and electrically connected to the first wiring.

Abstract: A circuit board includes: a first wiring layer provided on a substrate; an insulating layer including an opening, the insulating layer being provided on the first wiring layer; a surface-energy control layer provided in a region opposed to the opening of the insulating layer on the first wiring layer, the surface-energy control layer controlling surface energy of the first wiring layer; a semiconductor layer provided in a selective region on the insulating layer; and a second wiring layer on the insulating layer, the second wiring layer being electrically connected to the semiconductor layer, and being electrically connected to the first wiring layer through the opening.

Abstract: A display unit includes, on a substrate: a plurality of light emitting devices in which a first electrode, an organic layer including a light emitting layer, and a second electrode are respectively and sequentially layered; and a black insulating layer separating the organic layer for the every light emitting device.

Abstract: A thin-film element assembly includes: a base having flexibility and a plurality of thin-film elements provided on a first surface of the base, wherein a second region where no thin-film element is provided is formed in the base in an outer side of a first region where a plurality of thin-film elements are provided, and wherein convex portions are formed in the second region of the first surface of the base, or the second region of a second surface, or the second region of each of the first and second surfaces.

Abstract: A method of forming a display device including source/drain electrodes on a substrate, a pixel electrode, an insulating partition wall layer, a channel-region semiconductor layer. Source/drain electrodes of a thin-film transistor are formed on the substrate, while a pixel electrode is connected to the source/drain electrodes. The insulating partition wall layer is formed on the substrate, where the partition wall layer has a first opening extending to between the source electrode and the drain electrode. Furthermore, a channel-region semiconductor layer is formed by depositing a semiconductor layer over the partition wall layer. The channel-region semiconductor layer is on the bottom of the first opening to be separate from a upper part of the partition wall layer.

Abstract: A method of forming a display device including source/drain electrodes on a substrate, a pixel electrode, an insulating partition wall layer, a channel-region semiconductor layer. The source/drain electrodes and the pixel electrode are formed on the substrate and in contact with each other. The insulating partition wall layer is formed on the substrate and provided with a first opening extending to between the source electrode and the drain electrode and a second opening formed on the pixel electrode and extending to the pixel electrode. The channel-region semiconductor layer is formed on the bottom of the first opening. The insulating film is formed on the partition wall layer so as to cover the first opening including the channel-region semiconductor layer. The oriented film covers the first opening from above the insulating film and the second opening from the pixel electrode.

Abstract: A semiconductor device 19-1 includes a source electrode 3s and a drain electrode 3d disposed on a substrate 1, an insulating partition wall 5, which has a first opening 5a reaching end portions of the source electrode 3s and the drain electrode 3d and between these electrodes 3s-3d and which is disposed on the substrate 1, a channel portion semiconductor layer 7a, which is composed of a semiconductor layer 7 formed from above the partition wall 5 and which is disposed on the bottom portion of the first opening 5a while being separated from the semiconductor 7 on the partition wall 5, a gate insulating film 9 formed all over the surface from above the semiconductor layer 7 including the channel portion semiconductor layer 7a, and a gate electrode 11a disposed on the gate insulating film 9 while overlapping the channel portion semiconductor layer 7a.

Abstract: There is provided a method of manufacturing an electronic element for forming the electronic element including one or more wiring layers and an organic insulating layer stacked on a substrate. The method includes a wiring layer formation step of forming the wiring layer on the substrate; an organic insulating layer formation step of forming an organic insulating layer on the wiring layer; and an irradiation step of irradiating a short-circuit portion of the wiring layer through the organic insulating layer with a laser beam having a wavelength transmissive through the organic insulating layer.

Abstract: A method of forming a display device including source/drain electrodes on a substrate, a pixel electrode, an insulating partition wall layer, a channel-region semiconductor layer. The source/drain electrodes and the pixel electrode are formed on the substrate and in contact with each other. The insulating partition wall layer is formed on the substrate and provided with a first opening extending to between the source electrode and the drain electrode and a second opening formed on the pixel electrode and extending to the pixel electrode. The channel-region semiconductor layer is formed on the bottom of the first opening. The insulating film is formed on the partition wall layer so as to cover the first opening including the channel-region semiconductor layer. The oriented film covers the first opening from above the insulating film and the second opening from the pixel electrode.

Abstract: A display device includes source/drain electrodes on a substrate, a pixel electrode, an insulating partition wall layer, a channel-region semiconductor layer. The source/drain electrodes and the pixel electrode are formed on the substrate and in contact with each other. The insulating partition wall layer is formed on the substrate and provided with a first opening extending to between the source electrode and the drain electrode and a second opening formed on the pixel electrode and extending to the pixel electrode. The channel-region semiconductor layer is formed on the bottom of the first opening. The insulating film is formed on the partition wall layer so as to cover the first opening including the channel-region semiconductor layer. The oriented film covers the first opening from above the insulating film and the second opening from the pixel electrode.

Abstract: A thin film transistor capable of stably obtaining good performance is provided. The thin film transistor includes an organic semiconductor layer, and a protective layer and a source electrode and a drain electrode formed on the organic semiconductor layer. The protective layer is disposed at least in a region between the source electrode and the drain electrode.

Abstract: A high-performance thin film transistor structure which is easily manufactured is provided. The thin film transistor structure includes: a first electrode; second and third electrodes apart from each other in a hierarchical level different from that of the first electrode; first, second, and third wirings connected to the first, second, and third electrodes, respectively; a main stack body disposed so as to be opposed to the first electrode with an interlayer insulating layer in between, between the first electrode, and the second and third electrodes; and a sub stack body including an insulating layer and a semiconductor layer, disposed so as to be opposed to the first wiring with the interlayer insulating layer in between, between the first and second wirings in a position where the first and second wirings overlap and/or between the first and third wirings in a position where the first and third wirings overlap.

Abstract: A thin-film transistor includes: an organic semiconductor layer; and a source electrode and a drain electrode spaced apart from each other and disposed to respectively overlap the organic semiconductor layer. The organic semiconductor layer INCLUDES: a lower organic semiconductor layer; and an upper organic semiconductor layer formed on the lower organic semiconductor layer and having solubility and conductivity higher than the lower organic semiconductor layer. The lower organic semiconductor layer extends from an area overlapping the source electrode to an area overlapping the drain electrode, while the upper organic semiconductor layer is disposed in each of the area overlapping the source electrode and the area overlapping the drain electrode so that the respective upper organic semiconductor layers are spaced apart from each other.

Abstract: A semiconductor device includes a first insulating film that includes a first opening reaching a substrate and that is provided on the substrate, a second insulating film that includes a second opening reaching the substrate through the first opening of the first insulating film and that covers the first insulating film, and a conductive pattern that is provided on the second insulating film so as to be in contact with the substrate through the second opening of the second insulating film.

Abstract: A semiconductor device 19-1 includes a source electrode 3s and a drain electrode 3d disposed on a substrate 1, an insulating partition wall 5, which has a first opening 5a reaching end portions of the source electrode 3s and the drain electrode 3d and between these electrodes 3s-3d and which is disposed on the substrate 1, a channel portion semiconductor layer 7a, which is composed of a semiconductor layer 7 formed from above the partition wall 5 and which is disposed on the bottom portion of the first opening 5a while being separated from the semiconductor 7 on the partition wall 5, a gate insulating film 9 formed all over the surface from above the semiconductor layer 7 including the channel portion semiconductor layer 7a, and a gate electrode 11a disposed on the gate insulating film 9 while overlapping the channel portion semiconductor layer 7a.