Patents by Inventor Jacek Korec

Jacek Korec has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5488236
    Abstract: A gate-controlled bipolar transistor with buried collector includes a wide base bipolar transistor in a semiconductor substrate having a trench at a face thereof. A dual-channel insulated-gate field effect transistor (IGFET) is also included adjacent a sidewall of the trench for providing gated turn-on and turn-off control of the bipolar transistor. The bipolar transistor includes a buried collector region at a bottom of the trench, which is electrically connected to a cathode contact at the face. An emitter of the transistor is electrically connected to an anode contact at an opposing face of the substrate. For turn-on, the base of the bipolar transistor is electrically connected to the cathode contact upon the application of a gate bias signal to the IGFET. By electrically connecting the base to the cathode contact, forward conduction can be established once the anode contact is appropriately biased relative to the cathode contact.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: January 30, 1996
    Assignee: North Carolina State University
    Inventors: B. Jayant Baliga, Jacek Korec
  • Patent number: 5471075
    Abstract: A semiconductor switching device includes a plurality of adjacent and parallel-connected switching cells in a semiconductor substrate. Each cell includes a thyristor having a floating emitter region and a trench-gate field effect transistor (TFET) for providing turn-on and turn-off control of the thyristor. In one embodiment of the switching device, parasitic thyristor latch-up is suppressed by using a dual-channel TFET which forms both inversion-layer and accumulation-layer channel connections in series between respective floating emitter regions and the cathode contact. In another embodiment, parasitic thyristor latch-up is prevented by joining floating emitter regions of a pair of adjacent cells to thereby eliminate a parasitic P-N-P-N path between the anode and cathode contacts.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: November 28, 1995
    Assignee: North Carolina State University
    Inventors: Mallikarjunaswamy S. Shekar, B. Jayant Baliga, Jacek Korec