Patents by Inventor Jae-Bon Koo

Jae-Bon Koo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8659026
    Abstract: A high-speed flat panel display has thin film transistors in a pixel array portion in which a plurality of pixels are arranged and a driving circuit portion for driving the pixels of the pixel array portion, which have different resistance values than each other or have different geometric structures than each other. The flat panel display comprises a pixel array portion where a plurality of pixels are arranged, and a driving circuit portion for driving the pixels of the pixel array portion. The thin film transistors in the pixel array portion and the driving circuit portion have different resistance values in their gate regions or drain regions than each other, or have different geometric structures than each other. One thin film transistor has a zigzag shape in its gate region or drain region or has an offset region.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: February 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Bon Koo, Ji-Yong Park, Sang-Il Park, Ki-Yong Lee, Ul-Ho Lee
  • Patent number: 8656836
    Abstract: Provided is an offset printer configured to increase or maximize productivity and yield. The offset printer includes a printing roller, a coating unit configured to apply a printing substance to the printing roller, a patterning unit configured to pattern the printing substance applied to the printing roller from the coating unit, a printing unit configured to transfer the patterned printing substance to a printing medium, and a cleaning unit configured to clean the printing substance remaining on the printing roller by a dry cleaning method.
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: February 25, 2014
    Assignee: Intellectual Discovery Co., Ltd.
    Inventors: Jae Bon Koo, In-Kyu You, Minseok Kim, Taeyoub Kim
  • Patent number: 8653631
    Abstract: Provided are a transferred thin film transistor and a method of manufacturing the same. The method includes: forming a source region and a drain region that extend in a first direction in a first substrate and a channel region between the source region and the drain region; forming trenches that extend in a second direction in the first substrate to define an active layer between the trenches, the second direction intersecting the first direction; separating the active layer between the trenches from the first substrate by performing an anisotropic etching process on the first substrate inside the trenches; attaching the active layer on a second substrate; and forming a gate electrode in the first direction on the channel region of the active layer.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: February 18, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon Koo, Jong-Hyun Ahn, Seung Youl Kang, Hasan Musarrat, In-Kyu You, Kyoung Ik Cho
  • Patent number: 8648364
    Abstract: A flat panel display with a black matrix and a fabrication method of the same. The flat panel display has an insulating substrate at the upper part of which a pixel electrode is equipped; an opaque conductive film formed on the front surface of the insulating substrate except at the pixel electrode; an insulating film equipped with a contact hole exposing a portion of the opaque conductive film; and a thin film transistor equipped with a gate electrode, and conductive patterns for source/drain electrodes connected to the opaque conductive film through the contact hole.
    Type: Grant
    Filed: July 5, 2007
    Date of Patent: February 11, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Bon Koo, Dong-Chan Shin
  • Publication number: 20140014915
    Abstract: Disclosed are dual mode display devices and methods of manufacturing the same. The dual mode display device may include a first substrate, a first electrode on the first substrate, a second substrate opposite to the first electrode and the first substrate, a second electrode between the second substrate and the first electrode, a third electrode between the first electrode and the second electrode, an optic switching layer between the first electrode and the third electrode, and an organic light-emitting layer between the second electrode and the third electrode.
    Type: Application
    Filed: February 8, 2013
    Publication date: January 16, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon KOO, Hojun RYU, Chi-Sun HWANG, Jeong Ik LEE, Hye Yong CHU
  • Publication number: 20130314634
    Abstract: Provided are a dual-mode display device and a method of manufacturing the same. The device includes a lower substrate, an upper substrate facing the lower substrate, a thin-film transistor portion between the upper substrate and the lower substrate, a first anode on one side of the thin-film transistor portion, a first cathode between the first anode and the upper substrate, an organic light-emitting layer between the first cathode and the first anode, a second anode on the other side of the thin-film transistor portion, a second cathode between the second anode and the upper substrate, or the second anode and the lower substrate, and a optical switching layer between the second cathode and the second anode.
    Type: Application
    Filed: March 14, 2013
    Publication date: November 28, 2013
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon KOO, JEONG IK LEE, Chi-Sun HWANG, Hojun RYU, Hye Yong CHU
  • Publication number: 20130314633
    Abstract: A dual mode display apparatus according to the inventive concept includes a lower substrate, a first lower electrode on the lower substrate, a light switching layer on the first lower electrode, a first upper electrode on the light switching layer, a passivation layer on the first upper electrode, a contact plug connected to the first upper electrode and penetrating the passivation layer, a second lower electrode on the contact plug and the passivation layer, an organic light-emitting layer on the second lower electrode, a second upper electrode on the organic light-emitting layer, and an upper substrate on the second upper electrode.
    Type: Application
    Filed: March 14, 2013
    Publication date: November 28, 2013
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon KOO, Hojun RYU, Chi-Sun HWANG, JEONG IK LEE, Hye Yong CHU
  • Publication number: 20130292160
    Abstract: Provided are a multi-layer interconnection structure and a manufacturing method thereof. The multi-layer interconnection structure includes a substrate; a first wiring on the substrate; an interlayer insulation layer on the first wiring; a second wiring on the interlayer insulation layer; and a via contact including at least one conductive filament penetrating through the interlayer insulation layer between the second wiring and the first wiring to be electrically connected to the first wiring and the second wiring.
    Type: Application
    Filed: July 11, 2013
    Publication date: November 7, 2013
    Inventors: Yong Suk YANG, In-Kyu YOU, Jae Bon KOO, Yong-Young NOH
  • Publication number: 20130230976
    Abstract: The present invention relates to a flat panel display device comprising a polysilicon thin film transistor and a method of manufacturing the same. Grain sizes of polysilicon grains formed in active channel regions of thin film transistors of a driving circuit portion and a pixel portion of the flat panel display device are different from each other. Further, the flat panel display device comprising P-type and N-type thin film transistors having different particle shapes from each other.
    Type: Application
    Filed: April 16, 2013
    Publication date: September 5, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: Ji-Yong PARK, Jae-Bon Koo, Hye-Hyang Park, Ki-Yong Lee, Ul-Ho Lee
  • Patent number: 8516689
    Abstract: Provided are a multi-layer interconnection structure and a manufacturing method thereof. The multi-layer interconnection structure includes a substrate; a first wiring on the substrate; an interlayer insulation layer on the first wiring; a second wiring on the interlayer insulation layer; and a via contact including at least one conductive filament penetrating through the interlayer insulation layer between the second wiring and the first wiring to be electrically connected to the first wiring and the second wiring.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: August 27, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong Suk Yang, In-Kyu You, Jae Bon Koo, Yong-Young Noh
  • Patent number: 8441049
    Abstract: The present invention relates to a flat panel display device comprising a polysilicon thin film transistor and a method of manufacturing the same. Grain sizes of polysilicon grains formed in active channel regions of thin film transistors of a driving circuit portion and a pixel portion of the flat panel display device are different from each other. Further, the flat panel display device comprising P-type and N-type thin film transistors having different particle shapes from each other.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: May 14, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ji-Yong Park, Jae-Bon Koo, Hye-Hyang Park, Ki-Yong Lee, Ul-Ho Lee
  • Publication number: 20130108777
    Abstract: Provided is a method for manufacturing a flexible electrode substrate. The method includes forming a microlens array under a film, forming a transparent electrode layer on the film so as to oppose the microlens array, and forming a grid electrode between the film and the transparent electrode layer or on the transparent electrode layer. Herein, the grid electrode and the microlens array are formed on the both sides of the film by performing at least one of an inkjet printing process, a roll-to-roll printing process, a screen printing process, and a stamping printing process.
    Type: Application
    Filed: July 20, 2012
    Publication date: May 2, 2013
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Bon KOO, In-Kyu YOU, Yong Suk YANG, Minseok KIM
  • Publication number: 20130092415
    Abstract: The inventive concept provides cables, methods of manufacturing the same, and apparatuses for depositing a dielectric layer. The cable may include a first electrode, a second electrode spaced apart from the first electrode, and a dielectric layer disposed between the first and second electrodes and including a polymer having xylene as a monomer.
    Type: Application
    Filed: September 14, 2012
    Publication date: April 18, 2013
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Suk YANG, In-Kyu YOU, Jae Bon KOO, Soon-Won JUNG
  • Patent number: 8421610
    Abstract: Provided are a touch screen and a method of operating the same. The touch screen includes a detecting part, a control part, and a tactile feedback part. The detecting part detects object's approach or contact. The control part receives a signal of the detecting part to output a feedback signal. The tactile feedback part receives the feedback signal of the control part to provide a tactile feedback to a contact position using a magnetic force. The tactile feedback uses the magnetic force of a magnetic dipole.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: April 16, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seongdeok Ahn, In-Kyu You, Jiyoung Oh, Chul Am Kim, Jae Bon Koo, Sang Seok Lee, Kyung Soo Suh, Kyoung Ik Cho
  • Patent number: 8404532
    Abstract: Provided are a transferred thin film transistor and a method of manufacturing the same. The method includes: forming a source region and a drain region that extend in a first direction in a first substrate and a channel region between the source region and the drain region; forming trenches that extend in a second direction in the first substrate to define an active layer between the trenches, the second direction intersecting the first direction; separating the active layer between the trenches from the first substrate by performing an anisotropic etching process on the first substrate inside the trenches; attaching the active layer on a second substrate; and forming a gate electrode in the first direction on the channel region of the active layer.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: March 26, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon Koo, Jong-Hyun Ahn, Seung Youl Kang, Hasan Musarrat, In-Kyu You, Kyoung Ik Cho
  • Publication number: 20130056713
    Abstract: The inventive concept provides organic light emitting diodes and methods of fabricating the same. The method may include forming an insulating layer on a substrate, coating a metal ink on the insulating layer, thermally treating the substrate to permeate the metal ink into the insulating layer, thereby forming an assistant electrode layer the insulating layer and the metal ink embedded in the insulating layer, and sequentially forming a first electrode, an organic light emitting layer, a second electrode on the assistant electrode layer.
    Type: Application
    Filed: July 5, 2012
    Publication date: March 7, 2013
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Bon KOO, In-Kyu YOU, Yong Suk YANG, Tae-Youb KIM, Minseok KIM
  • Patent number: 8378421
    Abstract: A thin film transistor substrate. The thin film transistor substrate includes a substrate, an adhesive layer on the substrate, and a semiconductor layer having a first doped region, a second doped region and a channel region on the adhesive layer. The thin film transistor substrate further includes a first dielectric layer on the semiconductor layer, a gate electrode overlapping the channel region, a second dielectric layer on the first dielectric layer and the gate electrode, a source electrode disposed on the second insulating layer, and a drain electrode spaced apart from the source electrode on the source electrode. The channel region is disposed between the first doped region and the second doped region, and has a transmittance higher than those of the first doped region and the second doped region.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: February 19, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon Koo, In-Kyu You, Seongdeok Ahn, Kyoung Ik Cho
  • Patent number: 8362467
    Abstract: A composition for an organic dielectric, includes a compound represented by Formula 1 below; and a cross-linking agent, wherein, in Formula 1, R1 is any one of hydrogen, hydroxyl group, ester group, amide group, or alkyl group or alkoxy group of a carbon number of 1 to 12, R2 is selected from electrolytic functional groups, each of a and b is a positive integer, and the ratio of b to a (b/a) is larger than 0 and smaller than 99,
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: January 29, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong-Young Noh, In-Kyu You, Jae Bon Koo, Soon Won Jung
  • Patent number: 8350267
    Abstract: A high-speed flat panel display has thin film transistors in a pixel array portion in which a plurality of pixels are arranged and a driving circuit portion for driving the pixels of the pixel array portion, which have different resistance values than each other or have different geometric structures than each other. The flat panel display comprises a pixel array portion where a plurality of pixels are arranged, and a driving circuit portion for driving the pixels of the pixel array portion. The thin film transistors in the pixel array portion and the driving circuit portion have different resistance values in their gate regions or drain regions than each other, or have different geometric structures than each other. One thin film transistor has a zigzag shape in its gate region or drain region or has an offset region.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: January 8, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Bon Koo, Ji-Yong Park, Sang-Il Park, Ki-Yong Lee, Ul-Ho Lee
  • Publication number: 20130005079
    Abstract: Provided is an organic thin film transistor, method of forming the same, and a memory device employing the same. The organic thin film transistor includes a substrate, a source electrode and a drain electrode on the substrate, an active layer on the substrate between the source electrode and the drain electrode, a gate electrode controlling the active layer, and an organic dielectric layer between the active layer and the gate electrode. The organic dielectric layer includes nanoparticles, a hydrophilic polymer surrounding the nanoparticles, and a hydrophobic polymer.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 3, 2013
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong-Young NOH, In-Kyu You, Jae Bon Koo