Patents by Inventor Jae-Bon Koo

Jae-Bon Koo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Organic thin film transistor and method of forming the same
    Patent number: 8344366
    Abstract: Provided are an organic thin film transistor and a method of forming the same. The method comprises forming a gate electrode on a substrate, forming a gate dielectric, which covers the gate electrode and includes a recess region at an upper portion, on the substrate, forming a source electrode and a drain electrode in the recess region, and forming an organic semiconductor layer between the source electrode and the drain electrode in the recess region.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: January 1, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kang Dae Kim, In-Kyu You, Jae Bon Koo, Yong Suk Yang, Seung Youl Kang
  • Thin film transistor, method of fabricating the same, and flat panel display having the same
    Patent number: 8324612
    Abstract: A thin film transistor (TFT), a method of fabricating the TFT, and a flat panel display having the TFT, wherein the TFT includes a substrate; a gate electrode provided on the substrate; a gate insulating layer provided on the gate electrode; a source electrode and a drain electrode provided on the gate insulating layer and insulated from the gate electrode; and an organic semiconductor layer contacting the source and drain electrodes and insulated from the gate electrode.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: December 4, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hun-Jung Lee, Jae-Bon Koo
  • Method of manufacturing an organic thin film transistor
    Patent number: 8318533
    Abstract: An organic thin film transistor that has good adhesiveness and good contact resistance as well as allows ohmic contact between an organic semiconductor layer and a source electrode and a drain electrode, and its manufacturing method. There is also provided a flat panel display device using the organic thin film transistor. The organic thin film transistor includes a source electrode, a drain electrode, an organic semiconductor layer, a gate insulating layer, and a gate electrode formed on a substrate, and a carrier relay layer including conductive polymer material formed at least between the organic semiconductor layer and the source electrode or the organic semiconductor layer and the drain electrode.
    Type: Grant
    Filed: April 5, 2010
    Date of Patent: November 27, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Taek Ahn, Min-Chul Suh, Jae-Bon Koo, Jin-Seong Park
  • Resistive memory device and method of fabricating the same
    Patent number: 8278138
    Abstract: Provided are a resistive memory device and a method of fabricating the same. The resistive memory device comprises an electron channel layer formed by means of a swelling process and an annealing process. Thus, conductive nanoparticles are uniformly dispersed in the electron channel layer to improve reliability of the resistive memory device. According to the method, an electron channel layer is formed by means of a printing process, a swelling process, and an annealing process. Thus, fabrication time is reduced.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: October 2, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong Suk Yang, In-Kyu You, Jae Bon Koo, Soon Won Jung, Kang Dae Kim, Yong-Young Noh
  • Thin film transistor using a metal induced crystallization process and method for fabricating the same and active matrix flat panel display using the thin film transistor
    Patent number: 8273638
    Abstract: Provided is a thin film transistor that may be manufactured using Metal Induced Crystallization (MIC) and method for fabricating the same. Also provided is an active matrix flat panel display using the thin film transistor, which may be created by forming a crystallization inducing metal layer below a buffer layer and diffusing the crystallization inducing metal layer. The thin film transistor may include a crystallization inducing metal layer formed on an insulating substrate, a buffer layer formed on the crystallization inducing metal layer, and an active layer formed on the buffer layer and including source/drain regions, and including polycrystalline silicon crystallized by the MIC process.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: September 25, 2012
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Jae-Bon Koo, Sang-Gul Lee
  • FLEXIBLE FLAT CABLE AND MANUFACTURING METHOD THEREOF
    Publication number: 20120235961
    Abstract: A flexible flat cable capable of minimizing distortion and interference of a signal and a manufacturing method thereof are provided. The cable includes wire cores, insulation coating layers surrounding the wire cores, shield coating layers surrounding the insulation coating layers, an upper insulation plate layer formed on the shield coating layers, a lower insulation plate layer formed under the shield coating layers and opposite to the upper insulation plate layer, and a shield plate layer formed under the lower insulation plate layer.
    Type: Application
    Filed: February 28, 2012
    Publication date: September 20, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Suk YANG, In-Kyu YOU, Jae Bon KOO, Su Jae LEE, Taeyoub KIM, Soon-Won JUNG, Kang-Jun BAEG
  • METHOD OF MANUFACTURING THIN FILM TRANSISTOR AND THIN FILM TRANSISTOR SUBSTRATE
    Publication number: 20120161234
    Abstract: A thin film transistor substrate. The thin film transistor substrate includes a substrate, an adhesive layer on the substrate, and a semiconductor layer having a first doped region, a second doped region and a channel region on the adhesive layer. The thin film transistor substrate further includes a first dielectric layer on the semiconductor layer, a gate electrode overlapping the channel region, a second dielectric layer on the first dielectric layer and the gate electrode, a source electrode disposed on the second insulating layer, and a drain electrode spaced apart from the source electrode on the source electrode. The channel region is disposed between the first doped region and the second doped region, and has a transmittance higher than those of the first doped region and the second doped region.
    Type: Application
    Filed: January 13, 2012
    Publication date: June 28, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Bon KOO, In-Kyu YOU, Seongdeok AHN, Kyoung Ik CHO
  • Method for manufacturing semiconductor device
    Patent number: 8198148
    Abstract: Provided is a method for manufacturing a semiconductor device. The method includes: providing a first substrate where an active layer is formed on a buried insulation layer; forming a gate insulation layer on the active layer; forming a gate electrode on the gate insulation layer; forming a source/drain region on the active layer at both sides of the gate electrode; exposing the buried insulation layer around a thin film transistor (TFT) including the gate electrode and the source/drain region; forming an under cut at the bottom of the TFT by partially removing the buried insulation layer; and transferring the TFT on a second substrate.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: June 12, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon Koo, Seung Youl Kang, In-Kyu You
  • METHOD OF AND APPARATUS FOR FORMING A METAL PATTERN
    Publication number: 20120141665
    Abstract: Provided are methods of and apparatuses for forming a metal pattern. In the method, an initiator and a metal pattern are sequentially combined on a previously-formed bonding agent pattern improving adhesion and/or junction properties between the substrate and the metal. The bonding agent pattern may be formed using a reverse offset printing method. The metal pattern may be formed using an electroless electrochemical plating method. The metal pattern can be formed with improved uniformity in thickness and planar area.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 7, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Tae-Youb KIM, Kang-Jun Baeg, In-Kyu You, Minseok Kim, Jae Bon Koo
  • RADIO FREQUENCY IDENTIFICATION TAG
    Publication number: 20120139558
    Abstract: Provided is a radio frequency identification (RFID) tag. The RFID tags includes: a conductive layer and a conductive line disposed above and below an insulation layer, respectively; an antenna connected to one end of the conductive line; a resistor connected to the other end of the conductive line; a first conductive plate connected to the conductive line and constituting a first capacitor in conjunction with the conductive layer and the insulation layer; and a first sensing device connected between the conductive line and the conductive layer and having an impedance changed according to a sensing of a first target material.
    Type: Application
    Filed: November 30, 2011
    Publication date: June 7, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Suk YANG, In-Kyu You, Jae Bon Koo
  • CLICHE AND MANUFACTURING METHOD FOR THE SAME
    Publication number: 20120125213
    Abstract: Provided is a cliche and a method of manufacturing the cliche which can increase or maximize productivity and production yield. The manufacturing method of the cliche includes providing a substrate, forming organic patterns protruding on the substrate, and forming an ink absorption layer on the organic patterns or on the substrate exposed from the organic patterns.
    Type: Application
    Filed: July 29, 2011
    Publication date: May 24, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Bon KOO, Minseok Kim, Taeyoub Kim, In-Kyu You
  • OFFSET PRINTER
    Publication number: 20120125214
    Abstract: Provided is an offset printer configured to increase or maximize productivity and yield. The offset printer includes a printing roller, a coating unit configured to apply a printing substance to the printing roller, a patterning unit configured to pattern the printing substance applied to the printing roller from the coating unit, a printing unit configured to transfer the patterned printing substance to a printing medium, and a cleaning unit configured to clean the printing substance remaining on the printing roller by a dry cleaning method.
    Type: Application
    Filed: November 11, 2011
    Publication date: May 24, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Bon Koo, In-Kyu You, Minseok Kim, Taeyoub Kim
  • Method of manufacturing an organic electroluminescent device having organic light-emitting transistors
    Patent number: 8182304
    Abstract: An EL device with low manufacturing costs and improved yield due to simplified structure and use of an organic light emitting transistor and a method of manufacturing the same are disclosed.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: May 22, 2012
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Min-Chul Suh, Jae-Bon Koo, Hye-Dong Kim
  • Organic electroluminescent display device
    Patent number: 8130174
    Abstract: The present invention relates to an organic electroluminescent display device for preventing a voltage drop and a short between power supply elements by simultaneously forming a reflective film and a power supply element using a low resistance metal. The invention provides an organic electroluminescent display device comprising gate lines, data lines and a power supply element formed on an insulating substrate, a pixel region limited by the gate lines, the data lines and the power supply element, and pixels arranged on the pixel region and comprising of a reflective film and a pixel electrode, wherein the reflective film is formed on the same layer as the power supply element.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: March 6, 2012
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Hun-Jung Lee, Jae-Bon Koo, Sang-Il Park
  • Method of manufacturing thin film transistor and thin film transistor substrate
    Patent number: 8119463
    Abstract: Provided is a method of manufacturing a thin film transistor that can improve self-alignment. In this method, a semiconductor layer comprising a first doped region, a second doped region and a channel region is formed on a sacrificial layer on a first substrate. Next, the semiconductor layer is separated from the first substrate and is then coupled on a second substrate. Next, a dielectric layer is formed on the second substrate and the semiconductor layer, and a first photoresist layer is formed on the dielectric layer. Thereafter, the first photoresist layer is exposed to light from a rear surface of the second substrate by using the first doped region and the second doped region as a mask, to form a first mask pattern.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: February 21, 2012
    Assignee: Electronics And Telecommunications Research Institute
    Inventors: Jae Bon Koo, In-Kyu You, Seongdeok Ahn, Kyoung Ik Cho
  • RESISTIVE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    Publication number: 20110272661
    Abstract: Provided are a resistive memory device and a method of fabricating the same. The resistive memory device comprises an electron channel layer formed by means of a swelling process and an annealing process. Thus, conductive nanoparticles are uniformly dispersed in the electron channel layer to improve reliability of the resistive memory device. According to the method, an electron channel layer is formed by means of a printing process, a swelling process, and an annealing process. Thus, fabrication time is reduced.
    Type: Application
    Filed: October 29, 2010
    Publication date: November 10, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Suk YANG, In-Kyu You, Jae Bon Koo, Soon Won Jung, Kang Dae Kim, Yong-Young Noh
  • Flat panel display device with polycrystalline silicon thin film transistor
    Patent number: 8049220
    Abstract: The present invention relates to a flat panel display device comprising a polycrystalline silicon thin film transistor and provides a flat panel display device having improved characteristics by having a different number of grain boundaries included in polycrystalline silicon thin film formed in active channel regions of a driving circuit portion and active channel regions of pixel portion. This may be achieved by having a different number of grain boundaries included in the polycrystalline silicon thin film formed in active channel regions of a switching thin film transistor and a driving thin film transistor formed in the pixel portion, and by having a different number of grain boundaries included in polycrystalline silicon thin film formed in active channel regions of a thin film transistor for driving the pixel portion for each red, green and blue of the pixel portion.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: November 1, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Ji-Yong Park, Ul-Ho Lee, Jae-Bon Koo, Ki-Yong Lee, Hye-Hyang Park
  • Thin film transistor, flat panel display including the thin film transistor, and method for manufacturing the thin film transistor and the flat panel display
    Patent number: 8043887
    Abstract: A thin film transistor having a transformed region that provides the same result as patterning a semiconductor layer, a flat panel display having the thin film transistor and a method for manufacturing the thin film transistor and the flat panel display are disclosed. The thin film structure includes a gate electrode, a source and a drain electrode, each insulated from the gate electrode and an organic semiconductor layer coupled to the source electrode and the drain electrode. The organic semiconductor layer includes the transformed region having a crystal structure distinguished from crystal structures of regions around the channel region.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: October 25, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Nam-Choul Yang, Hye-Dong Kim, Min-Chul Suh, Jae-Bon Koo, Sang-Min Lee, Hun-Jung Lee
  • Organic inverter including surface-treated layer and method of manufacturing the same
    Patent number: 8039295
    Abstract: An organic inverter and a method of manufacturing the same are provided, which regulates threshold voltages depending on positions when an inverter circuit is manufactured on a substrate using an organic semiconductor. To form a depletion load transistor and an enhancement driver transistor at adjacent positions of the same substrate, the surface of the substrate is selectively treated by positions or selectively applied by self-assembly monolayer treatment. Thus, a D-inverter having a combination of a depletion mode and an enhancement mode is more easily realized than a conventional method using a transistor size effect. Also, the D-inverter can be realized even with the same W/L ratio, thereby increasing integration density. That is, the W/L ratio does not need to be increased to manufacture a depletion load transistor, thereby improving integration density.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: October 18, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon Koo, Kyung Soo Suh, Seong Hyun Kim
  • Flat panel display and method of manufacturing the same
    Patent number: 8030844
    Abstract: Provided is a flat panel display which has improved flexibility by using a metal substrate or a conductive substrate, wherein the substrate is protected from external exposure. Also provided is a method of manufacturing the flat panel display. The flat panel display includes a substrate, a first insulator with which one surface of the substrate is covered, a display unit disposed on the other surface of the substrate, and a second insulator with which edges of the substrate are covered to prevent exposure.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: October 4, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Hyun-Soo Shin, Jae-Bon Koo, Yeon-Gon Mo, Jae-Kyeong Jeong