Abstract: Provided is a complementary metal oxide semiconductor (CMOS) image sensor having a structure capable of increasing areas of photodiodes in unit pixels and expanding light receiving areas of the photodiodes. In the CMOS image sensor, transfer transistors may be formed on the photodiode, and reset transistors, source follower transistors, and selection transistors may be formed on a layer on which the transfer transistors are not formed. In such a CMOS image sensor, the areas of the photodiodes may be increased in unit pixels so that a size of the unit pixels may be reduced and sensitivity of the pixel may be improved.

Abstract: A detector includes a substrate; two first regions, each first region having a linear shape, and the two first regions being separated from each other on the substrate and arranged in parallel; and a pixel region provided between the two first regions and including a plurality of pixels, the pixel region including a plurality of second regions perpendicular to the two first regions, each of the two first regions including a peripheral circuit portion, each of the plurality of second regions including a driver line, and a width of each of the plurality of second regions being equal to or less than a width of a single pixel.

Abstract: A wafer-scale x-ray detector and a method of manufacturing the same are provided. The wafer-scale x-ray detector includes: a seamless silicon substrate electrically connected to a printed circuit substrate; a chip array having a plurality of pixel pads formed on a central region thereof and a plurality of pin pads formed at edges thereof on the seamless silicon substrate; a plurality of pixel electrodes formed to correspond to the pixel pads; vertical wirings and horizontal wirings formed to compensate a difference of regions expanded towards the pixel electrodes from the pixel pads between the chip array and the pixel electrodes; a redistribution layer having an insulating layer to separate the vertical wirings and the horizontal wirings; and a photoconductor layer and a common electrode which cover the pixel electrodes on the redistribution layer.

Abstract: An oxide thin film transistor and a method of manufacturing the oxide TFT are provided. The oxide thin film transistor (TFT) including: a gate; a channel formed to correspond to the gate, and a capping layer having a higher work function than the channel; a gate insulator disposed between the gate and the channel; and a source and drain respectively contacting either side of the capping layer and the channel and partially on a top surface of the capping layer.

Abstract: Transistors, methods of manufacturing a transistor, and electronic devices including a transistor are provided, the transistor includes a channel layer, a source and a drain respectively contacting opposing ends of the channel layer, a gate corresponding to the channel layer, a gate insulating layer between the channel layer and the gate, and a first passivation layer and a second passivation layer sequentially disposed on the gate insulating layer. The first passivation layer covers the source, the drain, the gate, the gate insulating layer and the channel layer. The second passivation layer includes fluorine (F).

Abstract: Transistors, electronic devices including a transistor and methods of manufacturing the same are provided, the transistor includes an oxide semiconductor layer (as a channel layer) having compositions that vary in one direction. The channel layer may be an oxide layer including a first element, a second element, and Zn, which are metal elements. The amount of at least one of the first element, the second element, and Zn may change in a deposition direction of the channel layer. The first element may be any one of hafnium (Hf), yttrium (Y), tantalum (Ta), zirconium (Zr), gallium (Ga), aluminum (Al) or combinations thereof. The second element may be indium (In). The channel layer may have a multi-layered structure including at least two layers with different compositions.

Abstract: According to example embodiments, an image sensor includes a charge sensing amplifier configured to amplify charges sensed by a sensing unit. The charge sensing amplifier includes an input terminal, an amplification terminal, an output terminal, a first capacitor connected between the input terminal and the amplification terminal, a first switch connected between the input terminal and the amplification terminal, a second capacitor connected between the amplification terminal and the output terminal, and a second switch connected between the output terminal and a reference voltage terminal.

Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device may be a complementary device including a p-type oxide TFT and an n-type oxide TFT. The semiconductor device may be a logic device such as an inverter, a NAND device, or a NOR device.

Abstract: Example embodiments provide a transistor and a method of manufacturing the same. The transistor may include a channel layer formed of an oxide semiconductor and a gate having a three-dimensional structure. A plurality of the transistors may be stacked in a perpendicular direction to a substrate. At least some of the plurality of transistors may be connected to each other.

Abstract: Provided are a transistor, a method of manufacturing the transistor, and an electronic device including the transistor. The transistor may include a gate insulator of which at least one surface is treated with plasma. The surface of the gate insulator may be an interface that contacts a channel layer. The interface may be treated with plasma by using a fluorine (F)-containing gas, and thus may include fluorine (F). The interface treated with plasma may suppress the characteristic variations of the transistor due to light.

Abstract: A pixel device having an improved energy resolution includes at least one photodiode and at least one voltage supply unit for applying a voltage to the photodiode. The pixel device includes a voltage storage unit and a voltage adjusting unit. In a precharge mode, the voltage storage unit stores a first anode voltage. In a sensing mode, the voltage adjusting unit adjusts a second anode voltage of the anode of the photodiode to be the same as the first anode voltage stored in the voltage storage unit.

Abstract: Provided is a channel layer for a thin film transistor, a thin film transistor and methods of forming the same. A channel layer for a thin film transistor may include IZO (indium zinc oxide) doped with a transition metal. A thin film transistor may include a gate electrode and the channel layer formed on a substrate, a gate insulating layer formed between the gate electrode and channel layer, and a source electrode and a drain electrode which contact ends of the channel layer.

Abstract: Provided is a zinc (Zn) oxide-based thin film transistor that may include a gate, a gate insulating layer on the gate, a channel including zinc oxide and may be on a portion of the gate insulating layer, and a source and drain contacting respective sides of the channel. The zinc (Zn) oxide-based thin film transistor may further include a recession in the channel between the source and the drain, and a zinc oxide-based etchant may be used to form the recession.

Abstract: An oxide thin film transistor and a method of manufacturing the oxide TFT are provided. The oxide thin film transistor (TFT) including: a gate; a channel formed to correspond to the gate, and a capping layer having a higher work function than the channel; a gate insulator disposed between the gate and the channel; and a source and drain respectively contacting either side of the capping layer and the channel and partially on a top surface of the capping layer.

Abstract: A security circuit using at least two finite state machine units for storing data to and reading data from a multiport memory in a pipelined manner and an intermediate memory, for facilitating transfer of data between the at least two finite state machines. The security circuit may be used to perform key setup and/or data ciphering faster. The security circuit may operate in any environment where the key is changed every frame, for example, a wireless LAN application and the security circuit may operate in conjunction with, or as part of, a MAC controller.

Abstract: An X-ray detector including a plurality of chips on a printed circuit board, each of the plurality of chips including a plurality of pixel pads on a center portion of the printed circuit board and a plurality of pin pads surrounding the plurality of pixel pads, a plurality of pixel electrodes on and corresponding to the plurality of chips, a redistribution layer electrically connecting the plurality of pixel electrodes and the plurality of pixel pads, a plurality of first electrode pads on a surface opposite to a surface of the plurality of chips including the plurality of pin pads, a wire electrically connecting the plurality of first electrode pads and the plurality of pin pads, a photoconductor on the plurality of pixel electrodes, and a common electrode on the photoconductor.

Abstract: An oxide thin film transistor and a method of manufacturing the oxide TFT are provided. The oxide thin film transistor (TFT) including: a gate; a channel formed to correspond to the gate, and a capping layer having a higher work function than the channel; a gate insulator disposed between the gate and the channel; and a source and drain respectively contacting either side of the capping layer and the channel and partially on a top surface of the capping layer.

Abstract: An X-ray detector includes a photoconductor, a first diffusion barrier film on a first surface of the photoconductor, at least one pixel electrode on the first diffusion barrier film, a signal transmitting unit to process an electrical signal output from the at least one pixel electrode, and a common electrode on a second surface of the photoconductor opposite to the first surface of the photoconductor.

Abstract: Channel layers and semiconductor devices including the channel layers are disclosed. A channel layer may include a multi-layered structure. Layers forming the channel layer may have different carrier mobilities and/or carrier densities. The channel layer may have a double layered structure including a first layer and a second layer which may be formed of different oxides. Characteristics of the transistor may vary according to materials used to form the channel layers and/or thicknesses thereof.

Abstract: A security circuit using at least two finite state machine units for storing data to and reading data from a multiport memory in a pipelined manner and an intermediate memory, for facilitating transfer of data between the at least two finite state machines. The security circuit may be used to perform key setup and/or data ciphering faster. The security circuit may operate in any environment where the key is changed every frame, for example, a wireless LAN application and the security circuit may operate in conjunction with, or as part of, a MAC controller.