Abstract: An optical joystick includes a first waveguide including a first reflecting surface located below a reading area for sensing the movement of an object and a first plano-convex lens portion condensing light reflected from the first reflecting surface, a second waveguide including a second plano-convex lens portion facing the first plano-convex lens portion and a second reflecting surface for reflecting light refracted at the second plano-convex lens portion, and an image sensor located below the second reflecting surface. The first reflecting surface and the first plano-convex lens portion form a single body, and the second plano-convex lens portion and the second reflecting surface also form a single body. The reflecting surface and the lens portion are in a single body, thereby notably reducing the thickness of the optical joystick. The first and second waveguides are facing each other, thereby improving refraction and condensing light.

Abstract: A wire bonding method for electrically interconnecting stacked semiconductor chips is disclosed. A substrate (e.g., printed circuit board or metal leadframe) is provided. Metal circuit patterns are provided outside of a chip mounting region of the substrate, and metal transfer patterns are provided proximate to the chip mounting region. Stacked semiconductor are disposed in the chip mounting region. Conductive wires are bonded between respective pads of one stacked chip and respective transfer patterns, and other conductive wires are bonded between respective pads of the other stacked chip and the same respective transfer patterns, thereby electrically connecting respective pads of the two chips through a pair of bond wires and an intermediate transfer pattern. The transfer patterns are separate from circuit patterns of the substrate. At least one of the first and second chips is electrically connected to some of the circuit patterns for external connection.

Abstract: A semiconductor package including plural semiconductor chips, and a wire bonding step for electrically interconnecting the semiconductor chips, are disclosed. In an exemplary method, a substrate is provided. Conductive circuit patterns are provided outside of a chip mounting region of the substrate, and conductive transfer patterns are provided proximate to the chip mounting region. Chips are placed in the chip mounting region. Conductive wires are bonded between input/output pads of a first chip and respective transfer patterns, and other conductive wires are bonded between input/output pads of a second chip and the same transfer patterns, thereby electrically connecting respective input/output pads of the two chips through a pair of bond wires and an intermediate transfer pattern.

Abstract: A wire bonding method for electrically interconnecting stacked semiconductor chips is disclosed. A substrate (e.g., printed circuit board or metal leadframe) is provided. Metal circuit patterns are provided outside of a chip mounting region of the substrate, and metal transfer patterns are provided proximate to the chip mounting region. Stacked semiconductor are disposed in the chip mounting region. Conductive wires are bonded between respective pads of one stacked chip and respective transfer patterns, and other conductive wires are bonded between respective pads of the other stacked chip and the same respective transfer patterns, thereby electrically connecting respective pads of the two chips through a pair of bond wires and an intermediate transfer pattern. The transfer patterns are separate from circuit patterns of the substrate. At least one of the first and second chips is electrically connected to some of the circuit patterns for external connection.

Abstract: A data transmission circuit includes a cyclic check (CRC) circuit which improves operation speed of the overall system by checking errors for safe data transmission and a data rate control circuit of which the rate control portion required for data interface includes two simple counter logics to control the data rate during data interface.