Patents by Inventor Jae Hur

Jae Hur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210009725
    Abstract: The present invention relates to super absorbent polymer and a method for preparing the same. According to the super absorbent polymer and preparation method for the same of the present invention, super absorbent polymer having improved rewet property and vortex time can be provided.
    Type: Application
    Filed: March 20, 2019
    Publication date: January 14, 2021
    Applicant: LG Chem, Ltd.
    Inventors: Dae Woo Nam, Ki Hyun Kim, Jun Kyu Kim, Young Jae Hur
  • Publication number: 20200328305
    Abstract: A two-terminal biristor in which a polysilicon emitter layer is inserted and a method of manufacturing the same are provided. The method of manufacturing the two-terminal biristor according to an embodiment of the present disclosure includes forming a first semiconductor layer of a first type on a substrate, forming a second semiconductor layer of a second type on the first semiconductor layer, forming a third semiconductor layer of the first type on the second semiconductor layer, and forming a polysilicon layer of the first type on the third semiconductor layer.
    Type: Application
    Filed: August 20, 2019
    Publication date: October 15, 2020
    Applicant: Korea Advanced Institute of Science and Technology
    Inventors: Yang-Kyu CHOI, Jun Woo SON, Jae HUR
  • Publication number: 20200308352
    Abstract: The present invention relates to superabsorbent polymer and a method for preparing the same. The present invention can provide a superabsorbent polymer in which a hydrophobic material having an HLB of 0-6, a hydrophilic polymer and a surface cross-linking agent are mixed into a base resin, thereby having improved rewetting characteristics and permeability through surface-modification of the base resin.
    Type: Application
    Filed: November 29, 2018
    Publication date: October 1, 2020
    Applicant: LG Chem, Ltd.
    Inventors: Bohee Park, Dae Woo Nam, Young Jae Hur, Yeon Woo Hong, Jiyoon Jeong
  • Patent number: 10770463
    Abstract: A semiconductor device and a method for fabricating the same are provided. A semiconductor device having a substrate can include a lower semiconductor layer, an upper semiconductor layer on the lower semiconductor layer, and a buried insulating layer between the lower semiconductor layer and the upper semiconductor layer. A first trench can be in the upper semiconductor layer having a lowest surface above the buried insulating layer and a first conductive pattern recessed in the first trench. A second trench can be in the lower semiconductor layer, the buried insulating layer, and the upper semiconductor layer. A second conductive pattern can be in the second trench and a first source/drain region can be in the upper semiconductor layer between the first conductive pattern and the second conductive pattern.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: September 8, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Hee Cho, Jun Soo Kim, Hui Jung Kim, Tae Yoon An, Satoru Yamada, Won Sok Lee, Nam Ho Jeon, Moon Young Jeong, Ki Jae Hur, Jae Ho Hong
  • Publication number: 20200161301
    Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.
    Type: Application
    Filed: December 24, 2019
    Publication date: May 21, 2020
    Inventors: Seung Uk Han, Taek Yong Kim, Satoru Yamada, Jun Hee Lim, Ki Jae Hur
  • Patent number: 10515962
    Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: December 24, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Uk Han, Taek Yong Kim, Satoru Yamada, Jun Hee Lim, Ki Jae Hur
  • Publication number: 20190296017
    Abstract: A semiconductor device and a method for fabricating the same are provided. A semiconductor device having a substrate can include a lower semiconductor layer, an upper semiconductor layer on the lower semiconductor layer, and a buried insulating layer between the lower semiconductor layer and the upper semiconductor layer. A first trench can be in the upper semiconductor layer having a lowest surface above the buried insulating layer and a first conductive pattern recessed in the first trench. A second trench can be in the lower semiconductor layer, the buried insulating layer, and the upper semiconductor layer. A second conductive pattern can be in the second trench and a first source/drain region can be in the upper semiconductor layer between the first conductive pattern and the second conductive pattern.
    Type: Application
    Filed: June 11, 2019
    Publication date: September 26, 2019
    Inventors: MIN HEE CHO, JUN SOO KIM, HUI JUNG KIM, TAE YOON AN, SATORU YAMADA, WON SOK LEE, NAM HO JEON, MOON YOUNG JEONG, KI JAE HUR, JAE HO HONG
  • Patent number: 10361205
    Abstract: A semiconductor device and a method for fabricating the same are provided. A semiconductor device having a substrate can include a lower semiconductor layer, an upper semiconductor layer on the lower semiconductor layer, and a buried insulating layer between the lower semiconductor layer and the upper semiconductor layer. A first trench can be in the upper semiconductor layer having a lowest surface above the buried insulating layer and a first conductive pattern recessed in the first trench. A second trench can be in the lower semiconductor layer, the buried insulating layer, and the upper semiconductor layer. A second conductive pattern can be in the second trench and a first source/drain region can be in the upper semiconductor layer between the first conductive pattern and the second conductive pattern.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: July 23, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Hee Cho, Jun Soo Kim, Hui Jung Kim, Tae Yoon An, Satoru Yamada, Won Sok Lee, Nam Ho Jeon, Moon Young Jeong, Ki Jae Hur, Jae Ho Hong
  • Publication number: 20190122098
    Abstract: A semiconductor channel based neuromorphic synapse device 1 including a trap-rich layer may be provided that includes: a first to a third semiconductor regions which are formed on a substrate and are sequentially arranged; a word line which is electrically connected to the first semiconductor region; a trap-rich layer which surrounds the second semiconductor region; and a bit line which is electrically connected to the third semiconductor region. When a pulse with positive (+) voltage is applied to the word line, a concentration of electrons emitted from the trap-rich layer to the second semiconductor region increases and a resistance of the second semiconductor region decreases. When a pulse with negative (?) voltage is applied to the word line, a concentration of electrons trapped in the trap-rich layer from the second semiconductor region increases and the resistance of the second semiconductor region increases.
    Type: Application
    Filed: October 24, 2018
    Publication date: April 25, 2019
    Applicant: Korea Advanced Institute of Science And Technology
    Inventors: Yang-Kyu CHOI, Jae HUR
  • Publication number: 20180301456
    Abstract: A semiconductor device and a method for fabricating the same are provided. A semiconductor device having a substrate can include a lower semiconductor layer, an upper semiconductor layer on the lower semiconductor layer, and a buried insulating layer between the lower semiconductor layer and the upper semiconductor layer. A first trench can be in the upper semiconductor layer having a lowest surface above the buried insulating layer and a first conductive pattern recessed in the first trench. A second trench can be in the lower semiconductor layer, the buried insulating layer, and the upper semiconductor layer. A second conductive pattern can be in the second trench and a first source/drain region can be in the upper semiconductor layer between the first conductive pattern and the second conductive pattern.
    Type: Application
    Filed: November 22, 2017
    Publication date: October 18, 2018
    Inventors: Min Hee Cho, Jun Soo Kim, Hui Jung Kim, Tae Yoon An, Satoru Yamada, Won Sok Lee, Nam Ho Jeon, Moon Young Jeong, Ki Jae Hur, Jae Ho Hong
  • Publication number: 20180294264
    Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.
    Type: Application
    Filed: November 30, 2017
    Publication date: October 11, 2018
    Inventors: Seung Uk Han, Taek Yong Kim, Satoru Yamada, Jun Hee Lim, Ki Jae Hur
  • Patent number: 9808786
    Abstract: A method of preparing a superabsorbent polymer is provided, which is able to improve physical properties and to recycle fine powder generated during the preparation process. Particularly, a method of preparing a superabsorbent polymer capable of improving physical properties by using a base resin including a water-containing gel polymer and a base-treated fine powder regranulated body, which are different from each other in degree of neutralization, during preparation of the superabsorbent polymer, is provided.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: November 7, 2017
    Assignee: LG Chem, Ltd.
    Inventors: Tae Young Won, Jin Hyun Bae, Jun Kyu Kim, Jong Hyuk Kwon, Young Jae Hur, Yun Kim
  • Patent number: 9539294
    Abstract: A composition includes an isolated bacteriophage Str-PAP-1 having the ability to kill Streptococcus parauberis cells specifically by infecting the same, and may be used to prevent and treat Streptococcus parauberis infections. The bacteriophage Str-PAP-1 that is an active ingredient of the composition has the ability to kill Streptococcus parauberis cells and characteristically has the genome represented by nucleotide sequence of SEQ. ID. NO: 1.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: January 10, 2017
    Assignee: INTRON BIOTECHNOLOGY, INC.
    Inventors: Seong Jun Yoon, Soo Youn Jun, An Sung Kwon, Young Jae Hur, Jung Mi Kim, Sang Hyeon Kang
  • Patent number: 9484203
    Abstract: In a method of manufacturing a semiconductor device, a gate structure is formed on a substrate. An ion implantation process is performed at an upper portion of the substrate exposed by the gate structure, so that an ion implantation region is formed to have an expanded volume. The ion implantation process uses ions that are identical to a material of the substrate.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: November 1, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun-Hee Lim, Ki-Jae Hur, Sung-Hwan Kim, Hae-In Jung, Soo-Jin Hong
  • Publication number: 20160235882
    Abstract: A superabsorbent polymer which has excellent initial absorbency and keeps water from flowing out under pressure even after the passage of a long period of time, in which the superabsorbent polymer keeps water from flowing out under pressure even after the passage of a long period of time to exhibit excellent absorbency, and also has an anti-caking property under conditions of high temperature and high humidity to improve storage stability, is provided. The superabsorbent polymer composition of the present invention may be used to improve physical properties of a variety of diapers, potty training pants, incontinence pads, etc., thereby being applied to production of personal absorbent hygiene products having high absorbency and excellent storage stability under conditions of high temperature and high humidity.
    Type: Application
    Filed: December 11, 2014
    Publication date: August 18, 2016
    Applicant: LG Chem, Ltd.
    Inventors: Wook Hwan Noh, Jun Kyu Kim, Jong Hyuk Kwon, Young Jae Hur, Ki Han Kim
  • Patent number: 9269810
    Abstract: A semiconductor device includes an active region defined on a substrate, a gate electrode disposed on the active region and covering two adjacent corners of the active region, a drain area formed in the active region adjacent to a first side of the gate electrode, and a source area formed in the active region adjacent to a second side of the gate electrode. The first and second sides of the gate electrode are spaced apart from each other, and the first side has a bent shape.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: February 23, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-Uk Han, Won-Kyung Park, Jun-Ho Park, Jun-Hee Lim, Ki-Jae Hur
  • Publication number: 20160045895
    Abstract: A method of preparing a superabsorbent polymer is provided, which is able to improve physical properties and to recycle fine powder generated during the preparation process. Particularly, a method of preparing a superabsorbent polymer capable of improving physical properties by using a base resin including a water-containing gel polymer and a base-treated fine powder regranulated body, which are different from each other in degree of neutralization, during preparation of the superabsorbent polymer, is provided.
    Type: Application
    Filed: September 12, 2014
    Publication date: February 18, 2016
    Applicant: LG CHEM, LTD.
    Inventors: Tae Young Won, Jin Hyun Bae, Jun Kyu Kim, Jong Hyuk Kwon, Young Jae Hur, Yun Kim
  • Patent number: 9240415
    Abstract: A semiconductor device is provided. A cell region is disposed in a substrate. The cell region includes a memory cell. A peripheral region is disposed in the substrate. The peripheral region is adjacent to the cell region. The peripheral region has a trench isolation, a first active region and a second active region. The trench isolation is interposed between the first active region and the second active region. A common gate pattern is disposed on the peripheral region. The common gate pattern extends in a first direction and partially overlaps the first active region, the second active region and the trench isolation. A buried conductive pattern is enclosed by the trench isolation. The buried conductive pattern extends in a second direction crossing the first direction. A top surface of the buried conductive pattern is lower than a bottom surface of the common gate pattern.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: January 19, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-Kyung Park, Ki-Jae Hur, Hyeong-Sun Hong, Se-Young Kim, Jun-Hee Lim
  • Publication number: 20150306159
    Abstract: A composition includes an isolated bacteriophage Str-PAP-1 having the ability to kill Streptococcus parauberis cells specifically by infecting the same, and may be used to prevent and treat Streptococcus parauberis infections. The bacteriophage Str-PAP-1 that is an active ingredient of the composition has the ability to kill Streptococcus parauberis cells and characteristically has the genome represented by nucleotide sequence of SEQ. ID. NO: 1.
    Type: Application
    Filed: April 28, 2015
    Publication date: October 29, 2015
    Inventors: Seong Jun Yoon, Soo Youn Jun, An Sung Kwon, Young Jae Hur, Jung Mi Kim, Sang Hyeon Kang
  • Patent number: 9141075
    Abstract: An image forming apparatus including: a first body including a developing unit to perform an image forming operation on a print medium, and a second body provided above the first body to pivot between a closed position and an open position in relation to the first body, the second body including a light emitting unit, wherein the light emitting unit is directly above the developing unit when the second body is in the closed position, and the developing unit is exposed to an outside of the image forming apparatus when the second body is in the closed position. A user can place the image forming apparatus on a desktop, which increases convenience in using the apparatus. Additionally, a specialized image forming apparatus can be provided to a user who mainly wants to print and copy in small quantities.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: September 22, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-ha Choi, Kiel-jae Hur, Young-min Kim