Patents by Inventor Jae Hyun Kang

Jae Hyun Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210332297
    Abstract: The invention relates to a polymerisable LC material comprising one or more di- or multireactive mesogenic compounds and one or more compounds of formula TRI, wherein the individual radicals have one of the meaning as given in the claims. Furthermore, the present invention relates also to a method for its preparation, a polymer film with improved thermal durability and UV stability obtainable from the corresponding polymerisable LC material, to a method of preparation of such polymer film, and to the use of such polymer film and said polymerisable LC material for optical, electro-optical, decorative or security devices.
    Type: Application
    Filed: August 9, 2019
    Publication date: October 28, 2021
    Applicant: Merck Patent GmbH
    Inventors: Yong-Hyun CHOI, Jae-Hyun KANG, Hyun-Jin YOON
  • Publication number: 20210277309
    Abstract: The present invention relates to a liquid-crystal medium which comprises one or more compounds each of formulae I and II in which the occurring groups and parameters have the meanings given in claim 1.
    Type: Application
    Filed: June 17, 2019
    Publication date: September 9, 2021
    Applicant: MERCK PATENT GMBH
    Inventors: Yong-Hyun CHOI, Jae-Hyun KANG, Hyun-Jin YOON
  • Publication number: 20210222068
    Abstract: The invention relates to a polymerizable LC material comprising one or more di- or multireactive mesogenic compounds and one or more compounds of formula S0, S1 or S2, wherein the individual radicals have one of the meaning as given in the claims. Furthermore, the present invention relates also to a method for its preparation, a polymer film with improved thermal durability and UV stability obtainable from a corresponding polymerizable LC material, to a method of preparation of such polymer film, and to the use of such polymer film and said polymerizable LC material for optical, electro-optical, decorative or security devices.
    Type: Application
    Filed: August 9, 2019
    Publication date: July 22, 2021
    Applicant: MERCK PATENT GMBH
    Inventors: Yong-Hyun CHOI, Jae-Hyun KANG, Hyun-Jin YOON
  • Patent number: 10867111
    Abstract: Methods of fabricating semiconductor devices are provided. A method of fabricating a semiconductor device includes selecting a target pattern from a target design layout. The target pattern includes: a target net; a target via that is electrically connected to the target net; and a crossing net that is electrically connected to the target via on a different level from the target net. The method includes analyzing a peripheral pattern that is adjacent the target net. Moreover, the method includes generating a redundant net, and a redundant via that electrically connects the redundant net and the crossing net. Related layout design systems are also provided.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: December 15, 2020
    Inventors: Jae Hwan Kim, Jae Hyun Kang, Byung Chul Shin, Ki Heung Park, Seung Weon Paek
  • Publication number: 20200159884
    Abstract: Methods of fabricating semiconductor devices are provided. A method of fabricating a semiconductor device includes selecting a target pattern from a target design layout. The target pattern includes: a target net; a target via that is electrically connected to the target net; and a crossing net that is electrically connected to the target via on a different level from the target net. The method includes analyzing a peripheral pattern that is adjacent the target net. Moreover, the method includes generating a redundant net, and a redundant via that electrically connects the redundant net and the crossing net. Related layout design systems are also provided.
    Type: Application
    Filed: June 12, 2019
    Publication date: May 21, 2020
    Inventors: Jae Hwan Kim, Jae Hyun Kang, Byung Chul Shin, Ki Heung Park, Seung Weon Paek
  • Publication number: 20190218459
    Abstract: The invention relates to a polymerisable LC material comprising at least one di- or multireactive mesogenic compound and at least one compound of formula CO-1, wherein R1, R2, L1, L2, L3, and n have one of the meanings as given in claim 1. Furthermore, the present invention relates also to a method for its preparation, a polymer film with improved thermal durability obtainable from the corresponding polymerisable LC material, to a method of preparation of such polymer film, and to the use of such polymer film and said polymerisable LC material for optical, electro-optical, decorative or security devices.
    Type: Application
    Filed: September 25, 2017
    Publication date: July 18, 2019
    Applicant: Merck Patent GmbH
    Inventors: Dong-Mee SONG, Yong-Hyun CHOI, Jae-Hyun KANG, Yong-Kuk YUN
  • Publication number: 20190177618
    Abstract: The present invention relates to a liquid crystalline medium which comprises one or more mesogenic compounds selected from the group of compounds of formulae I and II as set forth in claim 1, one or more chiral compounds and one or more polymerisable compounds, to a composite system obtained from or respectively obtainable from the medium by polymerising the one or more polymerisable compounds, and to liquid crystal displays comprising the composite system, in particular displays operating in reflective mode. The present invention further relates to a process for preparing the composite system comprising spatially selective polymerisation.
    Type: Application
    Filed: August 22, 2017
    Publication date: June 13, 2019
    Applicant: Merck Patent GmbH
    Inventors: Dong-Mee SONG, Yong-Hyun CHOI, Jae-Hyun KANG, Yong-Kuk YUN
  • Patent number: 9520892
    Abstract: Disclosed herein is a digital-to-analog converter (DAC) including a clock driver for controlling a clock signal to provide an inverse delay clock signal to allow at least selective adjustment of a return to zero (RZ) section; and a DAC core comprising at least two DAC units for receiving a digital input value, the clock signal and the inverse delay clock signal and providing an analog output value. According to the present invention, distortion of the output of the DAC may be attenuated and loss of the output may be minimized by utilizing the RZ technique.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: December 13, 2016
    Assignee: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Min-Jae Lee, Seong-Geon Kim, Jae-Hyun Kang
  • Publication number: 20160191033
    Abstract: Disclosed herein is a digital-to-analog converter (DAC) including a clock driver for controlling a clock signal to provide an inverse delay clock signal to allow at least selective adjustment of a return to zero (RZ) section; and a DAC core comprising at least two DAC units for receiving a digital input value, the clock signal and the inverse delay clock signal and providing an analog output value. According to the present invention, distortion of the output of the DAC may be attenuated and loss of the output may be minimized by utilizing the RZ technique.
    Type: Application
    Filed: December 28, 2015
    Publication date: June 30, 2016
    Inventors: Min-Jae Lee, Seong-Geon Kim, Jae-Hyun Kang
  • Patent number: 9001254
    Abstract: A digital photographing apparatus is provided that enlarges and displays one area of a subject to be photographed for a self-timer photographing standby time, as is a method of controlling the digital photographing apparatus. The method includes: receiving a self-timer photographing input signal; enlarging and displaying one area of a displayed input image for a self-timer photographing standby time; and capturing the displayed input image after the self-timer photographing standby time elapses. The area of the subject to be photographed is enlarged and displayed for the self-timer photographing standby time so that a photographing state of the subject to be photographed may be checked and a desired image may be captured.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: April 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-hyun Kang
  • Publication number: 20130176472
    Abstract: A digital photographing apparatus is provided that enlarges and displays one area of a subject to be photographed for a self-timer photographing standby time, as is a method of controlling the digital photographing apparatus. The method includes: receiving a self-timer photographing input signal; enlarging and displaying one area of a displayed input image for a self-timer photographing standby time; and capturing the displayed input image after the self-timer photographing standby time elapses. The area of the subject to be photographed is enlarged and displayed for the self-timer photographing standby time so that a photographing state of the subject to be photographed may be checked and a desired image may be captured.
    Type: Application
    Filed: September 4, 2012
    Publication date: July 11, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Jae-hyun Kang
  • Patent number: 8067311
    Abstract: A mask for forming a metal line and a via contact, and a method for fabricating a semiconductor device using the same, minimizes misalignment. The mask includes a first mask region having a dark tone for light shading, a second mask region having a half tone, being disposed within the first mask region to form the metal line, and a third mask region having a clear tone, being disposed within the second mask region to form the via contact.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: November 29, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Jae-Hyun Kang
  • Patent number: 7919796
    Abstract: Provided is an image sensor. The image sensor includes a semiconductor substrate, an interlayer dielectric, metal interconnections, a first electrode, a lower electrode, a second electrode, and a photodiode. The semiconductor substrate has at least one transistor thereon. The interlayer dielectric is on the semiconductor substrate. The metal interconnections pass through the interlayer dielectric. The first electrode is in the interlayer dielectric between the metal interconnections. The lower electrode is on the interlayer dielectric to connect to the metal interconnection. The second electrode is on the interlayer dielectric at a position corresponding to the first electrode, and a gap region is between the second electrode and the lower electrode. The photodiode is on the interlayer dielectric with the lower electrode and the second electrode.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: April 5, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventors: Ju Hyun Kim, Jae Hyun Kang
  • Publication number: 20100311241
    Abstract: A three-state mask, which is used during exposure of a lithography process and formed in a regular pattern, includes a first transmission region to transmit substantially all incident light, second transmission regions to transmit a portion of incident light, and shield regions to block transmission of light. Therefore, the three-state mask shortens two lithography processes into one lithography process, eliminates misalignment between a via hole and a trench, prevents lowering of a sheet resistance (Rs) due to misalignment, simplifies a dual damascene process, reduces the number of masks used in the dual damascene process, and thus contributes to reduction of manufacturing costs of the semiconductor device.
    Type: Application
    Filed: September 24, 2009
    Publication date: December 9, 2010
    Inventor: Jae-Hyun Kang
  • Patent number: 7781251
    Abstract: Embodiments relate to an image sensor and a method of fabricating the same. In embodiments, the image sensor may include a semiconductor substrate having a photo detector, and a micro-lens array including lenses for guiding light incident from an exterior toward the photo detector, wherein the micro-lens array may include a dry film resist material. The dry film resist may include a polymer having a glass transition temperature of approximately 100° C. or less, and a molecular weight of approximately 10,000 or less.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: August 24, 2010
    Assignee: Dongbu HiTek Co., Ltd
    Inventor: Jae Hyun Kang
  • Patent number: 7772131
    Abstract: In embodiments, when forming a metal line of the semiconductor device, a developer having an amine group may coated on the metal line layer such that the amine group remains on a surface of the metal line layer. Further, a method of fabricating a semiconductor device may include forming a metal line layer for interlayer connection of the semiconductor device, performing a first photo process by coating a first photoresist on the metal line layer, after performing the first photo process, removing the first photoresist for a rework, after removing the first photoresist, coating a developer having an amine group on the metal line layer, after coating the developer, coating a second photoresist on the metal line layer, and performing a photo process by employing the second photoresist.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: August 10, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Jae-Hyun Kang
  • Publication number: 20100166311
    Abstract: A digital image processing apparatus and a method of controlling the digital image processing apparatus are provided. The digital image processing apparatus, and associated method, may display on-screen display (OSD) regions which do not overlap a face zone display box after determining whether the face zone display box and the OSD regions overlap each other.
    Type: Application
    Filed: December 10, 2009
    Publication date: July 1, 2010
    Applicant: Samsung Digital Imaging Co., Ltd.
    Inventor: Jae-hyun Kang
  • Publication number: 20100055900
    Abstract: A mask for forming a metal line and a via contact, and a method for fabricating a semiconductor device using the same, minimizes misalignment. The mask includes a first mask region having a dark tone for light shading, a second mask region having a half tone, being disposed within the first mask region to form the metal line, and a third mask region having a clear tone, being disposed within the second mask region to form the via contact.
    Type: Application
    Filed: August 19, 2009
    Publication date: March 4, 2010
    Inventor: Jae-Hyun Kang
  • Patent number: 7673280
    Abstract: An optical proximity correction (OPC) processing method may include at least one of the following steps: Detecting coordinate values of individual piece patterns constituting a graphic design system (GDS). Merging to the form of a specific pattern, composed of outermost coordinate values, on the basis of the detected coordinate values. Shrinking the merged GDS pattern and forming a GDS pattern having a desired magnifying power. Performing an optical proximity correction (OPC) process on the GDS pattern having the desired magnifying power.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: March 2, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Jae-Hyun Kang
  • Patent number: 7625822
    Abstract: A method for manufacturing a semiconductor device deposits a plurality of bottom antireflective coating films to prevent a standing wave caused by a light source of a short wavelength in forming a fine pattern. The method includes forming a pattern formation layer on an entire surface of a wafer, forming two or more bottom antireflective coating films on the pattern formation layer, forming a photoresist film pattern on a predetermined region of the bottom antireflective coating films, etching the bottom antireflective coating films using the photoresist film pattern as a mask, forming sidewall spacers at sides of the photoresist film pattern, and etching the pattern formation layer using the sidewall spacers and the photoresist film pattern as masks.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: December 1, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Hyun Kang