Patents by Inventor Jae-Hyung Jang

Jae-Hyung Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10270182
    Abstract: Provided is a metamaterial-based polarization converter in which a reception antenna and a transmission antenna are formed by using a metamaterial, to thus emit an incident non-polarized or polarized electromagnetic wave in an angle-converted polarization direction. The metamaterial-based electromagnetic wave polarization converter includes: a reception antenna made of a metamaterial and allowing incident electromagnetic waves to resonate at a surface of the reception antenna to generate a surface current; a transmission antenna at a rear side of the reception antenna, and made of an angle-converted metamaterial to thus allow the electromagnetic waves transferred from the reception antenna to resonate to then be emitted in a polarization direction; and a connector made of a conductive material that connects the reception antenna and the transmission antenna, to thereby transfer a surface current generated from the reception antenna to the transmission antenna.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: April 23, 2019
    Assignee: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jae Hyung Jang, Jeong min Woo
  • Publication number: 20190043986
    Abstract: A semiconductor device includes a substrate, a first P-type well region and a second P-type well region disposed in the substrate, wherein the first P-type well region and the second P-type well region are spaced apart from each other, an N-type source region disposed in the substrate, wherein the N-type source region is disposed spaced apart from the second P-type well region, an N-type drain region disposed in the second P-type well region, an N-type LDD region disposed near the N-type drain region, and a gate insulating layer and a gate electrode on the substrate, wherein the gate electrode partially overlaps the second P-type well region.
    Type: Application
    Filed: March 28, 2018
    Publication date: February 7, 2019
    Applicant: Magnachip Semiconductor, Ltd.
    Inventors: Jae Hyung JANG, Jin Yeong SON, Hee Hwan JI
  • Publication number: 20190035783
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first transistor and a second transistor formed in the first region and second region, respectively, wherein the first transistor includes a thick gate insulating layer and a thin buffer insulating layer formed in the substrate, a first gate electrode formed on the thick gate insulating layer, a first spacer formed on the thin buffer insulating layer, and a source region and a drain region formed in the substrate.
    Type: Application
    Filed: September 25, 2018
    Publication date: January 31, 2019
    Applicant: Magnachip Semiconductor, Ltd.
    Inventors: Young Bae KIM, Kwang Il KIM, Jun Hyun KIM, In Sik JUNG, Jae Hyung JANG, Jin Yeong SON
  • Publication number: 20190027600
    Abstract: A semiconductor device including a first P-type well region and an asymmetric second P-type well region each formed in a semiconductor substrate; a gate insulating layer and a gate electrode formed on the substrate; a first N-type source/drain region and a second N-type source/drain region that are formed on respective sides of the gate electrode; and an asymmetric LDD region of N-type formed to extend from the second source/drain region, wherein the asymmetric second P-type well region encompasses the second N-type source/drain region and the asymmetric LDD region, and the first N-type source/drain region both the asymmetric second P-type well region and the substrate, and the asymmetric second P-type well region is formed encompassing the second N-type source/drain region and in contact with the first N-type source/drain region.
    Type: Application
    Filed: September 12, 2018
    Publication date: January 24, 2019
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventors: Jae Hyung Jang, Hee Hwan Ji, Jin Yeong Son
  • Publication number: 20180333437
    Abstract: A pharmaceutical composition including exogenous interleukin-10 (IL-10)-expressing mammalian neural stem cells or progenitor cells for preventing or treating central nervous system disease or injury and a treatment method using the same may be used with stability and efficacy in the treatment of central nervous system disease or injury.
    Type: Application
    Filed: May 18, 2018
    Publication date: November 22, 2018
    Applicant: Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Kook In Park, Jae-Hyung Jang, Kwangsoo Jung, Kyu Jin Hwang, Il Sun Kim, Mira Cho
  • Patent number: 10115720
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first transistor and a second transistor formed in the first region and second region, respectively, wherein the first transistor includes a thick gate insulating layer and a thin buffer insulating layer formed in the substrate, a first gate electrode formed on the thick gate insulating layer, a first spacer formed on the thin buffer insulating layer, and a source region and a drain region formed in the substrate.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: October 30, 2018
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Young Bae Kim, Kwang Il Kim, Jun Hyun Kim, In Sik Jung, Jae Hyung Jang, Jin Yeong Son
  • Patent number: 10103260
    Abstract: A semiconductor device including a first P-type well region and an asymmetric second P-type well region each formed in a semiconductor substrate; a gate insulating layer and a gate electrode formed on the substrate; a first N-type source/drain region and a second N-type source/drain region that are formed on respective sides of the gate electrode; and an asymmetric LDD region of N-type formed to extend from the second source/drain region, wherein the asymmetric second P-type well region encompasses the second N-type source/drain region and the asymmetric LDD region, and the first N-type source/drain region both the asymmetric second P-type well region and the substrate, and the asymmetric second P-type well region is formed encompassing the second N-type source/drain region and in contact with the first N-type source/drain region.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: October 16, 2018
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Jae Hyung Jang, Hee Hwan Ji, Jin Yeong Son
  • Publication number: 20180286981
    Abstract: A semiconductor device including a first P-type well region and an asymmetric second P-type well region each formed in a semiconductor substrate; a gate insulating layer and a gate electrode formed on the substrate; a first N-type source/drain region and a second N-type source/drain region that are formed on respective sides of the gate electrode; and an asymmetric LDD region of N-type formed to extend from the second source/drain region, wherein the asymmetric second P-type well region encompasses the second N-type source/drain region and the asymmetric LDD region, and the first N-type source/drain region both the asymmetric second P-type well region and the substrate, and the asymmetric second P-type well region is formed encompassing the second N-type source/drain region and in contact with the first N-type source/drain region
    Type: Application
    Filed: November 30, 2017
    Publication date: October 4, 2018
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventors: Jae Hyung JANG, Hee Hwan JI, Jin Yeong SON
  • Publication number: 20180241377
    Abstract: Disclosed are a metal-semiconductor-metal two-dimensional electron gas varactor (MSM-2DEG) and a method of manufacturing the same. There is provided an MSM-2DEG varactor having an asymmetric structure, which includes a first gate formed on a semiconductor layer, and a second gate spaced apart at a predetermined distance from the first gate and formed on the semiconductor layer, wherein the first gate and the second gate are different in shape and gate length.
    Type: Application
    Filed: November 30, 2017
    Publication date: August 23, 2018
    Inventors: Jae Hyung JANG, Ji Hyun HWANG
  • Patent number: 10038140
    Abstract: There is provided a non-volatile memory device comprising: a substrate; a lower electrode disposed on the substrate; a resistance layer disposed on the lower electrode; and an upper electrode disposed on the resistance layer, wherein the resistance layer include a stack of a graphene oxide film and an iron oxide film, wherein a resistance value of the resistance layer varies based on a voltage applied to the upper electrode.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: July 31, 2018
    Assignee: Gwangju Institute of Science and Technology
    Inventors: Jae Hyung Jang, Rani Anoop, Se I Oh
  • Publication number: 20180053872
    Abstract: There is provided a photoconductive semiconductor switch device comprising: a semiconductor substrate configured to generate electrons and holes using incident light thereto; at least one pair of conductive layers disposed on the semiconductor substrate, wherein one pair of the conductive layers consists of first and second conductive layers spaced apart from each other, wherein each of the first and second conductive layers contains abundant electrical carriers to have a low resistance; and first and second electrodes disposed on at least partially on the first and second conductive layers respectively. In this way, the application of the photoconductive semiconductor switch device may be widened.
    Type: Application
    Filed: April 29, 2015
    Publication date: February 22, 2018
    Inventor: Jae Hyung JANG
  • Publication number: 20170365781
    Abstract: There is provided a non-volatile memory device comprising: a substrate; a lower electrode disposed on the substrate; a resistance layer disposed on the lower electrode; and an upper electrode disposed on the resistance layer, wherein the resistance layer include a stack of a graphene oxide film and an iron oxide film, wherein a resistance value of the resistance layer varies based on a voltage applied to the upper electrode.
    Type: Application
    Filed: June 16, 2017
    Publication date: December 21, 2017
    Inventors: JAE HYUNG JANG, RANI ANOOP, SE I OH
  • Publication number: 20170301668
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first transistor and a second transistor formed in the first region and second region, respectively, wherein the first transistor includes a thick gate insulating layer and a thin buffer insulating layer formed in the substrate, a first gate electrode formed on the thick gate insulating layer, a first spacer formed on the thin buffer insulating layer, and a source region and a drain region formed in the substrate.
    Type: Application
    Filed: January 30, 2017
    Publication date: October 19, 2017
    Applicant: Magnachip Semiconductor, Ltd.
    Inventors: Young Bae KIM, Kwang Il KIM, Jun Hyun KIM, In Sik JUNG, Jae Hyung JANG, Jin Yeong SON
  • Patent number: 9774274
    Abstract: An active rectifier and a wireless power reception apparatus using the same are disclosed herein. The active rectifier includes first and fourth switches, second and third switches, and a synchronization control unit. The first and fourth switches are turned on while the voltage of an alternating current (AC) input is negative, and apply the current of the AC input to a rectifying capacitor. The second and third switches are turned on while a voltage of the AC input is positive, and apply the current of the AC input to the rectifying capacitor. The synchronization control unit compensates for the delay time of the comparator for detecting zero-crossing of the AC input so as to switch the first to fourth switches.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: September 26, 2017
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Kang Yoon Lee, Jae Hyung Jang, Hyung Gu Park, Joo Young Chun
  • Publication number: 20170201030
    Abstract: Provided is a metamaterial-based polarization converter in which a reception antenna and a transmission antenna are formed by using a metamaterial, to thus emit an incident non-polarized or polarized electromagnetic wave in an angle-converted polarization direction. The metamaterial-based electromagnetic wave polarization converter includes: a reception antenna made of a metamaterial and allowing incident electromagnetic waves to resonate at a surface of the reception antenna to generate a surface current; a transmission antenna at a rear side of the reception antenna, and made of an angle-converted metamaterial to thus allow the electromagnetic waves transferred from the reception antenna to resonate to then be emitted in a polarization direction; and a connector made of a conductive material that connects the reception antenna and the transmission antenna, to thereby transfer a surface current generated from the reception antenna to the transmission antenna.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 13, 2017
    Inventors: Jae Hyung JANG, Jeong min WOO
  • Patent number: 9680000
    Abstract: The present invention relates to a terahertz radiating device, which includes a high electron mobility transistor (HEMT); a source provide to the HEMT; a gate right to the HEMT; a drain provide to the HEMT; a first antenna connected with the drain; a drain bias for applying a direct current (DC) voltage to the drain; and a source-gate connector for connecting the source and the gate in a device unit. Thereby, commercially available terahertz waves may be radiated, and high output power may be obtained.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: June 13, 2017
    Assignee: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jae-Hyung Jang, Sung-Min Hong
  • Publication number: 20160163915
    Abstract: The present invention relates to a terahertz radiating device, which includes a high electron mobility transistor (HEMT); a source provide to the HEMT; a gate right to the HEMT; a drain provide to the HEMT; a first antenna connected with the drain; a drain bias for applying a direct current (DC) voltage to the drain; and a source-gate connector for connecting the source and the gate in a device unit. Thereby, commercially available terahertz waves may be radiated, and high output power may be obtained.
    Type: Application
    Filed: December 3, 2015
    Publication date: June 9, 2016
    Inventors: Jae-Hyung JANG, Sung-Min HONG
  • Patent number: 9299919
    Abstract: A Hall sensor with improved doping profile is disclosed. The Hall sensor includes a semiconductor substrate, a sensing region formed on the substrate, an isolation region formed on the sensing region, and a high concentration doping region formed on an upper portion of the sensing region.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: March 29, 2016
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Seong Woo Lee, Jae Hyung Jang, Hee Baeg An, Yu Shin Ryu
  • Patent number: 9185727
    Abstract: In a medium access control method of an access point for a wireless LAN, the access point is capable of full-duplex communication, and the medium access control method includes receiving a frame header of a first data frame from a first terminal, and transmitting a second data frame to a second terminal while the first data frame is received from the first terminal.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: November 10, 2015
    Assignee: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Hyuk Lim, Jae Hyung Jang, Wooyeol Choi, Jaeseon Hwang
  • Patent number: 9151711
    Abstract: An optoelectronic shutter, a method of operating the same, and an optical apparatus including the optoelectronic shutter are provided. The optoelectronic shutter includes a phototransistor which generates an output signal from incident input light and a light emitting diode serially connected to the phototransistor. The light emitting diode outputs output light according to the output signal, and the output signal is gain-modulated according to a modulation of a current gain of the phototransistor.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: October 6, 2015
    Assignees: SAMSUNG ELECTRONICS CO., LTD., GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Yong-chul Cho, Jae-hyung Jang, Yong-hwa Park, Chang-soo Park, Jong-In Song