Abstract: A double pattern method of forming a plurality of contact holes in a material layer formed on a substrate is disclosed. The method forms a parallel plurality of first hard mask patterns separated by a first pitch in a first direction on the material layer, a self-aligned parallel plurality of second hard mask patterns interleaved with the first hard mask patterns and separated from the first hard mask patterns by a buffer layer to form composite mask patterns, and a plurality of upper mask patterns in a second direction intersecting the first direction to mask selected portions of the buffer layer in conjunction with the composite mask patterns. The method then etches non-selected portions of the buffer layer using the composite hard mask patterns and the upper mask patterns as an etch mask to form a plurality of hard mask holes exposing selected portions of the material layer, and then etches the selected portions of the material layer to form the plurality of contact holes.

Abstract: A scanning device includes a display part, a flat bed on which a manuscript is loaded, a white reference sheet provided at one side of the flat bed, a scanning head to divide the white reference sheet into a plurality of lines and to obtain shading data corresponding to the plurality of lines by scanning the plurality of lines, a storage part in which the shading data for the plurality of lines is stored, and a controller to calculate a maximum value and a minimum value of the shading data by comparing the shading data of each pixel at a same position in the scanning head from the plurality of lines, and to control the display part to display an error message if a difference between the maximum value and the minimum value of the shading data is out of a reference range.

Abstract: System for selecting a colour shade comprising a very small number of colour display cards with mixed shades of two or more colours. The system comprises means for selecting one shade among mixed shades, means for presenting the selected mixed shade as well as means for specifying the selected mixed shade for making paint in the desired colour tone.

Abstract: The present invention relates to certain fused pyrazole derivatives of Formula (Ia), and pharmaceutically acceptable salts thereof, which exhibit useful pharmacological properties, for example, as agonists for the RUP25 receptor. Also provided by the present invention are pharmaceutical compositions containing compounds of the invention, and methods of using the compounds and compositions of the invention in the treatment of metabolic-related disorders, including dyslipidemia, atherosclerosis, coronary heart disease, insulin resistance, type 2 diabetes, Syndrome-X and the like.

Abstract: Methods are provided for forming a device, such as a semiconductor device. A field region and an active region of a substrate are defined in which the field region has an upper surface that extends further away from the substrate and is higher than an upper surface of the active region. A hard mask layer is formed with a substantially planar upper surface on the field region and the active region. The hard mask layer is partially etched to form a hard mask pattern that exposes at least a portion of the active region. The substrate is partially etched in the active region using the hard mask pattern as an etching mask to form a gate trench. A recessed gate electrode if formed on the substrate in the gate trench.

Abstract: System for selecting a colour shade comprising a very small number of colour display cards with mixed shades of two or more colours. The system comprises means for selecting one shade among mixed shades, means for presenting the selected mixed shade as well as means for specifying the selected mixed shade for making paint in the desired colour tone.

Abstract: The present invention relates to certain fused pyrazole derivatives of Formula (Ia), and pharmaceutically acceptable salts thereof, which exhibit useful pharmacological properties, for example, as agonists for the RUP25 receptor. Also provided by the present invention are pharmaceutical compositions containing compounds of the invention, and methods of using the compounds and compositions of the invention in the treatment of metabolic-related disorders, including dyslipidemia, atherosclerosis, coronary heart disease, insulin resistance, type 2 diabetes, Syndrome-X and the like.

Abstract: The present invention relates to certain tetrazole derivatives of Formula (I), and pharmaceutically acceptable salts thereof, which exhibit useful pharmacological properties, for example, as agonists for the RUP25 receptor. Also provided by the present invention are pharmaceutical compositions containing compounds of the invention, and methods of using the compounds and compositions of the invention in the treatment of metabolic-related disorders, including dyslipidemia, atherosclerosis, coronary heart disease, insulin resistance, type 2 diabetes, Syndrome-X and the like. In addition, the present invention also provides for the use of the compounds of the invention in combination with other active agents such as those belonging to the class of ?-glucosidase inhibitors, aldose reductase inhibitors, biguanides, HMG-CoA reductase inhibitors, squalene synthesis inhibitors, fibrates, LDL catabolism enhancers, angiotensin converting enzyme (ACE) inhibitors, insulin secretion enhancers and the like.

Abstract: In a thin layer structure and a method of forming the same, a first preliminary insulation pattern is formed on a substrate and includes a first opening exposing the substrate. One or more preliminary seed patterns including single crystalline silicon are formed in the first opening. A second insulation layer is formed on the first preliminary insulation pattern and the one or more preliminary seed patterns. A second insulation pattern, a first insulation pattern and one or more seed patterns are formed by etching the first and second insulation layers and the one or more preliminary seed patterns. The second insulation pattern includes a second opening having a flat bottom portion. A single crystalline silicon pattern is formed in the second opening, wherein a central thickness of the single crystalline silicon pattern is substantially identical to a peripheral thickness thereof, thereby reducing or preventing a thinning defect in a semiconductor device.

Abstract: In a MOS transistor and a method of manufacturing the same, a gate structure including a gate insulating layer and a gate electrode is formed on a semiconductor substrate. A first insulating layer is formed to cover the gate structure. A second insulating layer is formed on the substrate that is spaced apart from the first insulating layer. A lightly doped source/drain region is formed in the surface portions of the substrate between the second insulating layer and the gate structure. A source/drain extension layer are formed on the lightly doped source/drain region. A heavily doped source/drain region is formed on the second insulating layer so as to connect with the source/drain extension layer. The short channel effect is suppressed and the source/drain junction capacitance is reduced.

Abstract: The present invention relates to certain tetrazole derivatives of Formula (I), and pharmaceutically acceptable salts thereof, which exhibit useful pharmacological properties, for example, as agonists for the RUP25 receptor. Also provided by the present invention are pharmaceutical compositions containing compounds of the invention, and methods of using the compounds and compositions of the invention in the treatment of metabolic-related disorders, including dyslipidemia, atherosclerosis, coronary heart disease, insulin resistance, type 2 diabetes, Syndrome-X and the like. In addition, the present invention also provides for the use of the compounds of the invention in combination with other active agents such as those belonging to the class of ?-glucosidase inhibitors, aldose reductase inhibitors, biguanides, HMG-CoA reductase inhibitors, squalene synthesis inhibitors, fibrates, LDL catabolism enhancers, angiotensin converting enzyme (ACE) inhibitors, insulin secretion enhancers and the like.

Abstract: In a MOS transistor and a method of manufacturing the same, a gate structure including a gate insulating layer and a gate electrode is formed on a semiconductor substrate. A first insulating layer is formed to cover the gate structure. A second insulating layer is formed on the substrate that is spaced apart from the first insulating layer. A lightly doped source/drain region is formed in the surface portions of the substrate between the second insulating layer and the gate structure. A source/drain extension layer are formed on the lightly doped source/drain region. A heavily doped source/drain region is formed on the second insulating layer so as to connect with the source/drain extension layer. The short channel effect is suppressed and the source/drain junction capacitance is reduced.

Abstract: The present invention relates to certain fused pyrazole derivatives of Formula (Ia), and pharmaceutically acceptable salts thereof, which exhibit useful pharmacological properties, for example, as agonists for the RUP25 receptor. Also provided by the present invention are pharmaceutical compositions containing compounds of the invention, and methods of using the compounds and compositions of the invention in the treatment of metabolic-related disorders, including dyslipidemia, atherosclerosis, coronary heart disease, insulin resistance, type 2 diabetes, Syndrome-X and the like.

Abstract: The present invention relates to a color cathode ray tube and more specifically to a color cathode ray tube in which electron beam landing errors caused by terrestrial magnetism are corrected such that color purity is improved. The color cathode ray tube in accordance with the present invention comprises a panel having a phosphor screen formed on an inner surface thereof; a funnel joined to the panel; an electron gun generating electron beams; a frame mounted to the panel; a shadow mask mounted to the frame; and an inner shield mounted to the frame, wherein ISH/OAH is in a range of 1.8 to 3.0 wherein OAH is a height of the panel and ISH is a height of the inner shield.

Abstract: Methods are provided for forming a device, such as a semiconductor device. A field region and an active region of a substrate are defined in which the field region has an upper surface that extends further away from the substrate and is higher than an upper surface of the active region. A hard mask layer is formed with a substantially planar upper surface on the field region and the active region. The hard mask layer is partially etched to form a hard mask pattern that exposes at least a portion of the active region. The substrate is partially etched in the active region using the hard mask pattern as an etching mask to form a gate trench. A recessed gate electrode if formed on the substrate in the gate trench.

Abstract: Embodiments of the invention include dynamic random access memory (DRAM) devices that utilize field effect transistors with trench-based gate electrodes. In these devices, a semiconductor substrate is provided having an isolation trench therein. This isolation trench is formed in a first portion of the semiconductor substrate. An electrically insulating liner is provided on a bottom and sidewalls of the isolation trench. The isolation trench is also filled with field oxide region, which extends on the electrically insulating liner. A field effect transistor is also provided in the semiconductor substrate. This transistor includes a gate electrode trench in a second portion of the semiconductor substrate and a gate insulating layer that lines a bottom and sidewalls of the gate electrode trench. A gate electrode is provided in the gate electrode trench. The gate electrode contacts the electrically insulating liner in the isolation trench and the gate insulating layer.

Abstract: Methods of fabricating integrated circuit devices include forming a trench in a face of an integrated circuit substrate. The trench has a trench sidewall and a trench floor. The method further including forming a first insulating layer on the trench sidewall that exposes at least part of the trench floor and forming a conductive plug in the trench on the trench floor. The conductive plug is electrically connected to the substrate at the trench floor through the trench sidewall that exposes the at least part of the trench floor. The conductive plug also has a plug top opposite the trench floor that is recessed beneath the face of the substrate. The method further includes forming a second insulating layer on the plug top.

Abstract: In a multi type electrodeless lamp in accordance with the present invention including a bulb portion as a transparent material in which two filling spaces are formed therein; a stem portion formed at the exterior of the bulb portion so as to have a certain length; and gas-fills respectively injected into the filling spaces in order to generate plasma by electromagnetic energy, by mixing lights emitted from the gas-fills on a certain conditions, light having expected characteristics and color can be obtained. Accordingly, light efficiency can be improved, and lights having various characteristics and colors can be implemented.

Abstract: A method for forming a shallow well of a semiconductor device using low-energy ion implantation is described. A well region is formed to the depth of a trench isolation layer using a low-energy, high-dose ion implantation process. The method for forming a well using low-energy ion implantation can minimize well margin reduction caused by impurity spread and well margin reduction caused by shrinkage of a thick photoresist pattern.

Abstract: The present invention relates to a color cathode ray tube and more specifically to a color cathode ray tube in which electron beam landing errors caused by terrestrial magnetism are corrected such that color purity is improved.