Patents by Inventor Jae Sung Roh

Jae Sung Roh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100270333
    Abstract: A powder container capable of controlling the amount of discharged powder, which is provided with a rotatable powder supply unit capable of being rotated to discharge powder from the container to the outside, thus allowing a user to easily control the amount of discharged powder while viewing the powder discharged from the container with the eyes, is disclosed. The powder container includes a housing containing powder therein, a cap hinged to the housing and opening or closing the opening of the housing, a discharge plate provided in the housing and having a discharge hole for discharging powder, a rotatable powder supply unit provided in the housing and being rotated to supply powder from the housing to the discharge hole of the discharge plate, and a rotation guide unit for guiding the rotation of the powder supply unit.
    Type: Application
    Filed: December 3, 2009
    Publication date: October 28, 2010
    Applicant: SHINYOUNG CO., LTD
    Inventor: Jae-Sung ROH
  • Patent number: 7816202
    Abstract: A method for fabricating a capacitor includes providing a substrate having a capacitor region is employed, forming a first Ru1?xOx layer over the substrate, forming a Ru layer for a lower electrode over the first Ru1?xOx layer and deoxidizing the first Ru1?xOx layer, forming a dielectric layer over the Ru layer for a lower electrode, and forming a conductive layer for an upper electrode over the dielectric layer, wherein the first Ru1?xOx layer contains oxygen in an amount less than an oxygen amount of a RuO2 layer.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: October 19, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kwan-Woo Do, Jae-Sung Roh, Kee-Jeung Lee, Deok-Sin Kil, Young-Dae Kim, Jin-Hyock Kim, Kyung-Woong Park
  • Publication number: 20100240188
    Abstract: A method for fabricating a capacitor includes: forming a storage node contact plug over a substrate; forming an insulation layer having an opening exposing a surface of the storage node contact plug over the storage contact plug; forming a conductive layer for a storage node over the insulation layer and the exposed surface of the storage node contact plug through two steps performed at different temperatures; performing an isolation process to isolate parts of the conductive layer; and sequentially forming a dielectric layer and a plate electrode over the isolated conductive layer.
    Type: Application
    Filed: June 4, 2010
    Publication date: September 23, 2010
    Inventors: Jin-Hyock KIM, Seung-Jin Yeom, Ki-Seon Park, Han-Sang Song, Deok-Sin Kil, Jae-Sung Roh
  • Patent number: 7786521
    Abstract: A semiconductor device with a dielectric structure and a method for fabricating the same are provided. A capacitor in the semiconductor device includes: a bottom electrode formed on a substrate; a first dielectric layer made of titanium dioxide (TiO2) in rutile phase and formed on the bottom electrode; and an upper electrode formed on the first dielectric layer.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: August 31, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ki-Seon Park, Jae-Sung Roh
  • Patent number: 7781336
    Abstract: A semiconductor device includes a semiconductor substrate, an insulation pattern on the semiconductor substrate, and an etch stop layer on the insulating pattern, the insulation pattern and the etch stop layer defining a contact hole that exposes the substrate, a first plug filled in a portion of the contact hole, a diffusion barrier layer formed above the first plug and in a bottom portion and on sidewalls of a remaining portion of the contact hole, a second plug formed on the diffusion barrier layer and filled in the contact hole, and a storage node coupled to and formed on the second plug.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: August 24, 2010
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Jin-Hyock Kim, Jae-Sung Roh, Seung-Jin Yeom, Kee-Jeung Lee, Han-Sang Song, Deok-Sin Kil, Young-Dae Kim
  • Patent number: 7772132
    Abstract: A method for forming a zirconium oxide (ZrO2) layer on a substrate in a chamber includes controlling a temperature of the substrate; and repeating a unit cycle of an atomic layer deposition (ALD) method. The unit cycle includes supplying a zirconium (Zr) source into a chamber, parts of the Zr source being adsorbed into a surface of the substrate; purging non-adsorbed parts of the Zr source remaining inside the chamber; supplying a reaction gas for reacting with the adsorbed parts of the Zr source; and purging non-reacted parts of the reaction gas remaining inside the chamber and reaction byproducts, wherein the temperature of the substrate and a concentration of the reaction gas are controlled such that the ZrO2 layer is formed with a tetragonal structure.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: August 10, 2010
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Deok-Sin Kil, Han-Sang Song, Seung-Jin Yeom, Ki-Seon Park, Jae-Sung Roh, Jin-Hyock Kim
  • Patent number: 7754577
    Abstract: A method for fabricating a capacitor includes: forming a storage node contact plug over a substrate; forming an insulation layer having an opening exposing a surface of the storage node contact plug over the storage contact plug; forming a conductive layer for a storage node over the insulation layer and the exposed surface of the storage node contact plug through two steps performed at different temperatures; performing an isolation process to isolate parts of the conductive layer; and sequentially forming a dielectric layer and a plate electrode over the isolated conductive layer.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: July 13, 2010
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Jin-Hyock Kim, Seung-Jin Yeom, Ki-Seon Park, Han-Sang Song, Deok-Sin Kil, Jae-Sung Roh
  • Patent number: 7670903
    Abstract: A method for fabricating a cylindrical capacitor. The method includes forming an isolation structure including an interlayer on a substrate, the substrate having a plurality of contact plugs formed therein, forming a plurality of opening regions by etching the isolation structure, thereby exposing selected portions of the contact plugs, forming storage nodes on a surface of the opening regions, etching selected portions of the isolation structure to form a patterned interlayer that encompasses selected portions of the storage nodes, thereby supporting the storage nodes, removing remaining portions of the isolation structure, and removing the patterned interlayer to expose inner and outer walls of the storage nodes.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: March 2, 2010
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Ki-Seon Park, Jae-Sung Roh, Deok-Sin Kil, Han-Sang Song, Seung-Jin Yeom, Jin-Hyock Kim, Kee-Jeung Lee
  • Publication number: 20100012989
    Abstract: A semiconductor device, and a method of fabricating the semiconductor device, which is able to prevent a leaning phenomenon from occurring between the adjacent storage nodes. The method includes forming a plurality of multi-layered pillar type storage nodes each of which is buried in a plurality of mold layers, wherein the uppermost layers of the multi-layered pillar type storage nodes are fixed by a support layer, etching a portion of the support layer to form an opening, and supplying an etch solution through the opening to remove the multiple mold layers. A process of depositing and etching the mold layer by performing the process 2 or more times to form the multi-layered pillar type storage node. Thus, the desired capacitance is sufficiently secured and the leaning phenomenon is avoided between adjacent storage nodes.
    Type: Application
    Filed: December 30, 2008
    Publication date: January 21, 2010
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Kee-Jeung LEE, Jae-Sung ROH, Deok-Sin KIL, Young-Dae KIM, Jin-Hyock KIM, Kwan-Woo DO, Kyung-Woong PARK, Jeong-Yeop LEE
  • Publication number: 20100014212
    Abstract: A capacitor includes a lower electrode, a dielectric structure over the lower electrode, the dielectric structure including at least one crystallized zirconium oxide ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer, and an upper electrode formed over the dielectric structure. A method for fabricating a capacitor includes forming a lower electrode over a certain structure, forming a dielectric structure including at least one crystallized zirconium oxide (ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer over the lower electrode, and forming an upper electrode over the dielectric structure.
    Type: Application
    Filed: September 29, 2009
    Publication date: January 21, 2010
    Inventors: Deok-Sin Kil, Han-Sang Song, Seung-Jin Yeom, Ki-Seon Park, Jae-Sung Roh
  • Patent number: 7629221
    Abstract: Disclosed is a method for forming a capacitor of a semiconductor device. In such a method, a mold insulating layer is formed on an insulating interlayer provided with a storage node plug, and the mold insulating layer is etched to form a hole through which the storage node plug is exposed. Next, a metal storage electrode with an interposed WN layer is formed on a hole surface including the exposed storage node plug and the mold insulating layer is removed. Finally, a dielectric layer and a plate electrode are formed in order on the metal storage electrode.
    Type: Grant
    Filed: July 1, 2005
    Date of Patent: December 8, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ki Seon Park, Jae Sung Roh, Hyun Chul Sohn
  • Patent number: 7616426
    Abstract: A capacitor includes a lower electrode, a dielectric structure over the lower electrode, the dielectric structure including at least one crystallized zirconium oxide (ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer, and an upper electrode formed over the dielectric structure. A method for fabricating a capacitor includes forming a lower electrode over a certain structure, forming a dielectric structure including at least one crystallized zirconium oxide (ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer over the lower electrode, and forming an upper electrode over the dielectric structure.
    Type: Grant
    Filed: November 10, 2006
    Date of Patent: November 10, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Deok-Sin Kil, Han-Sang Song, Seung-Jin Yeom, Ki-Seon Park, Jae-Sung Roh
  • Publication number: 20090148625
    Abstract: A method for forming a thin film by using an atomic layer deposition (ALD) method and a method for fabricating a capacitor using the same includes: supplying a source gas, a reaction gas, and a purge gas, then discontinuing the supply of the reaction gas and the source gas, followed by supplying and then discontinuing the supply of the reaction gas, wherein supplying the source gas, the reaction gas, and the purge gas, then discontinuing the supply of the reaction gas and the source gas, followed by supplying and then discontinuing the supply of the reaction gas constitutes a unit cycle, and repeating the unit cycle until a thin film having a desired thickness is deposited.
    Type: Application
    Filed: February 4, 2009
    Publication date: June 11, 2009
    Inventors: Seung-Jin Yeom, Deok-Sin Kil, Kwon Hong, Jae-Sung Roh
  • Publication number: 20090134445
    Abstract: A semiconductor device with a dielectric structure and a method for fabricating the same are provided. A capacitor in the semiconductor device includes: a bottom electrode formed on a substrate; a first dielectric layer made of titanium dioxide (TiO2) in rutile phase and formed on the bottom electrode; and an upper electrode formed on the first dielectric layer.
    Type: Application
    Filed: January 26, 2009
    Publication date: May 28, 2009
    Inventors: Ki-Seon Park, Jae-Sung Roh
  • Patent number: 7531422
    Abstract: The present invention relates to a method for fabricating a capacitor in a semiconductor device through the use of hafnium-terbium oxide (Hf1-xTbxO) as a dielectric layer. The method includes the steps of: forming a lower electrode on a substrate; forming an amorphous hafnium-terbium oxide (Hf1-xTbxO) dielectric layer on the lower electrode; crystallizing the Hf1-xTbxO dielectric layer by performing a thermal process; and forming an upper electrode on the Hf1-xTbxO dielectric layer.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: May 12, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kee-Jeung Lee, Jae-Sung Roh
  • Patent number: 7501320
    Abstract: A semiconductor device with a dielectric structure and a method for fabricating the same are provided. A capacitor in the semiconductor device includes: a bottom electrode formed on a substrate; a first dielectric layer made of titanium dioxide (TiO2) in rutile phase and formed on the bottom electrode; and an upper electrode formed on the first dielectric layer.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: March 10, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ki-Seon Park, Jae-Sung Roh
  • Publication number: 20090061587
    Abstract: A method for fabricating a capacitor includes providing a substrate having a capacitor region is employed, forming a first Ru1-xOx layer over the substrate, forming a Ru layer for a lower electrode over the first Ru1-xOx layer and deoxidizing the first Ru1-xOx layer, forming a dielectric layer over the Ru layer for a lower electrode, and forming a conductive layer for an upper electrode over the dielectric layer, wherein the first Ru1-xOx layer contains oxygen in an amount less than an oxygen amount of a RuO2 layer.
    Type: Application
    Filed: June 27, 2008
    Publication date: March 5, 2009
    Applicant: Hynix Semiconductor Inc.
    Inventors: Kwan-Woo Do, Jae-Sung Roh, Kee-Jeung Lee, Deok-Sin Kil, Young-Dae Kim, Jin-Hyock Kim, Kyung-Woong Park
  • Publication number: 20090004808
    Abstract: A method for fabricating a capacitor includes forming a sacrificial layer having a plurality of trenches on an upper portion of a substrate, forming storage nodes in the trenches, exposing upper portions of the storage nodes by removing a portion of the sacrificial layer, forming supporters to support the exposed upper portions of the storage nodes, removing the sacrificial layer under the supporters, and removing the supporters.
    Type: Application
    Filed: December 27, 2007
    Publication date: January 1, 2009
    Applicant: Hynix Semiconductor Inc.
    Inventors: Kee-Jeung LEE, Jae-Sung Roh, Seung-Jin Yeom, Han-Sang Song, Deok-Sin Kil, Young-Dae Kim, Jin-Hyock Kim, Kwan-Woo Do
  • Publication number: 20080272490
    Abstract: A semiconductor device includes a semiconductor substrate, an insulation pattern on the semiconductor substrate, and an etch stop layer on the insulating pattern, the insulation pattern and the etch stop layer defining a contact hole that exposes the substrate, a first plug filled in a portion of the contact hole, a diffusion barrier layer formed above the first plug and in a bottom portion and on sidewalls of a remaining portion of the contact hole, a second plug formed on the diffusion barrier layer and filled in the contact hole, and a storage node coupled to and formed on the second plug.
    Type: Application
    Filed: October 30, 2007
    Publication date: November 6, 2008
    Inventors: Jin-Hyock Kim, Jae-Sung Roh, Seung-Jin Yeom, Kee-Jeung Lee, Han-Sang Song, Deok-Sin Kil, Young-Dae Kim
  • Patent number: 7416936
    Abstract: The present invention relates to a capacitor having a hafnium oxide and aluminum oxide alloyed dielectric layer and a method for fabricating the same. The capacitor includes: a lower electrode; a dielectric layer formed on the lower electrode; and an upper electrode formed on the dielectric layer, wherein a portion of the dielectric layer contacting one of the lower electrode and the upper electrode is formed by alloying hafnium oxide and aluminum oxide together.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: August 26, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Deok-Sin Kil, Jae-Sung Roh, Hyun-Chul Sohn