Patents by Inventor Jae Sung Roh

Jae Sung Roh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080157278
    Abstract: A capacitor includes a lower electrode, a dielectric layer, an upper electrode, and a ruthenium oxide layer. At least one of the lower electrode and the upper electrode is formed of a ruthenium layer, and the ruthenium oxide layer is disposed next to the ruthenium layer.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 3, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Kwan-Woo Do, Jae-Sung Roh, Kee-Jeung Lee, Deok-Sin Kil, Young-Dae Kim, Jin-Hyock Kim, Kyung-Woong Park, Han-Sang Song
  • Patent number: 7361544
    Abstract: A method for fabricating a capacitor in a semiconductor device is provided. The method includes forming an insulation layer over a substrate; flushing a metal source onto the insulation layer to change a characteristic of a surface of the insulation layer to improve adherence of a metal-based material to the surface of the insulation layer; forming a storage node comprising the metal-based material over the flushed insulation layer; and sequentially forming a dielectric layer and a plate electrode over the metal-based storage node.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: April 22, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Seung-Jin Yeom, Deok-Sin Kil, Jin-Hyock Kim, Ki-Seon Park, Han-Sang Song, Jae-Sung Roh
  • Publication number: 20080081431
    Abstract: A method for fabricating a capacitor includes forming an isolation layer over a substrate. The isolation layer forms a plurality of open regions. Storage nodes are formed on surfaces of the open regions. An upper portion of the isolation layer is etched to expose upper outer walls of the storage nodes. A sacrificial layer is formed over the isolation layer to enclose the upper outer walls of the storage nodes. The isolation layer and the sacrificial layer are then removed.
    Type: Application
    Filed: June 29, 2007
    Publication date: April 3, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Jae-Sung ROH, Kee-Jeung Lee, Han-Sang Song, Seung-Jin Yeom, Deok-Sin Kil, Young-Dae Kim, Jin-Hyock Kim
  • Patent number: 7332755
    Abstract: A memory device includes an active area protruding from a semiconductor substrate. A recess is formed in the active area. A field oxide layer is formed on the semiconductor substrate. A gate electrode extends across the active area while being overlapped with the recess. A gate insulation layer is interposed between the gate electrode and the active area. Source and drain areas are formed in the active area. The transistor structure above defines a recessed transistor structure if it is sectioned along a source-drain line and defines a Fin transistor structure if it is sectioned along a gate line. The transistor structure ensures sufficient data retention time and improves the current drivability while lowering the back bias dependency of a threshold voltage.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: February 19, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Se Aug Jang, Yong Soo Kim, Jae Geun Oh, Jae Sung Roh, Hyun Chun Sohn
  • Publication number: 20080003741
    Abstract: A method for fabricating a cylindrical capacitor. The method includes forming an isolation structure including an interlayer on a substrate, the substrate having a plurality of contact plugs formed therein, forming a plurality of opening regions by etching the isolation structure, thereby exposing selected portions of the contact plugs, forming storage nodes on a surface of the opening regions, etching selected portions of the isolation structure to form a patterned interlayer that encompasses selected portions of the storage nodes, thereby supporting the storage nodes, removing remaining portions of the isolation structure, and removing the patterned interlayer to expose inner and outer walls of the storage nodes.
    Type: Application
    Filed: December 28, 2006
    Publication date: January 3, 2008
    Inventors: Ki-Seon Park, Jae-Sung Roh, Deok-Sin Kil, Han-Sang Song, Seung-Jin Yeom, Jin-Hyock Kim, Kee-Jeung Lee
  • Publication number: 20070264808
    Abstract: A plasma doping method includes providing a doping source over a substrate. The doping source includes dopants that are to be injected into the substrate. At least two different bias voltages are applied to inject the dopants from the doping source to the substrate.
    Type: Application
    Filed: May 3, 2007
    Publication date: November 15, 2007
    Applicant: Hynix Semiconductor Inc.
    Inventors: Jae-Sung ROH, Jae-Geun Oh, Hyun-Chul Sohn, Sun-Hwan Hwang, Jin-Gu Lee
  • Publication number: 20070232081
    Abstract: A method for forming a zirconium oxide (ZrO2) layer on a substrate in a chamber includes controlling a temperature of the substrate; and repeating a unit cycle of an atomic layer deposition (ALD) method. The unit cycle includes supplying a zirconium (Zr) source into a chamber, parts of the Zr source being adsorbed into a surface of the substrate; purging non-adsorbed parts of the Zr source remaining inside the chamber; supplying a reaction gas for reacting with the adsorbed parts of the Zr source; and purging non-reacted parts of the reaction gas remaining inside the chamber and reaction byproducts, wherein the temperature of the substrate and a concentration of the reaction gas are controlled such that the ZrO2 layer is formed with a tetragonal structure.
    Type: Application
    Filed: June 29, 2006
    Publication date: October 4, 2007
    Inventors: Deok-Sin Kil, Han-Sang Song, Seung-Jin Yeom, Ki-Seon Park, Jae-Sung Roh, Jin-Hyock Kim
  • Publication number: 20070223176
    Abstract: The present invention relates to a capacitor having a hafnium oxide and aluminum oxide alloyed dielectric layer and a method for fabricating the same. The capacitor includes: a lower electrode; a dielectric layer formed on the lower electrode; and an upper electrode formed on the dielectric layer, wherein a portion of the dielectric layer contacting one of the lower electrode and the upper electrode is formed by alloying hafnium oxide and aluminum oxide together.
    Type: Application
    Filed: May 24, 2007
    Publication date: September 27, 2007
    Inventors: Deok-Sin Kil, Jae-Sung Roh, Hyun-Chul Sohn
  • Patent number: 7259059
    Abstract: Disclosed is a method for forming a capacitor of a semiconductor device, which can improve a leakage current characteristic in applying HfxAlyOz as a dielectric film. In such a method, HfxAlyOz thin films are deposited on a storage electrode to form an HfxAlyOz dielectric film and a plate electrode is formed on the dielectric film. The HfxAlyOz dielectric film consists of laminated HfxAlyOz thin films which are different in compositions of Hf and Al such that the lower HfxAlyOz thin film adjoining the storage electrode has a larger composition ratio of Al than that of Hf and the upper HfxAlyOz thin film has a larger composition ratio of Hf than that of Al, and the upper HfxAlyOz thin film is subjected to heat treatment under an oxygen atmosphere after its deposition.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: August 21, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Deok Sin Kil, Ki Seon Park, Jae Sung Roh, Hyun Chul Sohn
  • Publication number: 20070148897
    Abstract: A method for fabricating a capacitor in a semiconductor device is provided. The method includes forming an insulation layer over a substrate; flushing a metal source onto the insulation layer to change a characteristic of a surface of the insulation layer to improve adherence of a metal-based material to the surface of the insulation layer; forming a storage node comprising the metal-based material over the flushed insulation layer; and sequentially forming a dielectric layer and a plate electrode over the metal-based storage node.
    Type: Application
    Filed: June 8, 2006
    Publication date: June 28, 2007
    Inventors: Seung-Jin Yeom, Deok-Sin Kil, Jin-Hyock Kim, Ki-Seon Park, Han-Sang Song, Jae-Sung Roh
  • Patent number: 7229888
    Abstract: The present invention relates to a capacitor having a hafnium oxide and aluminum oxide alloyed dielectric layer and a method for fabricating the same. The capacitor includes: a lower electrode; a dielectric layer formed on the lower electrode; and an upper electrode formed on the dielectric layer, wherein a portion of the dielectric layer contacting one of the lower electrode and the upper electrode is formed by alloying hafnium oxide and aluminum oxide together.
    Type: Grant
    Filed: April 7, 2004
    Date of Patent: June 12, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Deok-Sin Kil, Jae-Sung Roh, Hyun-Chul Sohn
  • Publication number: 20070117309
    Abstract: The present invention relates to a method for fabricating a capacitor in a semiconductor device through the use of hafnium-terbium oxide (Hf1-xTbxO) as a dielectric layer. The method includes the steps of: forming a lower electrode on a substrate; forming an amorphous hafnium-terbium oxide (Hf1-xTbxO) dielectric layer on the lower electrode; crystallizing the Hf1-xTbxO dielectric layer by performing a thermal process; and forming an upper electrode on the Hf1-xTbxO dielectric layer.
    Type: Application
    Filed: January 11, 2007
    Publication date: May 24, 2007
    Inventors: Kee-Jeung Lee, Jae-Sung Roh
  • Publication number: 20070102742
    Abstract: A capacitor includes a lower electrode, a dielectric structure over the lower electrode, the dielectric structure including at least one crystallized zirconium oxide (ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer, and an upper electrode formed over the dielectric structure. A method for fabricating a capacitor includes forming a lower electrode over a certain structure, forming a dielectric structure including at least one crystallized zirconium oxide (ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer over the lower electrode, and forming an upper electrode over the dielectric structure.
    Type: Application
    Filed: November 10, 2006
    Publication date: May 10, 2007
    Inventors: Deok-Sin Kil, Han-Sang Song, Seung-Jin Yeom, Ki-Seon Park, Jae-Sung Roh
  • Publication number: 20070099375
    Abstract: A method for fabricating a capacitor includes: forming a storage node contact plug over a substrate; forming an insulation layer having an opening exposing a surface of the storage node contact plug over the storage contact plug; forming a conductive layer for a storage node over the insulation layer and the exposed surface of the storage node contact plug through two steps performed at different temperatures; performing an isolation process to isolate parts of the conductive layer; and sequentially forming a dielectric layer and a plate electrode over the isolated conductive layer.
    Type: Application
    Filed: June 14, 2006
    Publication date: May 3, 2007
    Inventors: Jin-Hyock Kim, Seung-Jin Yeom, Ki-Seon Park, Han-Sang Song, Deok-Sin Kil, Jae-Sung Roh
  • Publication number: 20070048929
    Abstract: A semiconductor device with a dielectric structure and a method for fabricating the same are provided. A capacitor in the semiconductor device includes: a bottom electrode formed on a substrate; a first dielectric layer made of titanium dioxide (TiO2) in rutile phase and formed on the bottom electrode; and an upper electrode formed on the first dielectric layer.
    Type: Application
    Filed: November 23, 2005
    Publication date: March 1, 2007
    Inventors: Ki-Seon Park, Jae-Sung Roh
  • Publication number: 20060183301
    Abstract: A method for forming a thin film by using an atomic layer deposition (ALD) method and a method for fabricating a capacitor using the same includes: supplying a source gas, a reaction gas, and a purge gas, then discontinuing the supply of the reaction gas and the source gas, followed by supplying and then discontinuing the supply of the reaction gas, wherein supplying the source gas, the reaction gas, and the purge gas, then discontinuing the supply of the reaction gas and the source gas, followed by supplying and then discontinuing the supply of the reaction gas constitutes a unit cycle, and repeating the unit cycle until a thin film having a desired thickness is deposited.
    Type: Application
    Filed: December 30, 2005
    Publication date: August 17, 2006
    Inventors: Seung-Jin Yeom, Deok-Sin Kil, Kwon Hong, Jae-Sung Roh
  • Patent number: 7074668
    Abstract: In a method for forming a capacitor for use in a semiconductor device, a nitride film for stopping etching, a first mold oxide film, an insulating film, deposited on a substrate are etched to expose the respective storage node contacts and thereby to form a plurality of contact holes arrayed in a zigzag pattern for storage electrodes. A sacrificial oxide film is deposited by burying the contact holes for storage electrodes in a thickness such that an outer portion of the storage electrodes having a relatively short interval is completely buried while an outer portion the storage electrodes having a relatively long interval is not completely buried. The sacrificial oxide film and the insulation film are etched back to form a support network enclosing the respective storage electrodes and interconnected to each other.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: July 11, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ki Seon Park, Jae Sung Roh
  • Publication number: 20060134854
    Abstract: In a method for forming a capacitor for use in a semiconductor device, a nitride film for stopping etching, a first mold oxide film, an insulating film, deposited on a substrate are etched to expose the respective storage node contacts and thereby to form a plurality of contact holes arrayed in a zigzag pattern for storage electrodes. A sacrificial oxide film is deposited by burying the contact holes for storage electrodes in a thickness such that an outer portion of the storage electrodes having a relatively short interval is completely buried while an outer portion the storage electrodes having a relatively long interval is not completely buried. The sacrificial oxide film and the insulation film are etched back to form a support network enclosing the respective storage electrodes and interconnected to each other.
    Type: Application
    Filed: February 28, 2005
    Publication date: June 22, 2006
    Inventors: Ki Seon Park, Jae Sung Roh
  • Publication number: 20060094199
    Abstract: Disclosed is a method for forming a capacitor of a semiconductor device, which can improve a leakage current characteristic in applying HfxAlyOz as a dielectric film. In such a method, HfxAlyOz thin films are deposited on a storage electrode to form an HfxAlyOz dielectric film and a plate electrode is formed on the dielectric film. The HfxAlyOz dielectric film consists of laminated HfxAlyOz thin films which are different in compositions of Hf and Al such that the lower HfxAlyOz thin film adjoining the storage electrode has a larger composition ratio of Al than that of Hf and the upper HfxAlyOz thin film has a larger composition ratio of Hf than that of Al, and the upper HfxAlyOz thin film is subjected to heat treatment under an oxygen atmosphere after its deposition.
    Type: Application
    Filed: May 5, 2005
    Publication date: May 4, 2006
    Inventors: Deok Sin Kil, Ki Seon Park, Jae Sung Roh, Hyun Chul Sohn
  • Publication number: 20050287737
    Abstract: Disclosed is a method for forming a storage node electrode of a capacitor, capable of preventing wet chemicals from penetrating into an oxide layer. The method includes the steps of preparing a semiconductor substrate, forming a first oxide layer on the semiconductor substrate, forming conductive plugs for filling the first contact holes, sequentially forming an etch stop layer and a second oxide layer on the first oxide layer, forming a first TiN layer on the second oxide layer, performing a plasma treatment process with respect to the first TiN layer, forming a second TiN layer on the amorphous layer, forming a third oxide layer on the second TiN layer, performing an etch-back process with respect to a resultant structure until the second oxide layer is exposed, thereby forming the storage node electrode, and removing remaining second and third oxide layers.
    Type: Application
    Filed: November 30, 2004
    Publication date: December 29, 2005
    Inventors: Ki Seon Park, Jae Sung Roh