Abstract: A seat ventilation device for vehicles which is configured to perform both an air cleaning function and a seat ventilation function, and is operated to perform one selected function. The seat ventilation device includes a base duct mounted in a seat and having an indoor outlet configured to discharge air to an interior of a vehicle, a blower assembled with the base duct, configured to intake air in the interior of the vehicle and selectively connected to the indoor outlet, a cover duct mounted on the base duct and having a seat outlet selectively connected to the blower so as to discharge air to the seat, an air cleaning module mounted on the blower so as to filter the air taken in through the blower, and an opening and closing door located in the cover duct and configured to open selectively either the seat outlet or the indoor outlet.

Abstract: A three-dimensional semiconductor device includes a backside metal layer, a lower channel pattern and an upper channel pattern sequentially provided on the backside metal layer, a gate electrode crossing the lower and upper channel patterns in a first direction, and including a first gate electrode and a second gate electrode adjacent to each other in the first direction, a separation insulating pattern between the first and second gate electrodes, and a conductive plate extending in the separation insulating pattern in each of a second direction intersecting the first direction and a third direction perpendicular to the first direction, wherein the conductive plate includes a first conductive plate and a second conductive plate adjacent to each other in the first direction in the separation insulating pattern.

Abstract: An image sensing device includes an upper substrate configured to include a pixel region and a first peripheral region located outside the pixel region, a lower substrate configured to include a logic region and a second peripheral region located outside the logic region, the logic region configured to generate an image based on the electrical signals from the unit pixels, light reception elements disposed over the upper substrate and configured to transmit the incident light to the pixel region, an insulation layer disposed between the upper substrate and the lower substrate, a light reception alignment mark disposed in the first peripheral region and configured to assist positioning of the light reception elements, and an alignment pattern disposed between the first peripheral region and the second peripheral region and in the insulation layer. The alignment pattern is configured to absorb light used to measure the light reception alignment mark.

Abstract: A lighting device includes a substrate having a plurality of flat portions and a non-flat portion disposed between the flat portions, a plurality of light emitting sources disposed on the substrate, a fluorescent substrate layer covering one or more light emitting sources and converting a wavelength of a light from the light emitting source, and a connection line disposed on the substrate and electrically connecting the light emitting sources adjacent to each other between the adjacent light emitting sources. The substrate has a first end and a second end are arranged at different distance from a central axis.

Abstract: A semiconductor device includes a lower interlayer insulating layer, an insulating pattern extending in a first horizontal direction, a first plurality of lower nanosheets and a second plurality of lower nanosheets, a first plurality of middle nanosheets and a second plurality of middle nanosheets, a first plurality of upper nanosheets and a second plurality of upper nanosheets. The semiconductor device includes a first stack separation layer, a second stack separation layer, a first gate electrode, a second gate electrode, a first middle source/drain region, a second middle source/drain region, and a middle source/drain contact. The middle source/drain contact is electrically connected to the first and second middle source/drain regions and penetrates the lower interlayer insulating layer and the insulating pattern in a vertical direction. An upper surface of the middle source/drain contact is formed lower than a bottom surface of a lowermost nanosheet of the first plurality of upper nanosheets.

Abstract: A method for producing a vinyl chloride-based copolymer by copolymerizing a polymerizable monomer with a vinyl chloride-based polymer, wherein the method is capable of producing a vinyl chloride-based copolymer with high heat resistance by optimizing the ratio between the repeating units in the chain of polyvinyl chloride and a reducing agent, monomer, catalyst, and ligand.

Abstract: A light emitting device filament includes a substrate, a plurality of light emitting diodes, two electrode pads, and a plurality of connection lines. The substrate includes a first surface and a second surface opposite to the first surface. The substrate extending in a first direction and having a width in a second direction. The plurality of light emitting diodes is disposed on the first surface of the substrate. The two electrode pads are disposed on the substrate. The plurality of connection lines electrically connects the plurality of light emitting diodes and the two electrode pads. The plurality of connection lines includes a first connection line and a second connection line. The first connection line, the second connection line, or both are formed in a direction inclined or curved with respect to the first direction or the second direction.

Abstract: A power management integrated circuit includes an internal output transistor connected to an external voltage input line, to which an external voltage is supplied, and outputting an internal output voltage, a self-overvoltage protection circuit detecting whether the external voltage exceeds a breakdown condition for the internal output transistor and providing a gate voltage to a gate terminal of the internal output transistor and a clamp circuit outputting, as the internal output voltage, a first clamp voltage having a uniform level in a first overvoltage clamp mode and a second clamp voltage, which is leveled down from the external voltage, in a second overvoltage clamp mode. When the internal output transistor is turned off, the clamp circuit outputs the internal output voltage. The external voltage in the second overvoltage clamp mode may be greater than the external voltage in the first overvoltage clamp mode.

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.

Abstract: A display device includes a first display panel, a second display panel disposed adjacent to the first display panel, a first touch array disposed on the first display panel, a second touch array disposed on the second display panel, a first touch driver that applies a first touch driving signal to the first touch array in response to a frame synchronization signal, a second touch driver that applies a second touch driving signal to the second touch array in response to the frame synchronization signal, and a common line commonly connected to the first and second touch drivers to transmit the frame synchronization signal, and pulses included in the first touch driving signal and pulses included in the second touch driving signal have phases opposite to each other.

Abstract: The medical image analysis assistance system according to the embodiment of the present invention includes a lesion reading unit that estimates a presence of lesion from a plurality of medical images by reading medical image information including the plurality of medical images captured of a patient's body, and detects a position and information of the estimated lesion, and a readout information generation unit that generates readout information displaying markings related to the lesion on a scout image including at least one of the medical images in which the lesion is present and the medical images generated based on the plurality of medical images to represent the lesion, wherein the markings are displayed on the scout image corresponding to the position of the lesion and are displayed in different diagrams according to a type of the lesion, a medical image analysis support system.

Abstract: A semiconductor device incudes: a plurality of lower channel patterns apart from each other; a plurality of upper channel patterns spaced apart from each other on the plurality of lower channel patterns; a gate structure surrounding the plurality of lower channel patterns and the plurality of upper channel patterns; a lower source/drain trench positioned on at least one side of the plurality of lower channel patterns; an upper source/drain trench positioned on at least one side of the plurality of upper channel patterns; a lower source/drain pattern positioned within the lower source/drain trench; and an upper source/drain pattern including first upper source/drain layers positioned on opposite sidewalls of the upper source/drain trench, and a second upper source/drain layer positioned between the first upper source/drain layers, in which the first upper source/drain layer does not cover at least a portion of the bottom surface of the upper source/drain trench.

Abstract: A light emitting module including a circuit board, a plurality of unit pixels arranged on the circuit board, a molding member covering the unit pixels, and an anti-glare layer disposed on the molding member, in which the molding member includes a first molding layer at least partially covering each of the unit pixels, and a second molding layer covering the first molding layer.

Abstract: A method for registering a fingerprint of a user through an electronic device, comprising: sensing a fingerprint input into a fingerprint recognition area formed on a display module of the electronic device to capture at least one image of the fingerprint input; determining characteristics of the fingerprint input based on the at least one image of the fingerprint input when the fingerprint input is a rolled fingerprint; and storing the at least one image of the fingerprint input and the characteristics of the fingerprint input as personalized information of the user.

Abstract: An integrated circuit (IC) device includes a first region and a second region adjacent to each other along a first direction on a substrate, fin patterns in each of the first and second regions extending along a second direction perpendicular to the first direction; gate electrodes extending along the first direction and intersecting the fin patterns; and an isolation region between the first and second regions, a bottom of the isolation region having a non-uniform height relative to a bottom of the substrate.

Abstract: A method for registering a fingerprint of a user through an electronic device, comprising: sensing a fingerprint input into a fingerprint recognition area formed on a display module of the electronic device to capture at least one image of the fingerprint input; determining characteristics of the fingerprint input based on the at least one image of the fingerprint input when the fingerprint input is a rolled fingerprint; and storing the at least one image of the fingerprint input and the characteristics of the fingerprint input as personalized information of the user.

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.

Abstract: A method of determining a counterfeit fingerprint by a system for determining a counterfeit fingerprint that includes an internal light source and an external light source, comprising: extracting a first fingerprint area of a first fingerprint image obtained from a light signal of the internal light source when a target object's fingerprint comes in contact with a fingerprint contact surface of the system for determining a counterfeit fingerprint; extracting a second fingerprint area of a second fingerprint image obtained from a light signal of the external light source based on the first fingerprint area; and inputting the first fingerprint area and the second fingerprint area into a pre-trained neural network of the system for determining a counterfeit fingerprint to output a result of determining whether the fingerprint is counterfeit.

Abstract: A semiconductor device includes: an active pattern extending in a first direction on a substrate; a first lower source/drain pattern and a second lower source/drain pattern provided on the active pattern and spaced apart from each other in the first direction; a first upper source/drain pattern provided on the first lower source/drain pattern; a second upper source/drain pattern provided on the second lower source/drain pattern; and a gate electrode crossing the active pattern and extending in a second direction intersecting the first direction. The gate electrode includes an overlapping portion overlapping the active pattern in a third direction perpendicular to the first direction and the second direction. A length of the overlapping portion in the second direction is less than a length of the first lower source/drain pattern in the second direction.

Abstract: Provided is a three-dimensional semiconductor device and its fabrication method. The semiconductor device includes a first active region on a substrate and including a plurality of lower channel patterns and a plurality of lower source/drain patterns that are alternately arranged along a first direction, a second active region on the first active region and including a plurality of upper channel patterns and a plurality of upper source/drain patterns that are alternately arranged along the first direction, a first gate electrode on a first lower channel pattern of the lower channel patterns and on a first upper channel pattern of the upper channel patterns, and a second gate electrode on a second lower channel pattern of the lower channel patterns and on a second upper channel pattern of the upper channel patterns. The second gate electrode may include lower and upper gate electrodes with an isolation pattern interposed therebetween.