Patents by Inventor Jai-kwang Shin

Jai-kwang Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9147738
    Abstract: According to example embodiments, a high electron mobility transistor includes: a channel layer including a first semiconductor material; a channel supply layer on the channel layer and configured to generate a 2-dimensional electron gas (2DEG) in the channel layer, the channel supply layer including a second semiconductor material; source and drain electrodes spaced apart from each other on the channel layer, and an upper surface of the channel supply layer defining a gate electrode receiving part; a first gate electrode; and at least one second gate electrode spaced apart from the first gate electrode and in the gate electrode receiving part. The first gate electrode may be in the gate electrode receiving part and between the source electrode and the drain electrode. The at least one second gate electrode may be between the source electrode and the first gate electrode.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: September 29, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Young-hwan Park, Ki-yeol Park, Jai-kwang Shin, Jae-joon Oh, Jong-bong Ha, Sun-kyu Hwang
  • Patent number: 9129835
    Abstract: A semiconductor device includes a drift layer including a trench formed on a semiconductor substrate. A well in the drift layer overlaps an edge of the trench, and at least one gate electrode is formed at this overlapping edge region. The drift layer and semiconductor may be doped with a first type of impurity and the well may be doped with a second type of impurity. Through this arrangement, an improved distribution of carriers may be formed in the drift layer.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: September 8, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woong-je Sung, Chang-yong Um, Jai-kwang Shin
  • Patent number: 9123740
    Abstract: According to example embodiments, a high electron mobility transistor (HEMT) includes a channel supply layer and a channel layer. The channel layer may include an effective channel region and a high resistivity region. The effective channel region may be between the high resistivity region and the channel supply layer. The high resistivity region may be a region into which impurities are ion-implanted. According to example embodiments, a method of forming a HEMT includes forming a device unit, including a channel layer and a channel supply layer, on a first substrate; adhering a second substrate to the device unit; removing the first substrate; and forming a high resistivity region by ion-implanting impurities into at least a portion of the channel layer.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: September 1, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyuk-soon Choi, Jong-seob Kim, Jai-kwang Shin, Chang-yong Um, Jae-joon Oh, Jong-bong Ha, Ki-ha Hong, In-jun Hwang
  • Patent number: 9117890
    Abstract: According to example embodiments, a HEMT includes a channel supply layer on a channel layer, a p-type semiconductor structure on the channel supply layer, a gate electrode on the p-type semiconductor structure, and source and drain electrodes spaced apart from two sides of the gate electrode respectively. The channel supply layer may have a higher energy bandgap than the channel layer. The p-type semiconductor structure may have an energy bandgap that is different than the channel supply layer. The p-type semiconductor structure may include a hole injection layer (HIL) on the channel supply layer and be configured to inject holes into at least one of the channel layer and the channel supply in an on state. The p-type semiconductor structure may include a depletion forming layer on part of the HIL. The depletion forming layer may have a dopant concentration that is different than the dopant concentration of the HIL.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: August 25, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-seob Kim, Kyoung-yeon Kim, Joon-yong Kim, Jai-kwang Shin, Jae-joon Oh, Hyuk-soon Choi, Jong-bong Ha, Sun-kyu Hwang, In-jun Hwang
  • Patent number: 9118795
    Abstract: Image sensors and methods of operating the same. An image sensor includes a pixel array including a plurality of pixels. Each of the plurality of pixels includes a photo sensor, the voltage-current characteristics of which vary according to energy of incident light, and that generates a sense current determined by the energy of the incident light; a reset unit that is activated to generate a reference current, according to a reset signal for resetting at least one of the plurality of pixels; and a conversion unit that converts the sense current and the reference current into a sense voltage and a reference voltage, respectively.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: August 25, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho-jung Kim, U-in Chung, Jai-kwang Shin, Sun-il Kim, I-hun Song, Chang-jung Kim, Sang-hun Jeon
  • Publication number: 20150221745
    Abstract: High electron mobility transistors (HEMTs) including a substrate and a HEMT stack on the substrate, the HEMT stack including a compound semiconductor layer that includes a 2-dimensional electron gas (2DEG), an upper compound semiconductor layer that has a polarization index higher than a polarization index of the compound semiconductor layer, and a source electrode, a drain electrode, and a gate that are disposed on the upper compound semiconductor layer. The substrate may be a nitride substrate that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of a silicon substrate. The substrate may include an insulating layer that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of the silicon substrate, a metal layer that is deposited on the insulating layer, and a plate that is attached to the metal layer.
    Type: Application
    Filed: April 14, 2015
    Publication date: August 6, 2015
    Inventors: In-jun HWANG, Hyuk-soon Choi, Jae-joon Oh, Jong-bong Ha, Jong-seob Kim, Ki-ha Hong, Jai-kwang Shin
  • Publication number: 20150221746
    Abstract: The methods may include forming a first material layer on a substrate, increasing electric resistance of the first material layer, and forming a source pattern and a drain pattern, which are spaced apart from each other, on the first material layer, a band gap of the source and drain patterns greater than a band gap of a first material layer.
    Type: Application
    Filed: April 15, 2015
    Publication date: August 6, 2015
    Inventors: Hyuk-soon CHOI, Jung-hee LEE, Jai-kwang SHIN, Jae-joon OH, Jong-bong HA, Jong-seob KIM, In-jun HWANG, Ki-ha HONG, Ki-sik IM, Ki-won KIM, Dong-seok KIM
  • Patent number: 9088151
    Abstract: A power module including a power device and a periphery circuit configured to suppress a leakage current in the power device. The periphery circuit includes a leakage current detection circuit configured to detect a leakage current from the power device and control operation of the power device based on a result of the detection. The leakage current detection circuit including an input terminal connected to the power device, a plurality of NMOS transistors, a plurality of PMOS transistors connected to the plurality of NMOS transistors, and a comparator.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: July 21, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-jung Kim, Jai-kwang Shin, U-in Chung, Hyun-sik Choi
  • Patent number: 9087704
    Abstract: According to example embodiments, a semiconductor device may include a high electron mobility transistor (HEMT) on a first region of a substrate, and a diode on a second region of the substrate. The HEMT may be electrically connected to the diode. The HEMT and the diode may be formed on an upper surface of the substrate such as to be spaced apart from each other in a horizontal direction. The HEMT may include a semiconductor layer. The diode may be formed on another portion of the substrate on which the semiconductor layer is not formed. The HEMT and the diode may be cascode-connected to each other.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: July 21, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo-chul Jeon, Young-hwan Park, Ki-yeol Park, Jai-kwang Shin, Jae-joo Oh, Jong-bong Ha
  • Patent number: 9082693
    Abstract: A nitride semiconductor based power converting device includes a nitride semiconductor based power transistor, and at least one nitride semiconductor based passive device. The passive device and the power transistor respectively include a channel layer including a first nitride semiconductor material, and a channel supply layer on the channel layer including a second nitride semiconductor material to induce a 2-dimensional electron gas (2DEG) at the channel layer. The passive device may be a resistor, an inductor, or a capacitor.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: July 14, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Baik-woo Lee, Jai-kwang Shin, Jae-joon Oh
  • Patent number: 9053964
    Abstract: Example embodiments relate to semiconductor devices and/or methods of manufacturing the same. According to example embodiments, a semiconductor device may include a first heterojunction field effect transistor (HFET) on a first surface of a substrate, and a second HFET. A second surface of the substrate may be on the second HFET. The second HFET may have different properties (characteristics) than the first HFET. One of the first and second HFETs may be of an n type, while the other thereof may be of a p type. The first and second HFETs may be high-electron-mobility transistors (HEMTs). One of the first and second HFETs may have normally-on properties, while the other thereof may have normally-off properties.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: June 9, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo-chul Jeon, Woong-je Sung, Jai-kwang Shin, Jae-joon Oh
  • Patent number: 9048210
    Abstract: A transistor includes a device portion and a collector layer. The device portion is in a first side of a semiconductor substrate, and includes a gate and an emitter. The collector layer is on a second side of the semiconductor substrate, which is opposite to the first side. The collector layer is an impurity-doped epitaxial layer and has a doping profile with a non-normal distribution.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: June 2, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyung-su Jeong, Jai-kwang Shin, Nam-young Lee, Ji-hoon Lee, Min-kwon Cho, Yong-cheol Choi, Hyuk-soon Choi
  • Publication number: 20150123139
    Abstract: Provided are a high electron mobility transistor and/or a method of manufacturing the same. The high electron mobility transistor includes a channel layer, a channel supply layer formed on the channel layer to generate a two-dimensional electron gas (2DEG), a depletion forming layer formed on the channel supply layer, a gate electrode formed on the depletion forming layer, and a barrier layer formed between the depletion forming layer and the gate electrode. Holes may be prevented from being injected into the depletion forming layer from the gate electrode, thereby reducing a gate forward current.
    Type: Application
    Filed: April 22, 2014
    Publication date: May 7, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-seob KIM, In-jun HWANG, Jai-kwang SHIN, Jae-joon OH, Soo-gine CHONG, Sunk-yu HWANG
  • Patent number: 8975568
    Abstract: Image sensors and methods of operating the same. An image sensor includes a pixel array including a plurality of pixels. Each of the plurality of pixels includes a photo sensor, the voltage-current characteristics of which vary according to energy of incident light, and that generates a sense current determined by the energy of the incident light; a reset unit that is activated to generate a reference current, according to a reset signal for resetting at least one of the plurality of pixels; and a conversion unit that converts the sense current and the reference current into a sense voltage and a reference voltage, respectively.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: March 10, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-jung Kim, U-in Chung, Jai-kwang Shin, Sun-il Kim, I-hun Song, Chang-jung Kim, Sang-hun Jeon
  • Patent number: 8963580
    Abstract: A logic device may include a first functional block, the first functional block including, a first storage block, a second storage block, and a first function controller. In a first operation time period, the first function controller may be configured to receive a first configuration selection signal and a first configuration command signal that instructs a first function be configured, select the first storage block as a configured storage block in the first operation time period based on the first configuration selection signal, and configure the first function in the first storage block based on the first configuration command signal.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: February 24, 2015
    Assignees: Samsung Electronics Co., Ltd., University of Seoul Industry Cooperation Foundation
    Inventors: Hyun-sik Choi, Ho-jung Kim, Ki-chul Kim, Jai-kwang Shin, Joong-ho Choi, Hyung-su Jeong
  • Publication number: 20150048421
    Abstract: Provided are high electron mobility transistors (HEMTs), methods of manufacturing the HEMTs, and electronic devices including the HEMTs. An HEMT may include an impurity containing layer, a partial region of which is selectively activated. The activated region of the impurity containing layer may be used as a depletion forming element. Non-activated regions may be disposed at opposite side of the activated region in the impurity containing layer. A hydrogen content of the activated region may be lower than the hydrogen content of the non-activated region. In another example embodiment, an HEMT may include a depletion forming element that includes a plurality of regions, and properties (e.g., doping concentrations) of the plurality of regions may be changed in a horizontal direction.
    Type: Application
    Filed: May 20, 2014
    Publication date: February 19, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-hwan PARK, Jai-kwang SHIN, Ki-yeol PARK, Jae-joon OH, Woo-chul JEON, Hyo-ji CHOI
  • Publication number: 20150008485
    Abstract: A High electron mobility transistor (HEMT) includes a source electrode, a gate electrode, a drain electrode, a channel forming layer in which a two-dimensional electron gas (2DEG) channel is induced, and a channel supplying layer for inducing the 2DEG channel in the channel forming layer. The source electrode and the drain electrode are located on the channel supplying layer. A channel increase layer is between the channel supplying layer and the source and drain electrodes. A thickness of the channel supplying layer is less than about 15 nm.
    Type: Application
    Filed: September 26, 2014
    Publication date: January 8, 2015
    Inventors: In-jun HWANG, Jai-kwang SHIN, Jae-joon OH, Jong-seob KIM, Hyuk-soon CHOI, Ki-ha HONG
  • Patent number: 8921890
    Abstract: According to example embodiments, a substrate structure may include a GaN-based third material layer, a GaN-based second material layer, a GaN-based first material layer, and a buffer layer on a non-GaN-based substrate. The GaN-based first material layer may be doped with a first conductive type impurity. The GaN-based second material layer may be doped with a second conductive type impurity at a density that is less than a density of the first conductive type impurity in the first GaN-based material layer. The GaN-based third material layer may be doped with a first conductive type impurity at a density that is less than the density of the first conductive type impurity of the GaN-based first material layer. After a second substrate is attached onto the substrate structure, the non-GaN-based substrate may be removed and a GaN-based vertical type semiconductor device may be fabricated on the second substrate.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: December 30, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyuk-soon Choi, Jong-seob Kim, Jai-kwang Shin, Chang-yong Um, Jae-joon Oh, Jong-bong Ha, In-jun Hwang, Ki-ha Hong
  • Patent number: 8907377
    Abstract: A higher electron mobility transistor (HEMT) and a method of manufacturing the same are disclosed. According to example embodiments, the HEMT may include a channel supply layer on a channel layer, a source electrode and a drain electrode that are on at least one of the channel layer and the channel supply layer, a gate electrode between the source electrode and the drain electrode, and a source pad and a drain pad. The source pad and a drain pad electrically contact the source electrode and the drain electrode, respectively. At least a portion of at least one of the source pad and the drain pad extends into a corresponding one of the source electrode and drain electrode that the at least one of the source pad and the drain pad is in electrical contact therewith.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: December 9, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Ki-yeol Park, Young-hwan Park, Jai-kwang Shin, Jae-joon Oh, Hyuk-soon Choi, Jong-bong Ha
  • Patent number: 8890212
    Abstract: According to example embodiments, a normally-off high electron mobility transistor (HEMT) includes: a channel layer having a first nitride semiconductor, a channel supply layer on the channel layer, a source electrode and a drain electrode at sides of the channel supply layer, a depletion-forming layer on the channel supply layer, a gate insulating layer on the depletion-forming layer, and a gate electrode on the gate insulation layer. The channel supply layer includes a second nitride semiconductor and is configured to induce a two-dimensional electron gas (2DEG) in the channel layer. The depletion-forming layer is configured has at least two thicknesses and is configured to form a depletion region in at least a partial region of the 2DEG. The gate electrode contacts the depletion-forming layer.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: November 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Young-hwan Park, Jae-joon Oh, Kyoung-yeon Kim, Joon-yong Kim, Ki-yeol Park, Jai-kwang Shin, Sun-kyu Hwang