Patents by Inventor Jaikwang Kim

Jaikwang Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10203541
    Abstract: A display substrate, a method for manufacturing the display substrate, and a display device are provided. The display substrate includes a display area and a non-display area surrounding the display area. The non-display area of the display substrate includes a shading pattern, to prevent light from being transmitted through the non-display area.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: February 12, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Rui Wang, Fei Shang, Jaikwang Kim, Sijun Lei, Shaoru Li
  • Patent number: 10199399
    Abstract: A display substrate, a display apparatus and a production method of the display substrate are provided. The display substrate includes a plurality of pixel units arranged in an array. Each of the pixel units includes: a first electrode; a first connection portion connected with the first electrode; and a first connection line, the first connection portion being connected to the first connection line through a first via hole. The first connection line of at least one of the pixel units is connected with the first connection line of the pixel unit positioned on an upper side of the at least one of the pixel units and the first connection line of the pixel unit positioned on a lower side of the at least one of the pixel units.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: February 5, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Rui Wang, Haijun Qiu, Fei Shang, Jaikwang Kim, Shaoru Li
  • Publication number: 20190019815
    Abstract: The present disclosure provides an array substrate, its manufacturing method, and a display apparatus containing the array substrate. The array substrate includes: a substrate; a plurality of gate lines and a plurality of data lines, disposed over the substrate and arranged in rows and columns respectively; and a plurality of pixel regions, each arranged in an area defined by crossing gate lines and data lines and comprising a pixel electrode. The plurality of data lines are configured such that in each pixel region, orthographic projection of any one of the plurality of data lines on the substrate and orthographic projection of a corresponding pixel electrode on the substrate has an overlapping area having a width of ?0 ?m.
    Type: Application
    Filed: November 7, 2016
    Publication date: January 17, 2019
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Rui WANG, Haijun QIU, Fei SHANG, Jaikwang KIM, Shaoru LI, Zhuo XU
  • Patent number: 10101649
    Abstract: A mask plate is disclosed. The mask plate includes a via hole pattern, the via hole pattern includes a body portion and at least two protruding portions extending outward from the body portion; a dimension of the body portion is greater than a resolution dimension of an exposure machine, and each of the protruding portions includes a first protruding portion having a dimension greater than the resolution dimension of the exposure machine. Upon exposure of the mask plate, the protruding portions themselves and zones between adjacent protruding portions form convex portions and concave portions of a via hole, respectively; in this way, a circumstance and also an edge area of the via hole as formed is increased and an electric resistance of the via hole is reduced effectively.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: October 16, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQUING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhuo Xu, Yajie Bai, Xiaoyuan Wang, Jaikwang Kim, Fei Shang
  • Publication number: 20180212001
    Abstract: The present disclosure provides a pixel structure and a fabricating method thereof, as well as a display panel and a display apparatus. The pixel structure includes a plurality of pairs of pixels in a matrix having rows and columns; each pixel is shaped as a right triangle and corresponds to one of four different colors; each pair of pixels is at an intersection between a row and a column and comprises two pixels of different colors; and two pairs of pixels at two neighboring intersections along a direction of the rows or along a direction of the columns comprise four pixels of different colors. Each pair of pixels can have a combined shape of a rectangle, which can form a virtual pixel unit. Adjacent four pixels of four different colors have a combined shape of diamond, which can form a physical pixel unit.
    Type: Application
    Filed: May 20, 2016
    Publication date: July 26, 2018
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yajie BAI, Zhuo XU, Xiaoyuan WANG, Jaikwang KIM
  • Publication number: 20180197495
    Abstract: The present application discloses an array substrate, a driving method thereof, and related display apparatus based on an improved dual-gate scheme. The array substrate includes multiple groups each having two columns of pixel electrodes without laying a data line in a gap between the two columns. Each group includes multiple second transistors for pre-charging respective pairs of pixel electrodes having reversed polarities in each corresponding scanning cycle. Before each pixel electrode is charged via a first transistor, turning on the second transistor allows charge sharing between the two pixel electrodes having reversed polarities so that the charging time of each pixel electrodes is substantially reduced and the operation power is saved.
    Type: Application
    Filed: December 22, 2016
    Publication date: July 12, 2018
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., Chongqing BOE Optoelectronics Technology CO., Ltd.
    Inventors: Zhuo Xu, Rui Wang, Yajie Bai, Jaikwang Kim, Fei Shang, Haijun Qiu
  • Publication number: 20180190216
    Abstract: The array substrate comprises a plurality of gate lines extending in a first direction, a plurality of data lines extending in a second direction crossing the first direction, and a plurality of pixel units arranged as an array. Each of the plurality of data lines is arranged between two columns of pixel units, the two columns of the pixel units extending in the second direction and being adjacent to each other in the first direction, and the data line is connected to pixel units at one side of said data line or to pixel units at the other side of said data line. Each of the plurality of data lines switches the direction of connection from one side to the other in an alternating manner with each two adjacent rows of pixel units, and the plurality of data lines have the same connection direction in each row of pixel units.
    Type: Application
    Filed: January 26, 2016
    Publication date: July 5, 2018
    Inventors: Xiaoyuan Wang, Wu Wang, Jaikwang Kim, Zhuo Xu, Yajie Bai
  • Patent number: 10014330
    Abstract: The present disclosure provides an array substrate, including: a plurality of gate lines and a plurality of data lines intersecting with one another for defining a plurality of pixel regions, each pixel region including two pixel units, each pixel unit including a pixel electrode; and a common electrode line and a pixel electrode line, the pixel electrode line being electrically connected to the pixel electrode. The common electrode line and at least one pixel electrode line form at least an overlapping area for forming at least one storing capacitor there-between.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: July 3, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD, CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD
    Inventors: Zhuo Xu, Jaikwang Kim, Fei Shang, Yajie Bai, Rui Wang
  • Patent number: 9991348
    Abstract: An array substrate includes a gate electrode and a source electrode arranged on a base substrate of the array substrate. The source electrode has a first end connected to a pixel electrode on the array substrate, and a second end opposite to the first end. A tip of the second end is provided with an extension portion, and an orthogonal projection of the extension portion onto the base substrate extends beyond an orthogonal projection of the gate electrode onto the base substrate.
    Type: Grant
    Filed: February 15, 2016
    Date of Patent: June 5, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhuo Xu, Jaikwang Kim, Rui Wang, Yajie Bai
  • Patent number: 9964823
    Abstract: A display panel includes an array substrate having a plurality of pixel regions in multi-rows and multi-columns, a thin film transistor comprising a gate, a source, a drain and an active layer being provided in each of the pixel regions. Two gate lines are provided between two adjacent rows of pixel regions. Two adjacent columns of pixel regions constitute one pixel column group, and a data line is provided between two columns of pixel regions in the same one pixel column group. The array substrate further includes a pixel electrode, a common electrode and a common electrode line comprising a horizontal common electrode line parallel to the gate line, wherein a projection of the horizontal common electrode line in a direction perpendicular to the display panel is not overlapped with projections of the drains of respective thin film transistors in the direction perpendicular to the display panel.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: May 8, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Peng Jiang, Weihua Jia, Haipeng Yang, Jaikwang Kim, Yongjun Yoon
  • Patent number: 9933672
    Abstract: A display panel and manufacturing method thereof, and a display device are disclosed. The display panel includes an array substrate and a counter substrate. The array substrate includes a main region and a peripheral region, the main region coincides with an orthographical projection of the counter substrate on the array substrate, and at least one glue dispensing zone is arranged in the peripheral region or the main region. Conductive adhesive is provided in the glue dispensing zone, and is electrically connected to a grounded unit; an electrostatic conducting structure is provided on the counter substrate, and the conductive adhesive is electrically connected to the electrostatic conducting structure.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: April 3, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINGSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Weihua Jia, Peng Jiang, Haipeng Yang, Jaikwang Kim, Yong Jun Yoon
  • Publication number: 20180076223
    Abstract: A display substrate, a display apparatus and a production method of the display substrate are provided. The display substrate includes a plurality of pixel units arranged in an array. Each of the pixel units includes: a first electrode; a first connection portion connected with the first electrode; and a first connection line, the first connection portion being connected to the first connection line through a first via hole. The first connection line of at least one of the pixel units is connected with the first connection line of the pixel unit positioned on an upper side of the at least one of the pixel units and the first connection line of the pixel unit positioned on a lower side of the at least one of the pixel units.
    Type: Application
    Filed: July 22, 2016
    Publication date: March 15, 2018
    Inventors: Rui WANG, Haijun QIU, Fei SHANG, Jaikwang KIM, Shaoru LI
  • Patent number: 9888590
    Abstract: A printed circuit board, a display panel and a wiring method are provided by embodiments of the disclosure. The printed circuit board includes: a first multichannel circuit connecting terminal; a second multichannel circuit connecting terminal; and a plurality of connecting wires connecting a plurality of second channel connecting pins of the second multichannel circuit connecting terminal with a part of a first channel connecting pins of the first multichannel circuit connecting terminal in one-to-one correspondence, the rest of the first channel connecting pins being spare, where at least one of the plurality of connecting wires has a first portion, which is bent to extend through a spare region, on the printed circuit board, between the spare first channel connecting pins and the second multichannel circuit connecting terminal.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: February 6, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhuo Xu, Yajie Bai, Xiaoyuan Wang, Jaikwang Kim
  • Publication number: 20170336673
    Abstract: A color filter substrate, a display panel and a display device are disclosed. The color filter substrate includes a base substrate, and a color filter layer and a phase inversion pattern which are disposed on the base substrate, wherein the phase inversion pattern includes a plurality of openings corresponding to a plurality of color filter units of the color filter layer, and the phase inversion pattern defines a boundary of each of the color filter units; a projection of the phase inversion pattern on the base substrate at least partially covers a projection of an area between adjacent color filter units on the base substrate; the phase inversion pattern is configured to allow light passing through the phase inversion pattern to undergo phase inversion.
    Type: Application
    Filed: July 15, 2016
    Publication date: November 23, 2017
    Inventors: Peng JIANG, Liangliang JIANG, Weihua JIA, Haipeng YANG, Jaikwang KIM, Yongjun YOON
  • Publication number: 20170336670
    Abstract: A display substrate, a method for manufacturing the display substrate, and a display device are provided. The display substrate includes a display area and a non-display area surrounding the display area. The non-display area of the display substrate includes a shading pattern, to prevent light from being transmitted through the non-display area.
    Type: Application
    Filed: December 10, 2015
    Publication date: November 23, 2017
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Rui WANG, Fei SHANG, Jaikwang KIM, Sijun LEI, Shaoru LI
  • Publication number: 20170277008
    Abstract: A display panel includes an array substrate having a plurality of pixel regions in multi-rows and multi-columns, a thin film transistor comprising a gate, a source, a drain and an active layer being provided in each of the pixel regions. Two gate lines are provided between two adjacent rows of pixel regions. Two adjacent columns of pixel regions constitute one pixel column group, and a data line is provided between two columns of pixel regions in the same one pixel column group. The array substrate further includes a pixel electrode, a common electrode and a common electrode line comprising a horizontal common electrode line parallel to the gate line wherein a projection of the horizontal common electrode line in a direction perpendicular to the display panel is not overlapped with projections of the drains of respective thin film transistors in the direction perpendicular to the display panel.
    Type: Application
    Filed: April 14, 2016
    Publication date: September 28, 2017
    Applicants: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronica Technology Co.,Ltd.
    Inventors: Peng JIANG, Weihua JIA, Haipeng YANG, Jaikwang KIM, Yongjun YOON
  • Patent number: 9773817
    Abstract: The present invention provides a thin film transistor and a manufacturing method thereof, an array substrate and a display device. The thin film transistor comprises a gate electrode, an active layer, an etch stop layer, a source electrode and a drain electrode. The etch stop layer is provided between the active layer and the source and drain electrodes, a first via hole and a second via hole are formed in the etch stop layer, the source electrode is connected with the active layer through the first via hole, the drain electrode is connected with the active layer through the second via hole, and the gate electrode is overlapped with a part of the first via hole and a part of the second via hole respectively and is overlapped with a portion between the first via hole and the second via hole.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: September 26, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Haipeng Yang, Yongjun Yoon, Zhizhong Tu, Jaikwang Kim
  • Publication number: 20170271461
    Abstract: An array substrate includes a gate electrode and a source electrode arranged on a base substrate of the array substrate. The source electrode has a first end connected to a pixel electrode on the array substrate, and a second end opposite to the first end. A tip of the second end is provided with an extension portion, and an orthogonal projection of the extension portion onto the base substrate extends beyond an orthogonal projection of the gate electrode onto the base substrate.
    Type: Application
    Filed: February 15, 2016
    Publication date: September 21, 2017
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhuo XU, Jaikwang KIM, Rui WANG, Yajie BAI
  • Publication number: 20170257957
    Abstract: A printed circuit board, a display panel and a wiring method are provided by embodiments of the disclosure. The printed circuit board includes: a first multichannel circuit connecting terminal; a second multichannel circuit connecting terminal; and a plurality of connecting wires connecting a plurality of second channel connecting pins of the second multichannel circuit connecting terminal with a part of a first channel connecting pins of the first multichannel circuit connecting terminal in one-to-one correspondence, the rest of the first channel connecting pins being spare, where at least one of the plurality of connecting wires has a first portion, which is bent to extend through a spare region, on the printed circuit board, between the spare first channel connecting pins and the second multichannel circuit connecting terminal.
    Type: Application
    Filed: August 19, 2016
    Publication date: September 7, 2017
    Inventors: Zhuo Xu, Yajie Bai, Xiaoyuan Wang, Jaikwang Kim
  • Publication number: 20170236474
    Abstract: An array substrate, a display panel and a driving method thereof. The array substrate includes a plurality of right-angled triangular subpixels. Each subpixel and another adjacent subpixel form a corresponding rectangular virtual pixel, and the plurality of subpixels form a plurality of virtual pixels arranged in an array. Every four adjacent subpixels which belong to different virtual pixels respectively form a corresponding diamond-shaped physical pixel.
    Type: Application
    Filed: July 8, 2016
    Publication date: August 17, 2017
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhuo XU, Yajie BAI, Xing XIONG, Jaikwang KIM, Fei SHANG, Wu WANG