Abstract: The present disclosure provides an array substrate, including: a plurality of gate lines and a plurality of data lines intersecting with one another for defining a plurality of pixel regions, each pixel region including two pixel units, each pixel unit including a pixel electrode; and a common electrode line and a pixel electrode line, the pixel electrode line being electrically connected to the pixel electrode. The common electrode line and at least one pixel electrode line form at least an overlapping area for forming at least one storing capacitor there-between.

Abstract: A pixel structure, a display panel and a manufacturing method of the pixel structure are disclosed. The pixel structure includes: gate lines extending in parallel in a first direction; data lines extending in parallel in a second direction; and a plurality of pixel units defined by the gate lines and the data lines. One of the data lines is disposed between two pixel units which are adjacent to each other in the first direction, and two of the gate lines are disposed between two pixel units which are adjacent to each other in the second direction. Each of the pixel units comprises two pixel regions which are arranged side by side in the first direction, each of the pixel regions comprises a pixel electrode, and each of the pixel units comprises a unitary common electrode which covers the two pixel regions.

Abstract: A mask plate is disclosed. The mask plate includes a via hole pattern, the via hole pattern includes a body portion and at least two protruding portions extending outward from the body portion; a dimension of the body portion is greater than a resolution dimension of an exposure machine, and each of the protruding portions includes a first protruding portion having a dimension greater than the resolution dimension of the exposure machine. Upon exposure of the mask plate, the protruding portions themselves and zones between adjacent protruding portions form convex portions and concave portions of a via hole, respectively; in this way, a circumstance and also an edge area of the via hole as formed is increased and an electric resistance of the via hole is reduced effectively.

Abstract: There is provided an array substrate and display driving method thereof, and a display device, wherein the array substrate comprises a common voltage line, a plurality of pixel electrodes arranged in rows and columns, and at least one first transistor arranged between two adjacent pixel electrodes, wherein a gate electrode of first transistor is coupled to the common voltage line, a first electrode of the first transistor is coupled to one of the two adjacent pixel electrodes, and a second electrode of the first transistor is coupled to the other one of the two adjacent pixel electrodes. The disclosure makes it possible to achieve polarity neutralization of grayscale voltages for the adjacent pixels without reducing the pixel aperture ratio, thus significantly reducing power consumption without affecting the display effect and achieving a power consumption even lower than the lowest power consumption achieved by the existing display devices.

Abstract: The embodiment of the present invention provides a liquid crystal display panel comprising an array substrate and an opposite substrate arranged opposite to each other, and spacers provided between the array substrate and the opposite substrate; the liquid crystal display panel includes a central region and a peripheral region; heights of the spacers within the central region without extending and contracting are set as a first height; heights of the spacers within the peripheral region without extending and contracting are set as second heights; and the first height is larger than the second heights.

Abstract: An array substrate and manufacturing thereof are provided. The array substrate comprises gate lines, first data lines, second data lines and N×M pixel units defined by the gate lines intersecting with the first data lines and the second data lines. A repairing line for each column of the pixel units is provided for a region at which at least one row of pixel units are located. Projections of two ends of the repairing line on the substrate respectively overlap with regions at which the first data line and the second data line of the same column of pixel units are located, and the repairing line is isolated from the first data line and the second data line.

Abstract: Provided is a shift register unit, a gate driving apparatus and a display device capable of increasing a lifespan of a shift register.

Abstract: A display panel and manufacturing method thereof, and a display device are disclosed. The display panel includes an array substrate and a counter substrate. The array substrate includes a main region and a peripheral region, the main region coincides with an orthographical projection of the counter substrate on the array substrate, and at least one glue dispensing zone is arranged in the peripheral region or the main region. Conductive adhesive is provided in the glue dispensing zone, and is electrically connected to a grounded unit; an electrostatic conducting structure is provided on the counter substrate, and the conductive adhesive is electrically connected to the electrostatic conducting structure.

Abstract: A thin film transistor and a method of manufacturing the same, an array substrate and a display device are provided, the thin film transistor including: a source, a drain, and a gate; and a semiconductor active layer, wherein the source overlays a periphery of the semiconductor active layer, the drain is located in a central region of the semiconductor active layer, and an insulation layer is disposed between the source and the drain. By means of the above thin film transistor, the ratio of width to length of a channel can be increased without influencing the aperture ratio of pixel.

Abstract: An array substrate and manufacturing and repairing method thereof are provided. The array substrate comprises gate lines (G1, G2), first data lines (D1), second data lines (D2) and N×M pixel units defined by the gate lines (G1, G2), intersecting with the first data lines (D1) and the second data lines (D2). The first data lines (D1) are configured to drive odd numbered pixel units in a same column of pixel units, the second data lines (D2) are configured to drive even numbered pixel units in the same column of pixel units. A repairing line (1) for each column of the pixel units is provided for a region at which at least one row of pixel units are located. Projections of two ends of the repairing line (1) on the substrate respectively overlap with regions at which the first data line (D1) and the second data line (D2) of the same column of pixel units are located, and the repairing line (1) is isolated from the first data line (D1) and the second data line (D2).

Abstract: The present invention provides a thin film transistor and a manufacturing method thereof, an array substrate and a display device. The thin film transistor comprises a gate electrode, an active layer, an etch stop layer, a source electrode and a drain electrode, the etch stop layer is provided between the active layer and the source and drain electrodes, a first via hole and a second via hole are formed in the etch stop layer, the source electrode is connected with the active layer through the first via hole, the drain electrode is connected with the active layer through the second via hole, and the gate electrode is overlapped with a part of the first via hole and a part of the second via hole respectively and is overlapped with a portion between the first via hole and the second via hole.

Abstract: A thin film transistor and a method of manufacturing the same, an array substrate and a display device are provided, the thin film transistor including: a source, a drain, and a gate; and a semiconductor active layer, wherein the source overlays a periphery of the semiconductor active layer, the drain is located in a central region of the semiconductor active layer, and an insulation layer is disposed between the source and the drain. By means of the above thin film transistor, the ratio of width to length of a channel can be increased without influencing the aperture ratio of pixel.

Abstract: Provided is a shift register unit, a gate driving apparatus and a display device capable of increasing a lifespan of a shift register.

Abstract: The embodiment of the present invention provides a liquid crystal display panel comprising an array substrate and an opposite substrate arranged opposite to each other, and spacers provided between the array substrate and the opposite substrate; the liquid crystal display panel includes a central region and a peripheral region; heights of the spacers within the central region without extending and contracting are set as a first height; heights of the spacers within the peripheral region without extending and contracting are set as second heights; and the first height is larger than the second heights.

Abstract: A pixel circuit and method for driving the same, an array substrate, and a display device are provided, wherein the pixel circuit includes a driving transistor (DTFT), a first switching transistor (M1), a storage capacitor (C1) and a light emitting device and a threshold compensating circuit; the threshold compensating circuit includes a second switching transistor (M2), a third switching transistor (M3), a fourth switching transistor (M4) and a coupling capacitor (C2), which is capable of compensating for non-uniformity of threshold voltage of the driving transistor (DTFT) effectively. The method for driving the pixel circuit includes a pre-charging phase (C), a compensating phase (D) and a light emitting phase (E). The array substrate includes the above-described pixel circuit and thus has a more stable performance. The display device includes the above-described array substrate, and thus uniformity of picture displayed on the display device is improved significantly.

Abstract: A pixel structure for a horizontal field LCD comprises a plurality of pixel units. Each of the pixel units comprises a gate line corresponding to the pixel unit, a data line corresponding to the pixel unit, and at least one TFT, wherein the TFT is electrically connected with the gate line and the data line, the gate line and the data line divide the pixel unit into four sub-pixels, the sub-pixel is provided with a pixel electrode which is electrically connected with the TFT, and the pixel electrode is provided with a plurality of slits in a predetermined direction.

Abstract: A pixel structure for a horizontal field LCD comprises a plurality of pixel units. Each of the pixel units comprises a gate line corresponding to the pixel unit, a data line corresponding to the pixel unit, and at least one TFT, wherein the TFT is electrically connected with the gate line and the data line, the gate line and the data line divide the pixel unit into four sub-pixels, the sub-pixel is provided with a pixel electrode which is electrically connected with the TFT, and the pixel electrode is provided with a plurality of slits in a predetermined direction.