Patents by Inventor James A. Matthews

James A. Matthews has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5075247
    Abstract: A non-volatile, static magnetic memory device, whose operation is based on the Hall effect, is disclosed. The device includes a magnetic patch which stores data in the form of a magnetic field, a semiconductor Hall bar and a pair of integrally-formed bipolar transistors used for amplifying and buffering the Hall voltage produced along the Hall bar. Current is forced to flow down the length of the Hall bar causing a Hall voltage to be developed in a direction transverse to the direction of both the magnetic field and the current. The bases of the bipolar transistors are ohmically coupled to the Hall bar to sense the Hall voltage--the polarity of which is representative of the stored information. A system of current carrying conductors is employed for writing data to individual magnetic patches.
    Type: Grant
    Filed: January 11, 1991
    Date of Patent: December 24, 1991
    Assignee: MicroUnity Systems Engineering, Inc.
    Inventor: James A. Matthews
  • Patent number: 5068826
    Abstract: A non-volatile, static magnetic memory device, whose operation is based on the Hall effect, is disclosed. The device includes a magnetic patch which stores data in the form of a magnetic field, a semiconductor Hall bar and a pair of integrally-formed bipolar transistors used for amplifying and buffering the Hall voltage produced along the Hall bar. Current is forced to flow down the length of the Hall bar causing a Hall voltage to be developed in a direction transverse to the direction of both the magnetic field and the current. The bases of the bipolar transistors are ohmically coupled to the Hall bar to sense the Hall voltage--the polarity of which is representative of the stored information. A system of current carrying conductors is employed for writing data to individual magnetic patches.
    Type: Grant
    Filed: January 11, 1991
    Date of Patent: November 26, 1991
    Assignee: MicroUnity Systems Engineering
    Inventor: James A. Matthews
  • Patent number: 4856139
    Abstract: An upper hose assembly for an upright vacuum cleaner is arranged with external threads at one end for connection into the dirt collecting portion intake duct while the other end of the hose has mounted thereon a connector which allows for a snap-fit connection/disconnection from the fan discharge port of the vacuum cleaner. The connector is designed to provide a retrofit adaptation to an existing vacuum cleaner.
    Type: Grant
    Filed: February 1, 1989
    Date of Patent: August 15, 1989
    Assignee: Ryobi Motor Products Corp.
    Inventors: James A. Matthews, Louis A. Rotola, Jr.
  • Patent number: 4474624
    Abstract: Improved CMOS processing steps for forming p-type and n-type source and drain regions. A photoresist mask is used to expose one transistor type to allow the formation of source and drain regions of a first conductivity type. Then an oxidation step is used to grow an oxide over the substrate; this oxide grows more quickly over the doped source and drain regions. Ion implantation is used to implant ions of the second conductivity type through the thin oxide while the thicker oxide blocks these ions. Thus, the complementary source and drain regions are formed with a single masking step and without counter doping.
    Type: Grant
    Filed: July 12, 1982
    Date of Patent: October 2, 1984
    Assignee: Intel Corporation
    Inventor: James A. Matthews
  • Patent number: 4447290
    Abstract: A CMOS process which provides a self-aligned guardband in a high density circuit is disclosed. A polysilicon masking member is used to define a well and also to provide alignment for the guardband. A single plasma etching step etches silicon nitride in one area and both silicon nitride and polysilicon in another area prior to growth of field oxides.
    Type: Grant
    Filed: July 25, 1983
    Date of Patent: May 8, 1984
    Assignee: Intel Corporation
    Inventor: James A. Matthews
  • Patent number: 4412375
    Abstract: A CMOS process which provides a self-aligned guardband in a high density circuit is disclosed. A polysilicon masking member is used to define a well and also to provide alignment for the guardband. A single plasma etching step etches silicon nitride in one area and both silicon nitride and polysilicon in another area prior to growth of field oxides.
    Type: Grant
    Filed: June 10, 1982
    Date of Patent: November 1, 1983
    Assignee: Intel Corporation
    Inventor: James A. Matthews