Patents by Inventor James Broc Stirton
James Broc Stirton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10289109Abstract: Methods and computer program products for performing automatically determining when to shut down a fabrication tool, such as a semiconductor wafer fabrication tool, are provided herein. The methods include, for example, creating a measurement vector including process parameters of semiconductor wafers, creating a correlation matrix of correlations between measurements of parameters obtained of each wafer, creating autocorrelation matrixes including correlations between measurements of the parameter obtained for pairs of wafers; creating a combined matrix of correlation and autocorrelation matrixes, obtaining a T2 value from the measurement vector and combined matrix, and stopping a semiconductor wafer fabrication tool if the T2 value exceeds a critical value.Type: GrantFiled: September 7, 2016Date of Patent: May 14, 2019Assignee: GLOBALFOUNDRIES Inc.Inventors: Richard Good, Eugene Barash, James Broc Stirton, Daniel Kost
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Patent number: 10241502Abstract: Methods and computer program products for performing automatically determining when to shut down a fabrication tool, such as a semiconductor wafer fabrication tool, are provided herein. The methods include, for example, creating a measurement vector including process parameters of semiconductor wafers, creating a correlation matrix of correlations between measurements of parameters obtained of each wafer, creating autocorrelation matrixes including correlations between measurements of the parameter obtained for pairs of wafers; creating a combined matrix of correlation and autocorrelation matrixes, obtaining a T2 value from the measurement vector and combined matrix, and stopping a semiconductor wafer fabrication tool if the T2 value exceeds a critical value.Type: GrantFiled: December 9, 2016Date of Patent: March 26, 2019Assignee: GLOBALFOUNDRIES Inc.Inventors: Eugene Barash, James Broc Stirton, Richard Good
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Publication number: 20170097638Abstract: Methods and computer program products for performing automatically determining when to shut down a fabrication tool, such as a semiconductor wafer fabrication tool, are provided herein. The methods include, for example, creating a measurement vector including process parameters of semiconductor wafers, creating a correlation matrix of correlations between measurements of parameters obtained of each wafer, creating autocorrelation matrixes including correlations between measurements of the parameter obtained for pairs of wafers; creating a combined matrix of correlation and autocorrelation matrixes, obtaining a T2 value from the measurement vector and combined matrix, and stopping a semiconductor wafer fabrication tool if the T2 value exceeds a critical value.Type: ApplicationFiled: September 7, 2016Publication date: April 6, 2017Applicant: GLOBALFOUNDRIES Inc.Inventors: Richard GOOD, Eugene BARASH, James Broc STIRTON, Daniel KOST
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Publication number: 20170097635Abstract: Methods and computer program products for performing automatically determining when to shut down a fabrication tool, such as a semiconductor wafer fabrication tool, are provided herein. The methods include, for example, creating a measurement vector including process parameters of semiconductor wafers, creating a correlation matrix of correlations between measurements of parameters obtained of each wafer, creating autocorrelation matrixes including correlations between measurements of the parameter obtained for pairs of wafers; creating a combined matrix of correlation and autocorrelation matrixes, obtaining a T2 value from the measurement vector and combined matrix, and stopping a semiconductor wafer fabrication tool if the T2 value exceeds a critical value.Type: ApplicationFiled: December 9, 2016Publication date: April 6, 2017Applicant: GLOBALFOUNDRIES Inc.Inventors: Eugene BARASH, James Broc STIRTON, Richard GOOD
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Patent number: 8149384Abstract: A method for monitoring a photolithography system includes defining a model of the photolithography system for modeling top and bottom critical dimension data associated with features formed by the photolithography system as a function of dose and focus. A library of model inversions is generated for different combinations of top and bottom critical dimension values. Each entry in the library specifies a dose value and a focus value associated with a particular combination of top and bottom critical dimension values. A top critical dimension measurement and a bottom critical dimension measurement of a feature formed by the photolithography system using a commanded dose parameter and a commanded focus parameter are received. The library is accessed using the top and bottom critical dimension measurements to generate values for a received dose parameter and the received focus parameter.Type: GrantFiled: December 17, 2007Date of Patent: April 3, 2012Assignee: Advanced Micro Devices, Inc.Inventors: Siddharth Chauhan, Kevin R. Lensing, James Broc Stirton
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Patent number: 7925369Abstract: A method includes defining a reference model of a system having a plurality of terms for modeling data associated with the system. A reference fit error metric is generated for the reference model. A set of evaluation models each having one term different than the reference model is generated. An evaluation fit error metric for each of the evaluation models is generated. The reference model is replaced with a selected evaluation model responsive to the selected evaluation model having an evaluation fit error metric less than the reference fit error metric. The model evaluation is repeated until no evaluation model has an evaluation fit error metric less than the reference fit error metric. The reference model is trained using the data associated with the system, and the trained reference model is employed to determine at least one characteristic of the system.Type: GrantFiled: December 18, 2007Date of Patent: April 12, 2011Assignee: GLOBALFOUNDRIES Inc.Inventors: Siddharth Chauhan, Kevin R. Lensing, James Broc Stirton
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Patent number: 7869894Abstract: By directly using relative biases, contained in the relative bias date matrix, and by appropriately weighting the components thereof, sampling rate limitations in an APC control scheme may be efficiently compensated for. In particular embodiments, an age-based weighting factor is established that scales measurement data uncertainty according to the delay with which the corresponding measurement data for a specific control thread are obtained.Type: GrantFiled: May 26, 2006Date of Patent: January 11, 2011Assignee: Advanced Micro Devices, Inc.Inventors: James Broc Stirton, Andre Holfeld
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Patent number: 7840298Abstract: By taking into consideration the measurement uncertainties in the form of standard errors, the performance of APC controllers may be efficiently enhanced by using the standard errors as a control input. For example, the filter parameter of an EWMA filter may be efficiently scaled on the basis of a standard error of measurement data.Type: GrantFiled: May 8, 2006Date of Patent: November 23, 2010Assignee: Advanced Micro Devices, Inc.Inventors: Hans-Juergen Malig, James Broc Stirton
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Patent number: 7831324Abstract: By coordinating a process regime of a process module for sample substrates used in a previously performed metrology process, an increased degree of measurement information may be obtained. For this purpose, the coordination may be based on a sampling ruleset related to the process module, wherein the previously selected sample substrates may be appropriately sequenced through the process module to increase the probability for complying with the associated sampling ruleset. Furthermore, the enhanced process coordination may be advantageously combined with randomization steps, thereby providing a “pseudo randomization,” in which sample substrates are intentionally positioned, while the remaining substrates may be randomized for decoupling related process steps.Type: GrantFiled: May 9, 2007Date of Patent: November 9, 2010Assignee: GlobalFoundries Inc.Inventors: James Broc Stirton, Richard Good
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Patent number: 7738986Abstract: A method includes acquiring metrology data associated with a process. Bias information associated with the process is determined. The metrology data is adjusted based on the bias information to generate bias-adjusted metrology data. The bias-adjusted metrology data is filtered to identify and reject outlier data. The process is controlled based on the metrology data remaining after the rejection of the outlier data.Type: GrantFiled: October 9, 2006Date of Patent: June 15, 2010Assignee: GlobalFoundries, Inc.Inventors: James Broc Stirton, Kevin R. Lensing, Richard P. Good
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Patent number: 7565254Abstract: A method includes defining a plurality of simple sampling rules for selecting material for metrology. Each simple sampling rule has an associated penalty. At least one combination sampling rule relating a subset of at least two simple sampling rules is defined. The combination sampling rule has an associated penalty. The penalties are assessed responsive to a previous material selection not satisfying the simple sampling rules or the combination sampling rule. Material is selected for subsequent metrology based on the sampling rules and the assessed penalties. At least one characteristic of the selected material is measured.Type: GrantFiled: December 13, 2006Date of Patent: July 21, 2009Assignee: Advanced Micro Devices, Inc.Inventors: Richard P. Good, James Broc Stirton
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Publication number: 20090157577Abstract: A method includes defining a reference model of a system having a plurality of terms for modeling data associated with the system. A reference fit error metric is generated for the reference model. A set of evaluation models each having one term different than the reference model is generated. An evaluation fit error metric for each of the evaluation models is generated. The reference model is replaced with a selected evaluation model responsive to the selected evaluation model having an evaluation fit error metric less than the reference fit error metric. The model evaluation is repeated until no evaluation model has an evaluation fit error metric less than the reference fit error metric. The reference model is trained using the data associated with the system, and the trained reference model is employed to determine at least one characteristic of the system.Type: ApplicationFiled: December 18, 2007Publication date: June 18, 2009Inventors: SIDDHARTH CHAUHAN, Kevin R. Lensing, James Broc Stirton
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Publication number: 20090153818Abstract: A method for monitoring a photolithography system includes defining a model of the photolithography system for modeling top and bottom critical dimension data associated with features formed by the photolithography system as a function of dose and focus. A library of model inversions is generated for different combinations of top and bottom critical dimension values. Each entry in the library specifies a dose value and a focus value associated with a particular combination of top and bottom critical dimension values. A top critical dimension measurement and a bottom critical dimension measurement of a feature formed by the photolithography system using a commanded dose parameter and a commanded focus parameter are received. The library is accessed using the top and bottom critical dimension measurements to generate values for a received dose parameter and the received focus parameter.Type: ApplicationFiled: December 17, 2007Publication date: June 18, 2009Inventors: Siddharth Chauhan, Kevin R. Lensing, James Broc Stirton
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Publication number: 20080147343Abstract: A method includes defining a plurality of simple sampling rules for selecting material for metrology. Each simple sampling rule has an associated penalty. At least one combination sampling rule relating a subset of at least two simple sampling rules is defined. The combination sampling rule has an associated penalty. The penalties are assessed responsive to a previous material selection not satisfying the simple sampling rules or the combination sampling rule. Material is selected for subsequent metrology based on the sampling rules and the assessed penalties. At least one characteristic of the selected material is measured.Type: ApplicationFiled: December 13, 2006Publication date: June 19, 2008Inventors: Richard P. Good, James Broc Stirton
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Publication number: 20080147224Abstract: A method includes acquiring metrology data associated with a process. Bias information associated with the process is determined. The metrology data is adjusted based on the bias information to generate bias-adjusted metrology data. The bias-adjusted metrology data is filtered to identify and reject outlier data. The process is controlled based on the metrology data remaining after the rejection of the outlier data.Type: ApplicationFiled: October 9, 2006Publication date: June 19, 2008Inventors: James Broc Stirton, Kevin R. Lensing, Richard P. Good
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Publication number: 20080103618Abstract: By coordinating a process regime of a process module for sample substrates used in a previously performed metrology process, an increased degree of measurement information may be obtained. For this purpose, the coordination may be based on a sampling ruleset related to the process module, wherein the previously selected sample substrates may be appropriately sequenced through the process module to increase the probability for complying with the associated sampling ruleset. Furthermore, the enhanced process coordination may be advantageously combined with randomization steps, thereby providing a “pseudo randomization,” in which sample substrates are intentionally positioned, while the remaining substrates may be randomized for decoupling related process steps.Type: ApplicationFiled: May 9, 2007Publication date: May 1, 2008Inventors: James Broc Stirton, Richard Good
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Patent number: 7330800Abstract: A method includes providing a plurality of sampling rules. Each sampling rule is associated with at least one of a plurality of sites on a workpiece. At least one penalty is assigned to each sampling rule. The penalty is assessed responsive to a previous site selection not satisfying the associated sampling rule. A subset of the sites is selected for subsequent metrology based on the sampling rules and the assessed penalties. At least one characteristic of the workpiece is measured at the selected subset of the sites.Type: GrantFiled: October 9, 2006Date of Patent: February 12, 2008Assignee: Advanced Micro Devices, Inc.Inventors: Richard P. Good, James Broc Stirton
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Patent number: 6989900Abstract: The present invention is directed to several inventive methods for characterizing implant profiles. In one embodiment, the method comprises forming a first plurality of implant regions in a substrate, and illuminating the implant regions with a light source in a scatterometry tool, the scatterometry tool generating a trace profile corresponding to an implant profile of the illuminated implant regions. In another embodiment, the method comprises measuring profiles of implant regions by forming a plurality of implant regions in a substrate, illuminating the implant regions, measuring light reflected off the substrate to generate a profile trace for the implant regions, comparing the generated profile trace to a target profile trace from a library, and modifying, based upon a deviation between the generated profile trace and the target profile trace, at least one parameter of an ion implant process used to form implant regions on subsequently processed substrates.Type: GrantFiled: April 2, 2001Date of Patent: January 24, 2006Assignee: Advanced Micro Devices, Inc.Inventor: James Broc Stirton
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Patent number: 6980300Abstract: A method for polishing wafers includes polishing a process layer formed on a wafer, the process layer overlying a grating structure; illuminating at least a portion of the process layer and the grating structure; measuring light reflected from the illuminated portion of the process layer and the grating structure to generate a reflection profile; comparing the measured reflection profile to a target reflection profile having an acceptable degree of planarity; and terminating the polishing of the process layer based on the comparison of the measured reflection profile and the target reflection profile. A metrology tool adapted to measure a wafer having a grating structure and a process layer formed over the grating structure after initiation of a polishing process includes a light source, a detector, and a data processing unit. The light source is adapted to illuminate at least a portion of the process layer overlying the grating structure.Type: GrantFiled: April 11, 2001Date of Patent: December 27, 2005Assignee: Advanced Micro Devices, Inc.Inventors: Kevin R. Lensing, James Broc Stirton
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Patent number: 6972853Abstract: The present invention is generally directed to various methods of stepper exposure processes and tools, and system for accomplishing same. In one embodiment, the method comprises forming a grating structure comprised of a plurality of photoresist features above a semiconducting substrate, measuring at least one characteristic of at least one of the photoresist features at a plurality of locations within the grating structure, and determining if the measured characteristic of the photoresist features varies across the grating structure.Type: GrantFiled: September 27, 2002Date of Patent: December 6, 2005Assignee: Advanced Micro Devices, Inc.Inventors: James Broc Stirton, Homi E. Nariman