Patents by Inventor James Broc Stirton

James Broc Stirton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6933158
    Abstract: The present invention is directed to several inventive methods of monitoring anneal processes performed on implant regions, and a system for accomplishing same. In one aspect, the method comprises forming a first plurality of implant regions in a semiconducting substrate, performing at least one anneal process on implant regions, performing a scatterometric measurement of at least one of the implant regions after at least a portion of the anneal process is performed to determine a profile of the implant region and determining an effectiveness of the anneal process based upon the determined profile of the implant region. In other embodiments, one or more parameters of the anneal process may be varied on subsequently processed substrates based upon the determined efficiency of the anneal process.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: August 23, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kevin R. Lensing, James Broc Stirton, Homi E. Nariman, Steven P. Reeves
  • Patent number: 6927080
    Abstract: The present invention is generally directed to various structures for analyzing electromigration, and methods of using same. In one illustrative embodiment, the method includes forming a grating structure above a semiconducting substrate, the grating structure being comprised of a plurality of conductive features, forcing an electrical current through at least one of the conductive features until a resistance of the conductive feature increases by a preselected amount, and performing at least one scatterometric measurement of the conductive feature to determine a critical dimension of the conductive feature.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: August 9, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Homi E. Nariman, James Broc Stirton, Kevin R. Lensing, Steven P. Reeves
  • Patent number: 6881594
    Abstract: The present invention is generally directed to various methods of using scatterometry for analysis of electromigration. In one illustrative embodiment, the method comprises forming a grating structure above a semiconducting substrate, the grating structure being comprised of a plurality of conductive structures, forcing an electrical current through at least one of the conductive structures and performing scatterometric measurements of at least one conductive structure to detect a change in shape of at least a portion of the conductive structure. In further embodiments, the method comprises determining a susceptibility of at least one conductive structure to electromigration based upon the detected change in shape of the conductive structure.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: April 19, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Broc Stirton, Steven P. Reeves, Homi E. Nariman, Kevin R. Lensing
  • Patent number: 6859746
    Abstract: Methods of using adaptive sampling techniques based upon categorization of process variations, and a system for performing same are disclosed. In one illustrative embodiment, the method comprises acquiring metrology data regarding at least one process operation performed on a plurality of substrates in accordance with an initial metrology sampling plan, providing the acquired metrology dam to a controller that identifies process variations in the at least one process operation based upon the acquired metrology data and further identifies a plurality of categories of the process variations.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: February 22, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventor: James Broc Stirton
  • Patent number: 6808946
    Abstract: A method of using critical dimension measurements to control stepper process parameters is disclosed. In one illustrative embodiment, the method comprises forming a masking layer above a process layer, the masking layer having a plurality of features formed therein, measuring at least one critical dimension of a plurality of features positioned within at least one exposure field of a stepper exposure process used in forming the features, and determining a tilt of the masking layer within at least one exposure field based upon the measured critical dimensions of the plurality of features. In one illustrative embodiment, the system comprises a metrology tool adapted to measure at least one critical dimension of a plurality of features in a masking layer and a controller for determining a tilt of the masking layer based upon the measured critical dimensions of said plurality of features.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: October 26, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Broc Stirton, Richard D. Edwards, Christopher A. Bode
  • Patent number: 6790570
    Abstract: A method of using scatterometric techniques to control stepper process is disclosed. In one illustrative embodiment, the method comprises providing a library of optical characteristic traces, each of which corresponds to a grating structure comprised of a plurality of features having a known profile, and forming a plurality of grating structures in a layer of photoresist, each of said formed grating structures being comprised of a plurality of features having an unknown profile.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: September 14, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Broc Stirton, Richard D. Edwards, Christopher A. Bode
  • Patent number: 6785009
    Abstract: A method of using high yielding spectra scatterometry measurements to control semiconductor manufacturing processes and systems for accomplishing same is disclosed. In one embodiment, the method comprises providing a library comprised of at least one target optical characteristic trace of a grating structure comprised of a plurality of gate stacks, the target trace corresponding to a semiconductor device having at least one desired electrical performance characteristic, providing a substrate having at least one grating structure formed thereabove, the formed grating structure comprised of a plurality of gate stacks, illuminating at least one grating structure formed above said substrate, measuring light reflected off of the grating structure formed above the substrate to generate an optical characteristic trace for the formed grating structure, and comparing the generated optical characteristic trace to the target trace.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: August 31, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Broc Stirton, Kevin R. Lensing, Hormuzdiar E. Nariman, Steven P. Reeves
  • Patent number: 6774998
    Abstract: A method includes providing a wafer having a first grating structure and a second grating structure formed in a photoresist layer. At least a portion of the first and second grating structures is illuminated with a light source. Light reflected from the illuminated portion of the first and second grating structures is measured to generate a reflection profile. Misregistration between the first and second grating structures is determined based on the reflection profile. A processing line includes a photolithography stepper, a metrology tool, and a controller. The photolithography stepper is adapted to process wafers in accordance with an operating recipe. The metrology tool is adapted to receive a wafer processed in the stepper. The wafer has a first grating structure and a second grating structure formed in a photoresist layer. The metrology tool includes a light source, a detector, and a data processing unit.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: August 10, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Marilyn I. Wright, Kevin R. Lensing, James Broc Stirton
  • Patent number: 6746882
    Abstract: The present invention is generally directed to various methods of correcting non-linearity in metrology tools, and a system for performing same. In one illustrative embodiment, the method comprises creating a non-linear model of measurement data produced by a metrology tool when measuring a plurality of features, each of which has a different, known feature size, measuring a production feature using the metrology tool to produce metrology data for the production feature, determining a correction factor to be applied to the metrology data for the production feature by comparing the non-linear model to a linear model, and applying the determined correction factor to the metrology data for the production feature.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: June 8, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Broc Stirton, Kevin R. Lensing
  • Patent number: 6716646
    Abstract: The present invention provides for a method and an apparatus for overlay measurements using optical techniques. At least one semiconductor device is processed. Metrology data from the processed semiconductor device is acquired. A scatterometry overlay analysis based upon the metrology data is performed. At least one modified manufacturing parameter is calculated based upon the scatterometry overlay analysis.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: April 6, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Marilyn I. Wright, Kevin R. Lensing, James Broc Stirton, Richard J. Markle
  • Patent number: 6660543
    Abstract: The present invention is directed to several inventive methods for characterizing implant profiles. In one embodiment, the method comprises providing a semiconducting substrate, forming a first plurality of implant regions in the substrate, and illuminating at least one of the first plurality of implant regions with a light source in a scatterometry tool, wherein the scatterometry tool generates a profile trace corresponding to an implant profile of the illuminated implant region. The method further comprises creating at least one profile trace corresponding,to an anticipated profile of the implant region, wherein, in creating the profile trace, values of at least one of an index of refraction (n) and a dielectric constant (k) are varied, and comparing the generated profile trace to at least one created profile trace.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: December 9, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Broc Stirton, Kevin R. Lensing, Homi E. Nariman, Steven P. Reeves
  • Patent number: 6660542
    Abstract: The present invention is directed to a method of controlling stepper process parameters based upon optical properties of incoming process layers, and a system for accomplishing same. In one embodiment, the method comprises forming a film stack comprised of at least one process layer and a layer of photoresist, illuminating the film stack, and measuring light reflected off the film stack to generate an optical characteristic trace for the film stack. The method further comprises comparing the generated optical characteristic trace to a target optical characteristic trace, and modifying, based upon a deviation between the generated optical characteristic trace and the target optical characteristic trace, at least one parameter of an exposure process to be performed on the film stack.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: December 9, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventor: James Broc Stirton
  • Patent number: 6643008
    Abstract: The present invention is generally directed to various methods of detecting degradation in photolithography processes based upon scatterometric measurements of grating structures, and a device comprising such structures. In one embodiment, the method comprises providing a wafer comprised of a plurality of grating structures, each of the grating structures being comprised of a plurality of features, each of the grating structures having a different critical dimension, illuminating at least one of the grating structures, measuring light reflected off of at least one of the grating structures to generate an optical characteristic trace for the grating structure, and determining the presence of residual photoresist material between the features of the grating structure by comparing the generated optical characteristic trace to at least one optical characteristic trace from a library. In some embodiments, the grating structures are arranged in a linear array.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: November 4, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Broc Stirton, Kevin R. Lensing
  • Patent number: 6623994
    Abstract: The present invention is generally directed to various methods for calibrating optical-based metrology tools. In one illustrative embodiment, the method comprises performing a metrology process on a specimen using an optical-based metrology tool to obtain optical characteristic data and comparing the obtained optical characteristic data to target optical characteristic data established for the specimen.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: September 23, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventor: James Broc Stirton
  • Patent number: 6618149
    Abstract: A method of determining the composition of a film stack using optical properties is disclosed herein. In one embodiment, the method comprises providing a library of optical characteristic traces, each of which correspond to a film stack combination comprised of multiple process layers, providing a wafer having a film stack formed thereabove, and illuminating the film stack. The method further comprises measuring light reflected off the film stack to generate an optical characteristic trace for the film stack, and determining the composition of the film stack formed above the wafer by correlating or matching the generated optical characteristic trace for the film stack above the wafer to an optical characteristic trace from the library, the optical characteristic trace from the library having an associated film stack composition comprised of a plurality of known process layers.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: September 9, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventor: James Broc Stirton
  • Patent number: 6614540
    Abstract: A method for characterizing features includes measuring a dimensional characteristic of a first grating structure; illuminating at least a portion of a first feature and the first grating structure, the first feature being formed over at least a portion of the first grating structure; measuring light reflected from the illuminated portion of the first feature and the first grating structure to generate a reflection profile; selecting at least one reference reflection profile based on the measured dimensional characteristic of the first grating structure, comparing the generated reflection profile to the selected reference reflection profile; and determining a characteristic of the first feature based on the comparison between the measured reflection profile and the selected reference reflection profile.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: September 2, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventor: James Broc Stirton
  • Patent number: 6602723
    Abstract: The present invention is directed to a method of incorporating metrology grating structures into die design. In one embodiment, the invention is directed to a wafer comprised of a semiconducting substrate, a plurality of production die formed on the substrate, and at least one non-production die formed on the substrate, the non-production die having at least one grating structure formed therein that will ultimately be measured in subsequent metrology tests. The present invention is also directed to a method that comprises providing a semiconducting substrate, forming at least one production integrated circuit device in a plurality of production die formed on the substrate, and forming at least one grating structure in the non-production die.
    Type: Grant
    Filed: April 2, 2001
    Date of Patent: August 5, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Richard J. Markle, James Broc Stirton
  • Patent number: 6597447
    Abstract: A method and an apparatus for performing periodic correction of metrology data. At least one semiconductor wafer is processed. Metrology data from the processed semiconductor wafer is acquired. At least one test wafer is processed. Test wafer metrology data from the processed test wafer is acquired. A test wafer metrology calibration process is performed upon the acquired metrology data using the acquired test wafer metrology data to produce a calibrated metrology data.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: July 22, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Broc Stirton, Kevin R. Lensing
  • Patent number: 6582863
    Abstract: The present invention is generally directed to a method of controlling photolithography processes based upon scatterometric measurements of sub-nominal grating structures, and a system for accomplishing same. In one embodiment, the method comprises providing a library of optical characteristic traces, each of which corresponds to a sub-nominal grating structure comprised of a plurality of photoresist features having a known degree of residual photoresist material positioned between the photoresist features, forming a process layer above a semiconducting substrate, and forming a layer of photoresist above the process layer.
    Type: Grant
    Filed: June 11, 2001
    Date of Patent: June 24, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Broc Stirton, Kevin R. Lensing
  • Patent number: 6562635
    Abstract: A method of using scatterometry measurements to determine and control conductive interconnect profiles is disclosed. In one embodiment, the method comprises providing a library of optical characteristic traces, each of which correspond to a grating structure comprised of a plurality of conductive interconnects having a known profile, providing a substrate having at least one grating structure formed thereabove, the formed grating structure comprised of a plurality of conductive interconnects having an unknown profile, and illuminating the formed grating structure. The method further comprises measuring light reflected off of the grating structure to generate an optical characteristic trace for the formed grating structure and determining a profile of the gate electrode structures comprising the formed grating structure by correlating the generated optical characteristic trace to an optical characteristic trace from the library.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: May 13, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kevin R. Lensing, James Broc Stirton, Matthew A. Purdy