Abstract: This disclosure relates to a system and method for creating nanowires. A nanowire can be created by exposing layers of material in a superlattice and dissolving and transferring material from edges of the exposed layers onto a substrate. The nanowire can also be created by exposing layers of material in a superlattice and depositing material onto edges of the exposed layers.

Abstract: A semiconductor device including a substrate having a dopant of a first polarity, a first semiconducting structure including a dopant of a second polarity disposed over the substrate, and having substantially planar top and side surfaces. The semiconductor device includes a first junction, formed between the first semiconducting structure and the substrate, having an area wherein at least one lateral dimension is less than about 75 nanometers.

Abstract: This disclosure relates to a system and method for creating nano-object arrays. A nano-object array can be created by exposing troughs in a corrugated surface to nano-objects and depositing the nano-objects within or orienting the nano-objects with the troughs.

Abstract: A sensor device and method for detecting the presence of an analyte in a fluid solution are disclosed. The sensor device system can comprise a substrate and an array of free-standing nanowires attached to the substrate. The array can include individual free-standing nanowires wherein each of the individual free-standing nanowires have a first end and a second end. The first end can, in some embodiments, be attached to the substrate and the second end unattached to the substrate. Such individual free-standing nanowires are configured for electrical communication with other individual free-standing nanowires through the first end. A signal measurement apparatus can be electrically coupled to the array of free-standing nanowires for receiving electrical information from the array of free-standing nanowires.

Abstract: A light emitting device can incorporate a plurality of nanostructures in a light emission layer. The device can include a donor electrode and an acceptor electrode which are light transmissive. At least one of the donor electrode and acceptor electrode can include an inorganic material. The light emission layer can be disposed between each of the donor material and the acceptor material.

Abstract: This disclosure relates to a system and method for creating nano-object arrays. A nano-object array can be created by exposing troughs in a corrugated surface to nano-objects and depositing the nano-objects within or orienting the nano-objects with the troughs.

Abstract: Molecular-doped devices, including transistors and sensors, for nano-scale applications are provided. The device comprises a substrate, a source and a drain, both supported on the substrate and separated by a distance. The molecular-doped device further comprises a layer or wire of a semiconductor material formed on the substrate between the source and drain and a layer of a molecular-doped polymer formed on the semiconductor layer.

Abstract: A method of forming electrical devices can include electrophotographically printing a particulate material on a device substrate, and the particulate material can form at least a portion of the electrical device. An optional intermediate transfer member can also be used to improve reliability and performance of the process. Dry or liquid electrophotographic methods can be effectively used to form electronic devices on a wide variety of substrates not conventionally available in device fabrication.

Abstract: Various fluidic techniques can employ ducting structures, such as microstructures, that extend between other components, such as plate-like structures. A ducting structure can, for example, include an inlet opening toward or near one plate-like structure, an outlet opening toward or near another plate-like structure, and a duct in which fluid flows after being received through the inlet opening and before being provided through the outlet opening. In some implementations, a ducting structure is photo-defined, such as by exposing a photoimageable structure and then removing either exposed or unexposed regions. In some implementations, a ducting structure is a freestanding polymer microstructure. In some implementations, ducting structures are microstructures that extend approximately the same length between first and second plate-like structures, and have a ratio of length to maximum cavity diameter of approximately two or more.

Abstract: A memory device including a substrate, and multiple self-aligned nano-rectifying elements disposed over the substrate. Each nano-rectifying element has multiple first electrode lines, and multiple device structures disposed on the multiple first electrode lines forming the multiple self-aligned nano-rectifying elements. Each device structure has at least one lateral dimension less than about 75 nanometers. The memory device also includes multiple switching elements disposed over the device structures and self-aligned in at least one direction with the device structures. In addition, the memory device includes multiple second electrode lines disposed over, electrically coupled to, and self-aligned to the switching elements, whereby a memory device is formed.

Abstract: A memory device includes a semiconducting polymer film, which includes an organic dopant. The semiconducting polymer film has a first side and a second side. The memory device also includes a first plurality of electrical conductors substantially parallel to each other coupled to the first side of the semiconducting polymer layer, and a second plurality of electrical conductors substantially parallel to each other, coupled to the second side of the semiconducting polymer layer. The first and second pluralities of electrical conductors are substantially mutually orthogonal to each other. Further, an electrical charge is localized on the organic dopant.

Abstract: A memory device including a substrate, and multiple self-alignednano-rectifying elements disposed over the substrate. Each nano-rectifying element has multiple first electrode lines, and multiple device structures disposed on the multiple first electrode lines forming the multiple self-aligned nano-rectifying elements. Each device structure has at least one lateral dimension less than about 75 nanometers. The memory device also includes multiple switching elements disposed over the device structures and self-aligned in at least one direction with the device structures. In addition, the memory device includes multiple second electrode lines disposed over, electrically coupled to, and self-aligned to the switching elements, whereby a memory device is formed.

Abstract: A nanoscopic transistor is made by forming an oxide layer on a semiconductor substrate, applying resist, patterning the resist using imprint lithography to form a pattern aligned along a first direction, applying a first ion-masking material over the pattern, selectively lifting it off to leave a first ion mask to form a gate, forming doped regions by implanting a suitable dopant, applying another layer of resist and patterning the second resist layer using imprint lithography to form a second pattern aligned along a second direction, applying a second ion-masking material over the second pattern, selectively lifting it off to leave a second ion mask defined by the second pattern, and forming second doped regions in the substrate by implanting a suitable second dopant selectively in accordance with the second ion mask. The method may be used to make an array of nanoscopic transistors.

Abstract: This disclosure relates to a doped polymer memory device. In one aspect the doped polymer memory device includes a molecularly doped polymer layer that includes a binder and a dopant. The combination of the binder and the dopant modifies polarizability of the molecularly doped polymer layer in a manner that enhances the retention time of the doped polymer memory device. In another aspect, the doped polymer memory device includes a molecularly doped polymer layer that includes a binder and a dopant. An additional dopant is added to the molecularly doped polymer layer. The additional dopant is selected to modify polarizability of the molecularly doped polymer layer in a manner that enhances the retention time of the doped polymer memory device.

Abstract: This disclosure relates to continuous carbon-nanotube filaments of radiation-emitting devices and methods for fabricating them.

Abstract: A memory structure that includes a first electrode, a second electrode, a third electrode, a control element of a predetermined device type disposed between the first electrode and the second electrode, and a memory storage element of the predetermined device type disposed between the second electrode and the third electrode. The memory storage element has a cross-sectional area that is less than a cross-sectional area of the control element.

Abstract: A memory device includes a semiconducting polymer film, which includes an organic dopant. The semiconducting polymer film has a first side and a second side. The memory device also includes a first plurality of electrical conductors substantially parallel to each other coupled to the first side of the semiconducting polymer layer, and a second plurality of electrical conductors substantially parallel to each other, coupled to the second side of the semiconducting polymer layer. The first and second pluralities of electrical conductors are substantially mutually orthogonal to each other. Further, an electrical charge is localized on the organic dopant.

Abstract: This disclosure relates to a system and method for fabricating and using a superlattice. A superlattice can be fabricated by applying alternating material layers on a ridge and then removing some of the alternating layers to expose edges. These exposed edges can be of nearly arbitrary length and curvature. These edges can be used to fabricate an array of nano-scale-width curved wires.

Abstract: A nanoscopic transistor is made by forming an oxide layer on a semiconductor substrate, applying resist, patterning the resist using imprint lithography to form a pattern aligned along a first direction, applying a first ion-masking material over the pattern, selectively lifting it off to leave a first ion mask to form a gate, forming doped regions by implanting a suitable dopant, applying another layer of resist and patterning the second resist layer using imprint lithography to form a second pattern aligned along a second direction, applying a second ion-masking material over the second pattern, selectively lifting it off to leave a second ion mask defined by the second pattern, and forming second doped regions in the substrate by implanting a suitable second dopant selectively in accordance with the second ion mask. The method may be used to make an array of nanoscopic transistors.

Abstract: A structure is provided that is formed with a template defining a pattern having nanoscale features. The template may be positioned on a substrate and include a resist layer having openings formed therein, where the template is configured to accommodate the controlled assembly of nanoscale objects.